V6204755 VID

REVISIONS
LTR
DESCRIPTION
DATE
APPROVED
A
Correct lead finishes on last page. - CFS
05-12-02
Thomas M. Hess
B
Correct the device package top-side markings on
last page. - CFS
07-07-10
Thomas M. Hess
C
Add device type 07. - RO
10-11-02
Charles F. Saffle
CURRENT DESIGN ACTIVITY CAGE CODE 16236
HAS CHANGED NAMES TO:
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
Prepared in accordance with ASME Y14.24
Vendor item drawing
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OF PAGES
PMIC N/A
PREPARED BY
RICK OFFICER
Original date of drawing
YY-MM-DD
CHECKED BY
TOM HESS
04-11-19
TITLE
MICROCIRCUIT, LINEAR, HIGH SPEED, LOW
POWER, PRECISION, OPERATIONAL
AMPLIFIER, MONOLITHIC SILICON
APPROVED BY
RAYMOND MONNIN
SIZE
A
REV
AMSC N/A
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
CODE IDENT. NO.
DWG NO.
V62/04755
16236
C
PAGE
1
OF
26
5962-V078-10
1. SCOPE
1.1 Scope. This drawing documents the general requirements of a high performance high speed, low power, precision, operational
amplifier microcircuit, with an operating temperature range of -40C to +125C for device types 01 through 06 and -55C to +125C for
device type 07.
1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item
drawing establishes an administrative control number for identifying the item on the engineering documentation:
V62/04755
-
Drawing
number
01
X
E
Device type
(See 1.2.1)
Case outline
(See 1.2.2)
Lead finish
(See 1.2.3)
1.2.1 Device type(s).
Generic
Device type
01
02
03
04
05
06
07
VIO at 25C
maximum
Circuit function
TLE2021AQ
TLE2021Q
TLE2022AQ
TLE2022Q
TLE2024AQ
TLE2024Q
TLE2021M
High speed, low power, precision, operational amplifier
High speed, low power, precision, operational amplifier
High speed, low power, precision, operational amplifier
High speed, low power, precision, operational amplifier
High speed, low power, precision, operational amplifier
High speed, low power, precision, operational amplifier
High speed, low power, precision, operational amplifier
200 V
500 V
300 V
500 V
750 V
1000 V
500 V
1.2.2 Case outline(s). The case outline(s) are as specified herein.
Outline letter
Number of pins
X
Y
8
16
JEDEC PUB 95
Package style
MS-012AA
MS-013AA
Plastic small outline
Plastic small outline
1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer:
Finish designator
A
B
C
D
E
Z
DEFENSE SUPPLY CENTER, COLUMBUS
COLUMBUS, OHIO
Material
Hot solder dip
Tin-lead plate
Gold plate
Palladium
Gold flash palladium
Other
SIZE
A
CODE IDENT NO.
16236
REV
C
DWG NO.
V62/04755
PAGE
2
1.3 Absolute maximum ratings.
1/
Supply voltage (VCC+) ............................................................................................... +20 V 2/
Supply voltage (VCC-) ................................................................................................ -20 V 2/
Differential input voltage (VID) .................................................................................... ±0.6 V 3/
Input voltage range (VI) (any input) ............................................................................ ±VCC 2/
Input current (II) (each input) ...................................................................................... ±1 mA
Output current (IO) (each output):
Device types 01, 02, 07 ..........................................................................................
Device types 03, 04 ................................................................................................
Device types 05, 06 ................................................................................................
Total current into VCC+ ..............................................................................................
±20 mA
±30 mA
±40 mA
80 mA
Total current into VCC- ............................................................................................... 80 mA
Duration of short circuit current at (or below) 25C .................................................... Unlimited 4/
Operating virtual junction temperature range (TJ) ...................................................... +150C
Package thermal impedance (RJA):
Case outline X ........................................................................................................
Case outline Y ........................................................................................................
Storage temperature range (TSTG) ............................................................................
Lead temperature 1.6 mm (1/16 inch) from case for 3 seconds (case X only) ...........
97C/W 5/
57C/W 5/
-65C to +150C
+300C
1.4 Recommended operating conditions. 6/
Supply voltage range (VCC) ....................................................................................... ±2 V to ±20 V
Input voltage range (VIC):
VCC = ±5 V ............................................................................................................. 0 V to 3.2 V
VCC± = ±15 V ......................................................................................................... -15 V to 13.2 V
Operating free-air temperature range (TA) :
Device types 01, 02, 03, 04, 05, 06 ........................................................................ -40C to +125C
Device type 07 ....................................................................................................... -55C to +125C
1/
2/
3/
4/
5/
6/
Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any other conditions beyond those indicated under
“recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may
affect device reliability.
All voltages values, expect differential voltages, are with respect to the midpoint between VCC+, and VCCDifferential voltages are at IN+ with respect to IN-. Excessive current flows if a differential input voltage in excess of
approximately ±600 mV is applied between the inputs unless some limiting resistance is used.
The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the
maximum dissipation rating is not exceeded.
Maximum power dissipation is a function of TJ(max), JA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) – TA)/ JA. Selecting the maximum of 150C can affect reliability.
Use of this product beyond the manufacturers design rules or stated parameters is done at the user’s risk. The manufacturer
and/or distributor maintain no responsibility or liability for product used beyond the stated limits.
DEFENSE SUPPLY CENTER, COLUMBUS
COLUMBUS, OHIO
SIZE
A
CODE IDENT NO.
16236
REV
C
DWG NO.
V62/04755
PAGE
3
2. APPLICABLE DOCUMENTS
JEDEC PUB 95
–
Registered and Standard Outlines for Semiconductor Devices
(Applications for copies should be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA
22201-3834 or online at http://www.jedec.org)
3. REQUIREMENTS
3.1 Marking. Parts shall be permanently and legibly marked with the manufacturer’s part number as shown in 6.3 herein and as
follows:
A.
B.
C.
Manufacturer’s name, CAGE code, or logo
Pin 1 identifier
ESDS identification (optional)
3.2 Unit container. The unit container shall be marked with the manufacturer’s part number and with items A and C (if applicable)
above.
3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are
as specified in 1.3, 1.4, and table I herein.
3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein.
3.5 Diagrams.
3.5.1 Case outlines. The case outlines shall be as shown in 1.2.2 and figure 1.
3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2.
3.5.3 Test circuits. The test circuits shall be as shown in figure 3.
DEFENSE SUPPLY CENTER, COLUMBUS
COLUMBUS, OHIO
SIZE
A
CODE IDENT NO.
16236
REV
C
DWG NO.
V62/04755
PAGE
4
TABLE I. Electrical performance characteristics. 1/
Test
Symbol
Conditions
Temperature,
TA
Device
type
Limits
Min
Input offset voltage
VIO
VCC = 5 V, VIC = 0, RS = 50 
01
+25C
02
600
800
-40C to +125C
07
+25C
600
850
-55C to +125C
Input offset
2/
voltage long term drift
Input offset current
Input bias current
Common mode input
voltage range
High level output
voltage
VCC = 5 V, VIC = 0, RS = 50 
VCC = 5 V, VIC = 0, RS = 50 
IIO
IIB
VICR
VOH
VCC = 5 V, VIC = 0, RS = 50 
VCC = 5 V, VIC = 0, RS = 50 
VCC = 5 V, RS = 50 
VCC = 5 V, RL = 10 k
V
550
+25C
VIO
Max
400
-40C to +125C
Temperature
coefficient of input
offset voltage
Unit
V/C
-40C to +125C
01, 02
2 typical
-55C to +125C
07
2 typical
-40C to +125C
01, 02
0.005 typical
-55C to +125C
07
0.005 typical
+25C
01,02,
07
6
-40C to +125C
01,02
10
-55C to +125C
07
10
+25C
01,02,
07
70
-40C to +125C
01,02
90
-55C to +125C
07
90
+25C
01,02,
07
0 to
3.5
-40C to +125C
01,02
0 to
3.2
-55C to +125C
07
0 to
3.2
+25C
01,02,
07
4
-40C to +125C
01,02
3.8
-55C to +125C
07
3.8
V/mo
nA
nA
V
V
See footnotes at end of table.
DEFENSE SUPPLY CENTER, COLUMBUS
COLUMBUS, OHIO
SIZE
A
CODE IDENT NO.
16236
REV
C
DWG NO.
V62/04755
PAGE
5
TABLE I. Electrical performance characteristics – Continued. 1/
Test
Symbol
Conditions
Temperature,
TA
Device
type
Limits
Min
Low level output
voltage
Large signal differential
voltage amplification
VOL
AVD
VCC = 5 V, RL = 10 k
VO = 1.4 V to 4 V, RL = 10 k,
VCC = 5 V
Common mode
rejection ratio
CMRR
VIC = VICRmin, RS = 50 ,
VCC = 5 V
Supply voltage
rejection ratio
kSVR
VCC = 5 V to 30 V
(VCC / VIO)
Supply current
ICC
Supply current change
over operating
temperature range
ICC
Slew rate at unity gain
SR
VCC = 5 V, VO = 2.5 V, no load
VCC = 5 V, VO = 2.5 V, no load
VCC = 5 V, VO = 1 V to 3 V,
see figure 3
Unit
Max
+25C
01,02,
07
0.8
-40C to +125C
01,02
0.95
-55C to +125C
07
0.95
+25C
01,02,
07
0.3
-40C to +125C
01,02
0.1
-55C to +125C
07
0.1
+25C
01,02,
07
85
-40C to +125C
01,02
80
-55C to +125C
07
80
+25C
01,02,
07
105
-40C to +125C
01,02
100
-55C to +125C
07
100
+25C
01,02,
07
300
-40C to +125C
01,02
300
-55C to +125C
07
300
-40C to +125C
01,02
9 typical
-55C to +125C
07
9 typical
+25C
01,02,
07
0.5 typical
V
V/V
dB
dB
A
A
V/s
See footnotes at end of table.
DEFENSE SUPPLY CENTER, COLUMBUS
COLUMBUS, OHIO
SIZE
A
CODE IDENT NO.
16236
REV
C
DWG NO.
V62/04755
PAGE
6
TABLE I. Electrical performance characteristics – Continued. 1/
Test
Symbol
Conditions
Temperature,
TA
Device
type
Limits
Min
Equivalent input noise
voltage
Vn
(see figure 3)
Peak-to-peak
equivalent input
noise voltage
+25C
VCC = 5 V, f = 10 Hz
01,02,
07
Max
21 typical
nV/Hz
17 typical
VCC = 5 V, f = 1 kHz
VN(PP)
Unit
+25C
VCC = 5 V, f = 0.1 Hz to 1 Hz
01,02,
07
V
0.16 typical
0.47 typical
VCC = 5 V, f = 0.1 Hz to 10 Hz
Equivalent input
noise current
In
VCC = 5 V
+25C
01,02,
07
0.9 typical
pA/Hz
Unity gain bandwidth
B1
VCC = 5 V, see figure 3
+25C
01,02,
07
1.2 typical
MHz
Phase margin at unity
gain
m
VCC = 5 V, see figure 3
+25C
01,02,
07
42 typical
See footnotes at end of table.
DEFENSE SUPPLY CENTER, COLUMBUS
COLUMBUS, OHIO
SIZE
A
CODE IDENT NO.
16236
REV
C
DWG NO.
V62/04755
PAGE
7
TABLE I. Electrical performance characteristics – Continued. 1/
Test
Symbol
Conditions
Temperature,
TA
Device
type
Limits
Min
Input offset voltage
VIO
VCC = 15 V, VIC = 0, RS = 50 
Max
01
+25C
450
02
+25C
500
700
-40C to +125C
07
+25C
500
800
-55C to +125C
VIO
Input offset
2/
voltage long term drift
Input offset current
Input bias current
Common mode input
voltage range
VCC = 15 V, VIC = 0, RS = 50 
VCC = 15 V, VIC = 0, RS = 50 
IIO
IIB
VICR
VCC = 15 V, VIC = 0, RS = 50 
VCC = 15 V, VIC = 0, RS = 50 
VCC = 15 V, RS = 50 
V
300
-40C to +125C
Temperature
coefficient of input
offset voltage
Unit
V/C
-40C to +125C
01, 02
2 typical
-55C to +125C
07
2 typical
-40C to +125C
01, 02
0.006 typical
-55C to +125C
07
0.006 typical
+25C
01,02,
07
6
-40C to +125C
01,02
10
-55C to +125C
07
10
+25C
01,02,
07
70
-40C to +125C
01,02
90
-55C to +125C
07
90
+25C
01,02,
07
-15 to
13.5
-40C to +125C
01,02
-15 to
13.5
-55C to +125C
07
-15 to
13.5
V/mo
nA
nA
V
See footnotes at end of table.
DEFENSE SUPPLY CENTER, COLUMBUS
COLUMBUS, OHIO
SIZE
A
CODE IDENT NO.
16236
REV
C
DWG NO.
V62/04755
PAGE
8
TABLE I. Electrical performance characteristics – Continued. 1/
Test
Symbol
Conditions
Temperature,
TA
Device
type
Limits
Min
Maximum positive
peak output voltage
swing
Maximum negative
peak output voltage
swing
Large signal differential
voltage amplification
VOM+
VOM-
AVD
VCC = 15 V, RL = 10 k
VCC = 15 V, RL = 10 k
VO = 0 V, RL = 10 k
VCC = 15 V
Common mode
rejection ratio
CMRR
VIC = VICRmin, RS = 50 ,
VCC = 15 V
Supply voltage
rejection ratio
kSVR
VCC = 2.5 V to 15 V
(VCC / VIO)
Supply current
Supply current change
over operating
temperature range
ICC
ICC
VCC = 15 V, VO = 0 V, no load
VCC = 15 V, VO = 0 V, no load
Unit
Max
+25C
01,02,
07
14
V
-40C to +125C
01,02
13.8
-55C to +125C
07
13.8
+25C
01,02,
07
-13.7
-40C to +125C
01,02
-13.6
-55C to +125C
07
-13.6
+25C
01,02,
07
1
-40C to +125C
01,02
0.5
-55C to +125C
07
0.5
+25C
01,02,
07
100
-40C to +125C
01,02
96
-55C to +125C
07
96
+25C
01,02,
07
105
-40C to +125C
01,02
100
-55C to +125C
07
100
+25C
01,02,
07
350
-40C to +125C
01,02
350
-55C to +125C
07
350
-40C to +125C
01,02
10 typical
-55C to +125C
07
10 typical
V
V/V
dB
dB
A
A
See footnotes at end of table.
DEFENSE SUPPLY CENTER, COLUMBUS
COLUMBUS, OHIO
SIZE
A
CODE IDENT NO.
16236
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V62/04755
PAGE
9
TABLE I. Electrical performance characteristics – Continued. 1/
Test
Symbol
Conditions
Temperature,
TA
Device
type
Limits
Min
Slew rate at unity gain
SR
VCC = 15 V, VO = 10 V,
see figure 3
Equivalent input noise
voltage
Vn
(see figure 3)
VCC = 15 V, f = 10 Hz
Unit
Max
+25C
01,02,
07
0.45
-40C to +125C
01,02
0.4
-55C to +125C
07
0.4
+25C
01,02,
07
V/s
19 typical
nV/Hz
15 typical
VCC = 15 V, f = 1 kHz
V
Peak-to-peak
equivalent input
noise voltage
VN(PP)
Equivalent input
noise current
In
VCC = 15 V
+25C
01,02,
07
0.09 typical
pA/Hz
Unity gain bandwidth
B1
VCC = 15 V, see figure 3
+25C
01,02,
07
2 typical
MHz
Phase margin at unity
gain
m
VCC = 15 V, see figure 3
+25C
01,02,
07
46 typical
VCC = 15 V, f = 0.1 Hz to 1 Hz
+25C
01,02,
07
0.16 typical
0.47 typical
VCC = 15 V, f = 0.1 Hz to 10 Hz
See footnotes at end of table.
DEFENSE SUPPLY CENTER, COLUMBUS
COLUMBUS, OHIO
SIZE
A
CODE IDENT NO.
16236
REV
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DWG NO.
V62/04755
PAGE
10
TABLE I. Electrical performance characteristics – Continued. 1/
Test
Symbol
Conditions
Temperature,
TA
Device
type
Limits
Min
Input offset voltage
VIO
VCC = 5 V, VIC = 0, RS = 50 
03
+25C
04
600
800
-40C to +125C
Input offset
2/
voltage long term drift
Input offset current
IIO
VCC = 5 V, VIC = 0, RS = 50 
-40C to +125C
03, 04
2 typical
V/C
VCC = 5 V, VIC = 0, RS = 50 
-40C to +125C
03, 04
0.005 typical
V/mo
VCC = 5 V, VIC = 0, RS = 50 
+25C
03,04
6
IIB
VCC = 5 V, VIC = 0, RS = 50 
+25C
03,04
70
VICR
VCC = 5 V, RS = 50 
+25C
03,04
VOH
+25C
VCC = 5 V, RL = 10 k
03,04
VOL
+25C
VCC = 5 V, RL = 10 k
4
03,04
AVD
03
0.4
V/V
0.1
-40C to +125C
VCC = 5 V
V
0.95
+25C
VO = 1.4 V to 4 V, RL = 10 k,
V
0.8
-40C to +125C
Large signal differential
voltage amplification
V
3.8
-40C to +125C
Low level output
voltage
0 to
3.5
0 to
3.2
-40C to +125C
High level output
voltage
nA
90
-40C to +125C
Common mode input
voltage range
nA
10
-40C to +125C
Input bias current
V
550
+25C
VIO
Max
400
-40C to +125C
Temperature
coefficient of input
offset voltage
Unit
04
+25C
0.3
0.1
-40C to +125C
See footnotes at end of table.
DEFENSE SUPPLY CENTER, COLUMBUS
COLUMBUS, OHIO
SIZE
A
CODE IDENT NO.
16236
REV
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DWG NO.
V62/04755
PAGE
11
TABLE I. Electrical performance characteristics – Continued. 1/
Test
Symbol
Conditions
Temperature,
TA
Device
type
Limits
Min
Common mode
rejection ratio
CMRR
VIC = VICRmin, RS = 50 ,
03
+25C
04
+25C
kSVR
03
+25C
VCC = 5 V to 30 V
(VCC / VIO)
04
+25C
VCC = 5 V, VO = 2.5 V, no load
85
103
dB
100
95
-40C to +125C
ICC
dB
98
-40C to +125C
+25C
Supply current
87
80
-40C to +125C
Supply voltage
rejection ratio
Max
82
-40C to +125C
VCC = 5 V
Unit
03,04
600
A
600
-40C to +125C
-40C to +125C
03,04
37 typical
A
VCC = 5 V, VO = 1 V to 3 V,
see figure 3
+25C
03,04
0.5 typical
V/s
VCC = 5 V, f = 10 Hz
+25C
03,04
21 typical
nV /
Supply current change
over operating
temperature range
ICC
VCC = 5 V, VO = 2.5 V, no load
Slew rate at unity gain
SR
Equivalent input noise
voltage
(see figure 3)
Vn
Peak-to-peak
equivalent input
noise voltage
VN(PP)
Equivalent input
noise current
In
Unity gain bandwidth
B1
VCC = 5 V, see figure 3
+25C
03,04
1.7 typical
Phase margin at unity
gain
m
VCC = 5 V, see figure 3
+25C
03,04
47 typical
17 typical
VCC = 5 V, f = 1 kHz
+25C
VCC = 5 V, f = 0.1 Hz to 1 Hz
03,04
0.16 typical
Hz
V
0.47 typical
VCC = 5 V, f = 0.1 Hz to 10 Hz
+25C
VCC = 5 V
03,04
0.1 typical
pA /
Hz
MHz
See footnotes at end of table.
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TABLE I. Electrical performance characteristics – Continued. 1/
Test
Symbol
Conditions
Temperature,
TA
Device
type
Limits
Min
Input offset voltage
VIO
VCC = 15 V, VIC = 0, RS = 50 
Max
03
+25C
300
04
+25C
500
700
-40C to +125C
VIO
Input offset
2/
voltage long term drift
Input offset current
IIO
VCC = 15 V, VIC = 0, RS = 50 
-40C to +125C
03, 04
2 typical
V/C
VCC = 15 V, VIC = 0, RS = 50 
-40C to +125C
03, 04
0.006 typical
V/mo
VCC = 15 V, VIC = 0, RS = 50 
+25C
03,04
6
IIB
VCC = 15 V, VIC = 0, RS = 50 
+25C
03,04
70
VICR
VCC = 15 V, RS = 50 
+25C
03,04
VOM+
Maximum negative
peak output voltage
swing
VOM-
Large signal differential
voltage amplification
AVD
VCC = 15 V, RL = 10 k
+25C
-15 to
13.5
03,04
14
+25C
03,04
03
+25C
VCC = 15 V
-13.7
V
-13.6
-40C to +125C
VO = 0 V, RL = 10 k,
V
13.8
-40C to +125C
VCC = 15 V, RL = 10 k
V
-15 to
13.2
-40C to +125C
Maximum positive
peak output voltage
swing
nA
90
-40C to +125C
Common mode input
voltage range
nA
10
-40C to +125C
Input bias current
V
450
-40C to +125C
Temperature
coefficient of input
offset voltage
Unit
1
V/V
1
-40C to +125C
04
+25C
0.8
0.8
-40C to +125C
See footnotes at end of table.
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TABLE I. Electrical performance characteristics – Continued. 1/
Test
Symbol
Conditions
Temperature,
TA
Device
type
Limits
Min
Common mode
rejection ratio
CMRR
VIC = VICRmin, RS = 50 ,
03
+25C
VCC = 15 V
04
03
+25C
VCC = 2.5 V to 15 V
(VCC / VIO)
04
VCC = 15 V, VO = 0 V, no load
+25C
95
103
dB
100
95
-40C to +125C
ICC
dB
98
-40C to +125C
+25C
Supply current
97
91
-40C to +125C
kSVR
Max
93
-40C to +125C
+25C
Supply voltage
rejection ratio
03,04
700
ICC
VCC = 15 V, VO = 0 V, no load
Slew rate at unity gain
SR
VCC = 15 V, VO = 10 V,
see figure 3
-40C to +125C
03,04
+25C
03,04
60 typical
0.45
V/s
Equivalent input noise
voltage
(see figure 3)
Vn
Peak-to-peak
equivalent input
noise voltage
VN(PP)
Equivalent input
noise current
In
Unity gain bandwidth
B1
VCC = 15 V, see figure 3
+25C
03,04
2.8 typical
Phase margin at unity
gain
m
VCC = 15 V, see figure 3
+25C
03,04
52 typical
+25C
A
0.4
-40C to +125C
VCC = 15 V, f = 10 Hz
A
700
-40C to +125C
Supply current change
over operating
temperature range
Unit
03,04
19 typical
nV /
Hz
15 typical
VCC = 15 V, f = 1 kHz
VCC = 15 V, f = 0.1 Hz to 1 Hz
+25C
03,04
0.16 typical
V
0.47 typical
VCC = 15 V, f = 0.1 Hz to 10 Hz
VCC = 15 V
+25C
03,04
0.1 typical
pA /
Hz
MHz
See footnotes at end of table.
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TABLE I. Electrical performance characteristics – Continued. 1/
Test
Symbol
Conditions
Temperature,
TA
Device
type
Limits
Min
Input offset voltage
VIO
VCC = 5 V, VIC = 0, RS = 50 
05
+25C
06
1100
1300
-40C to +125C
Input offset
2/
voltage long term drift
Input offset current
IIO
VCC = 5 V, VIC = 0, RS = 50 
-40C to +125C
05, 06
2 typical
V/C
VCC = 5 V, VIC = 0, RS = 50 
-40C to +125C
05, 06
0.005 typical
V/mo
VCC = 5 V, VIC = 0, RS = 50 
+25C
05,06
6
IIB
VCC = 5 V, VIC = 0, RS = 50 
+25C
05,06
70
VICR
VCC = 5 V, RS = 50 
+25C
05,06
VOH
+25C
VCC = 5 V, RL = 10 k
05,06
VOL
+25C
VCC = 5 V, RL = 10 k
3.9
05,06
AVD
05
0.3
V/V
0.1
-40C to +125C
VCC = 5 V
V
0.95
+25C
VO = 1.4 V to 4 V, RL = 10 k,
V
0.8
-40C to +125C
Large signal differential
voltage amplification
V
3.7
-40C to +125C
Low level output
voltage
0 to
3.5
0 to
3.2
-40C to +125C
High level output
voltage
nA
90
-40C to +125C
Common mode input
voltage range
nA
10
-40C to +125C
Input bias current
V
1050
+25C
VIO
Max
850
-40C to +125C
Temperature
coefficient of input
offset voltage
Unit
06
+25C
0.2
0.1
-40C to +125C
See footnotes at end of table.
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TABLE I. Electrical performance characteristics – Continued. 1/
Test
Symbol
Conditions
Temperature,
TA
Device
type
Limits
Min
Common mode
rejection ratio
CMRR
VIC = VICRmin, RS = 50 ,
05
+25C
06
+25C
kSVR
05
+25C
VCC = 2.5 V to 15 V
(VCC / VIO)
06
+25C
VCC = 5 V, VO = 0 V, no load
80
100
dB
98
93
-40C to +125C
ICC
dB
95
-40C to +125C
+25C
Supply current
82
80
-40C to +125C
Supply voltage
rejection ratio
Max
82
-40C to +125C
VCC = 5 V
Unit
05,06
1200
A
1200
-40C to +125C
-40C to +125C
05,06
50 typical
A
VCC = 5 V, VO = 1 V to 3 V,
see figure 3
+25C
05,06
0.5 typical
V/s
VCC = 5 V, f = 10 Hz
+25C
05,06
21 typical
nV /
Supply current change
over operating
temperature range
ICC
VCC = 5 V, VO = 0 V, no load
Slew rate at unity gain
SR
Equivalent input noise
voltage
(see figure 3)
Vn
Peak-to-peak
equivalent input
noise voltage
VN(PP)
Equivalent input
noise current
In
Unity gain bandwidth
B1
VCC = 5 V, see figure 3
+25C
05,06
1.7 typical
Phase margin at unity
gain
m
VCC = 5 V, see figure 3
+25C
05,06
47 typical
17 typical
VCC = 5 V, f = 1 kHz
+25C
VCC = 5 V, f = 0.1 Hz to 1 Hz
05,06
0.16 typical
Hz
V
0.47 typical
VCC = 5 V, f = 0.1 Hz to 10 Hz
+25C
VCC = 5 V
05,06
0.1 typical
pA /
Hz
MHz
See footnotes at end of table.
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TABLE I. Electrical performance characteristics – Continued. 1/
Test
Symbol
Conditions
Temperature,
TA
Device
type
Limits
Min
Input offset voltage
VIO
VCC = 15 V, VIC = 0, RS = 50 
Max
05
+25C
750
06
+25C
1000
1200
-40C to +125C
VIO
Input offset
2/
voltage long term drift
Input offset current
IIO
VCC = 15 V, VIC = 0, RS = 50 
-40C to +125C
05, 06
2 typical
V/C
VCC = 15 V, VIC = 0, RS = 50 
-40C to +125C
05, 06
0.006 typical
V/mo
VCC = 15 V, VIC = 0, RS = 50 
+25C
05,06
6
IIB
VCC = 15 V, VIC = 0, RS = 50 
+25C
05,06
70
VICR
VCC = 15 V, RS = 50 
+25C
05,06
VOM+
Maximum negative
peak output voltage
swing
VOM-
Large signal differential
voltage amplification
AVD
VCC = 15 V, RL = 10 k
+25C
-15 to
13.5
05,06
13.8
+25C
05,06
05
+25C
VCC = 15 V
-13.7
V
-13.6
-40C to +125C
VO = 10 V, RL = 10 k,
V
13.7
-40C to +125C
VCC = 15 V, RL = 10 k
V
-15 to
13.2
-40C to +125C
Maximum positive
peak output voltage
swing
nA
90
-40C to +125C
Common mode input
voltage range
nA
10
-40C to +125C
Input bias current
V
950
-40C to +125C
Temperature
coefficient of input
offset voltage
Unit
0.8
V/V
0.8
-40C to +125C
06
+25C
0.4
0.4
-40C to +125C
See footnotes at end of table.
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TABLE I. Electrical performance characteristics – Continued. 1/
Test
Symbol
Conditions
Temperature,
TA
Device
type
Limits
Min
Common mode
rejection ratio
CMRR
VIC = VICRmin, RS = 50 ,
05
+25C
VCC = 15 V
06
VCC = 2.5 V to 15 V
05
+25C
(VCC / VIO)
06
VCC = 15 V, VO = 0 V, no load
+25C
92
100
dB
98
93
-40C to +125C
ICC
dB
95
-40C to +125C
+25C
Supply current
94
88
-40C to +125C
kSVR
Max
90
-40C to +125C
+25C
Supply voltage
rejection ratio
05,06
1400
ICC
VCC = 15 V, VO = 0 V, no load
Slew rate at unity gain
SR
VCC = 15 V, VO = 10 V,
see figure 3
-40C to +125C
05,06
+25C
05,06
85 typical
0.45
V/s
Equivalent input noise
voltage
(see figure 3)
Vn
Peak-to-peak
equivalent input
noise voltage
VN(PP)
Equivalent input
noise current
In
Unity gain bandwidth
B1
VCC = 15 V, see figure 3
+25C
05,06
2.8 typical
Phase margin at unity
gain
m
VCC = 15 V, see figure 3
+25C
05,06
52 typical
1/
2/
+25C
A
0.4
-40C to +125C
VCC = 15 V, f = 10 Hz
A
1400
-40C to +125C
Supply current change
over operating
temperature range
Unit
05,06
19 typical
nV /
Hz
15 typical
VCC = 15 V, f = 1 kHz
VCC = 15 V, f = 0.1 Hz to 1 Hz
+25C
05,06
0.16 typical
V
0.47 typical
VCC = 15 V, f = 0.1 Hz to 10 Hz
VCC = 15 V
+25C
05,06
0.1 typical
pA /
Hz
MHz
Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over
the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters
may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization
and/or design.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = +150C
extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
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Case X
FIGURE 1. Case outlines.
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Case X
Dimensions
Inches
Symbol
Millimeters
Min
Max
Min
Max
A
---
0.069
---
1.75
A1
0.004
0.010
0.10
0.25
b
0.012
0.020
0.31
0.51
c
0.007
0.010
0.17
0.25
D
0.189
0.197
4.80
5.00
E
0.150
0.157
3.80
4.00
E1
0.228
0.244
5.80
6.20
e
L
n
0.050 BSC
0.016
1.27 BSC
0.050
0.40
8
1.27
8
NOTES:
1. Controlling dimensions are inch, millimeter dimensions are given for reference only.
2. For dimension D, body length does not include mold flash, protrusion, or gate burrs. Mold flash, protrusion, or gate
burrs shall not exceed 0.006 inch (0.15 mm) per end.
3. For dimension E, body width does not include interlead flash. Interlead flash shall not exceed 0.017 inch (0.43 mm)
per side.
4. Falls within reference to JEDEC MS-012-AA.
FIGURE 1. Case outlines – Continued.
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Case Y
FIGURE 1. Case outlines – Continued.
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Case Y
Dimensions
Inches
Symbol
Millimeters
Min
Max
Min
Max
A
---
0.104
---
2.65
A1
0.004
0.012
0.10
0.30
b
0.012
0.020
0.31
0.51
c
0.008
0.013
0.20
0.33
D
0.398
0.413
10.10
10.50
E
0.291
0.299
7.40
7.60
E1
0.393
0.419
9.97
10.63
e
L
n
0.050 BSC
0.016
1.27 BSC
0.050
0.40
16
1.27
16
NOTES:
1. Controlling dimensions are inch, millimeter dimensions are given for reference only.
2. Body dimensions do not include mold flash or protrusion not to exceed 0.006 inch (0.15 mm).
3. Falls within reference to JEDEC MS-013-AA.
FIGURE 1. Case outlines - Continued.
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Device types
01,02 and 07
03 and 04
05 and 06
Case outlines
X
X
Y
Terminal number
Terminal symbol
1
OFFSET N1
1 OUT
1 OUT
2
IN-
1 IN-
1 IN-
3
IN+
1 IN+
1 IN+
4
VCC- / GND
VCC- / GND
VCC+
5
OFFSET N2
2 IN+
2 IN+
6
OUT
2 IN-
2 IN-
7
VCC+
2 OUT
2 OUT
8
NC
VCC+
NC
9
---
---
NC
10
---
---
3 OUT
11
---
---
3 IN-
12
---
---
3 IN+
13
---
---
VCC- / GND
14
---
---
4 IN+
15
---
---
4 IN-
16
---
---
4 OUT
NC = No connection
FIGURE 2. Terminal connections.
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NOTE:
CL includes fixture capacitance.
FIGURE 3. Test circuits.
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NOTE:
CL includes fixture capacitance.
FIGURE 3. Test circuits – Continued.
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4. VERIFICATION
4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as
indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices,
classification, packaging, and labeling of moisture sensitive devices, as applicable.
5. PREPARATION FOR DELIVERY
5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturer’s standard commercial
practices for electrostatic discharge sensitive devices.
6. NOTES
6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum.
6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturer’s data book.
The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided.
6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee
of present or continued availability as a source of supply for the item.
Vendor item drawing
administrative control
number 1/
Device
manufacturer
CAGE code
V62/04755-01XE
01295
SOIC - D
V62/04755-02XE
01295
V62/04755-03XE
Package
2/
Vendor part number
Top side
marking
Tape and reel
TLE2021AQDREP
2021AE
SOIC - D
Tape and reel
TLE2021QDREP
2021QE
01295
SOIC - D
Tape and reel
TLE2022AQDREP
2022AE
V62/04755-04XE
01295
SOIC - D
Tape and reel
TLE2022QDREP
2022QE
V62/04755-05YE
01295
SOP – DW
Tape and reel
TLE2024AQDWREP
2024AE
V62/04755-06YE
01295
SOP - DW
Tape and reel
TLE2024QDWREP
2024QE
V62/04755-07XE
01295
SOIC - D
Tape and reel
TLE2021MDREP
2021ME
1/ The vendor item drawing establishes an administrative control number for identifying the item on the
engineering documentation.
2/ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
CAGE code
01295
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Source of supply
Texas Instruments, Inc.
Semiconductor Group
8505 Forest Lane
P.O. Box 660199
Dallas, TX 75243
Point of contact: U.S. Highway 75 South
P.O. Box 84, M/S 853
Sherman, TX 75090-9493
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