APT58F50J_C.pdf

APT58F50J
500V, 58A, 0.065Ω Max, trr ≤320ns
N-Channel FREDFET
S
S
Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET.
A proprietary planar stripe design yields excellent reliability and manufacturability. Low
switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure
help control slew rates during switching, resulting in low EMI and reliable paralleling,
even when switching at very high frequency. Reliability in flyback, boost, forward, and
other circuits is enhanced by the high avalanche energy capability.
D
G
SO
2
T-
27
"UL Recognized"
file # E145592
IS OTO P ®
D
APT58F50J
Single die FREDFET
G
S
FEATURES
TYPICAL APPLICATIONS
• Fast switching with low EMI
• ZVS phase shifted and other full bridge
• Low trr for high reliability
• Half bridge
• Ultra low Crss for improved noise immunity
• PFC and other boost converter
• Low gate charge
• Buck converter
• Avalanche energy rated
• Single and two switch forward
• RoHS compliant
• Flyback
Absolute Maximum Ratings
Symbol
ID
Parameter
Unit
Ratings
Continuous Drain Current @ TC = 25°C
58
Continuous Drain Current @ TC = 100°C
37
A
IDM
Pulsed Drain Current
VGS
Gate-Source Voltage
±30
V
EAS
Single Pulse Avalanche Energy 2
1845
mJ
IAR
Avalanche Current, Repetitive or Non-Repetitive
42
A
1
270
Thermal and Mechanical Characteristics
Typ
Max
Unit
W
PD
Total Power Dissipation @ TC = 25°C
540
RθJC
Junction to Case Thermal Resistance
0.23
RθCS
Case to Sink Thermal Resistance, Flat, Greased Surface
TJ,TSTG
Operating and Storage Junction Temperature Range
VIsolation
RMS Voltage (50-60hHz Sinusoidal Waveform from Terminals to Mounting Base for 1 Min.)
WT
Torque
Package Weight
Terminals and Mounting Screws.
Microsemi Website - http://www.microsemi.com
0.15
-55
150
°C/W
°C
V
2500
1.03
oz
29.2
g
10
in·lbf
1.1
N·m
Rev C 9-2011
Min
Characteristic
050-8177
Symbol
Static Characteristics
TJ = 25°C unless otherwise specified
Symbol
Parameter
Test Conditions
Min
VBR(DSS)
Drain-Source Breakdown Voltage
VGS = 0V, ID = 250μA
500
∆VBR(DSS)/∆TJ
Drain-Source On Resistance
VGS(th)
Gate-Source Threshold Voltage
∆VGS(th)/∆TJ
VGS = 10V, ID = 42A
3
Zero Gate Voltage Drain Current
IGSS
Gate-Source Leakage Current
Dynamic Characteristics
Forward Transconductance
Ciss
Input Capacitance
Crss
Reverse Transfer Capacitance
Coss
Output Capacitance
VDS = 500V
TJ = 25°C
VGS = 0V
TJ = 125°C
Typ
Max
0.60
0.055
4
-10
0.065
5
250
1000
±100
VGS = ±30V
Unit
V
V/°C
Ω
V
mV/°C
μA
nA
TJ = 25°C unless otherwise specified
Parameter
gfs
2.5
VGS = VDS, ID = 2.5mA
Threshold Voltage Temperature Coefficient
IDSS
Symbol
Reference to 25°C, ID = 250μA
Breakdown Voltage Temperature Coefficient
RDS(on)
APT58F50J
Min
Test Conditions
VDS = 50V, ID = 42A
4
Effective Output Capacitance, Charge Related
Co(er)
5
Effective Output Capacitance, Energy Related
Max
65
13500
185
1455
VGS = 0V, VDS = 25V
f = 1MHz
Co(cr)
Typ
Unit
S
pF
845
VGS = 0V, VDS = 0V to 333V
425
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
td(on)
Turn-On Delay Time
Resistive Switching
Current Rise Time
VDD = 333V, ID = 42A
tr
td(off)
tf
Turn-Off Delay Time
340
75
155
60
70
155
50
VGS = 0 to 10V, ID = 42A,
VDS = 250V
RG = 2.2Ω 6 , VGG = 15V
Current Fall Time
nC
ns
Source-Drain Diode Characteristics
Symbol
IS
ISM
VSD
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 1
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
Irrm
Reverse Recovery Current
dv/dt
Peak Recovery dv/dt
Test Conditions
MOSFET symbol
showing the
integral reverse p-n
junction diode
(body diode)
Min
Typ
D
A
270
S
ISD = 42A, TJ = 25°C, VGS = 0V
TJ = 25°C
TJ = 125°C
TJ = 25°C
diSD/dt = 100A/μs
TJ = 125°C
VDD = 100V
TJ = 25°C
Unit
58
G
ISD = 42A 3
Max
TJ = 125°C
ISD ≤ 42A, di/dt ≤1000A/μs, VDD = 333V,
TJ = 125°C
290
500
1.67
4.36
12
17.8
1.0
320
600
V
ns
μC
A
20
V/ns
1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature.
2 Starting at TJ = 25°C, L = 2.08mH, RG = 25Ω, IAS = 42A.
050-8177
Rev C 9-2011
3 Pulse test: Pulse Width < 380μs, duty cycle < 2%.
4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS.
5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of
VDS less than V(BR)DSS, use this equation: Co(er) = -3.14E-7/VDS^2 + 7.31E-8/VDS + 2.09E-10.
6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
APT58F50J
350
V
GS
160
= 10V
T = 125°C
TJ = -55°C
ID, DRIAN CURRENT (A)
250
200
TJ = 25°C
150
100
TJ = 150°C
50
120
6V
100
80
60
40
5V
20
TJ = 125°C
0
0
5
10
15
20
25
VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V)
4.5V
0
Figure 1, Output Characteristics
2.5
5
10
15
20
25
30
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 2, Output Characteristics
280
NORMALIZED TO
VGS = 10V @ 42A
VDS> ID(ON) x RDS(ON) MAX.
250μSEC. PULSE TEST
@ <0.5 % DUTY CYCLE
240
2.0
ID, DRAIN CURRENT (A)
1.5
1.0
0.5
200
TJ = -55°C
160
TJ = 25°C
120
TJ = 125°C
80
40
0
-55 -25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
Figure 3, RDS(ON) vs Junction Temperature
0
120
0
1
2
3
4
5
6
7
8
VGS, GATE-TO-SOURCE VOLTAGE (V)
Figure 4, Transfer Characteristics
20,000
Ciss
10,000
80
TJ = 125°C
60
40
1000
Coss
100
Crss
20
0
0
16
VGS, GATE-TO-SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
TJ = -55°C
TJ = 25°C
10
20 30 40 50 60 70 80
ID, DRAIN CURRENT (A)
Figure 5, Gain vs Drain Current
100
200
300
400
500
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 6, Capacitance vs Drain-to-Source Voltage
12
VDS = 100V
10
VDS = 250V
8
6
VDS = 400V
4
2
0
0
280
ID = 42A
14
0
10
90
100
200
300
400
500
Qg, TOTAL GATE CHARGE (nC)
Figure 7, Gate Charge vs Gate-to-Source Voltage
ISD, REVERSE DRAIN CURRENT (A)
gfs, TRANSCONDUCTANCE
100
240
200
160
TJ = 25°C
120
TJ = 150°C
80
40
0
0
0.3
0.6
0.9
1.2
1.5
VSD, SOURCE-TO-DRAIN VOLTAGE (V)
Figure 8, Reverse Drain Current vs Source-to-Drain Voltage
Rev C 9-2011
RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE
= 7,8 & 10V
GS
050-8177
ID, DRAIN CURRENT (A)
300
0
V
J
140
APT58F50J
300
300
100
IDM
10
13μs
Rds(on)
100μs
1ms
10ms
1
0.1
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
100
100ms
DC line
TJ = 125°C
TC = 75°C
1
13μs
10
100μs
1ms
Rds(on)
10ms
TJ = 150°C
TC = 25°C
1
0.1
10
100
800
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 9, Forward Safe Operating Area
IDM
100ms
DC line
Scaling for Different Case & Junction
Temperatures:
ID = ID(T = 25°C)*(TJ - TC)/125
C
1
10
100
800
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 10, Maximum Forward Safe Operating Area
D = 0.9
0.20
0.7
0.15
0.5
Note:
0.10
P DM
ZθJC, THERMAL IMPEDANCE (°C/W)
0.25
0.3
t2
0.05
t1 = Pulse Duration
t
0.1
0
t1
0.05
10-5
Duty Factor D = 1 /t2
Peak T J = P DM x Z θJC + T C
SINGLE PULSE
10-4
10-3
10-2
10-1
RECTANGULAR PULSE DURATION (seconds)
Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration
1.0
SOT-227 (ISOTOP®) Package Outline
11.8 (.463)
12.2 (.480)
31.5 (1.240)
31.7 (1.248)
7.8 (.307)
8.2 (.322)
r = 4.0 (.157)
(2 places)
4.0 (.157)
4.2 (.165)
(2 places)
Rev C 9-2011
3.3 (.129)
3.6 (.143)
050-8177
8.9 (.350)
9.6 (.378)
Hex Nut M 4
(4 places )
W=4.1 (.161)
W=4.3 (.169)
H=4.8 (.187)
H=4.9 (.193)
(4 places)
14.9 (.587)
15.1 (.594)
0.75 (.030)
0.85 (.033)
12.6 (.496)
12.8 (.504)
25.2 (0.992)
25.4 (1.000)
1.95 (.077)
2.14 (.084)
* Source
30.1 (1.185)
30.3 (1.193)
Drai n
* Emitter terminals are shorted
internally. Current handling
capability is equal for either
Source terminal.
38.0 (1.496)
38.2 (1.504)
* Source
Dimensions in Millimeters and (Inches)
Gate