KIT33907AEEVB and KIT33908AEEVB, Evaluation Board - User Guide

Freescale Semiconductor, Inc.
User’s Guide
Document Number: KT33907_8AEUG
Rev. 2.0, 3/2014
KIT33907AEEVB and KIT33908AEEVB Evaluation Board
MC33907 and MC33908 Safe System Basis Chips
Figure 1. KIT33907AEEVB or KIT33908AEEVB Evaluation Board
Contents
1 Kit Contents/Packing List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2 Jump Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
3 Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
4 Important Notice . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
5 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
6 Evaluation Board Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
7 MC33907 and MC33908 Device Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
8 Required Equipment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
9 Evaluation Board Hardware Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
10 Accessory Interface Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
11 Connecting the KITUSBSPIDGLEVME Interface Dongle. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
12 Initialization and Configuration Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
13 Graphical User Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
14 Schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
15 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
16 Bill of Material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
17 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
18 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
© Freescale Semiconductor, Inc., 2014. All rights reserved.
Kit Contents/Packing List
1
Kit Contents/Packing List
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2
Assembled and tested evaluation board/module in anti-static bag.
Warranty card
Jump Start
•
•
•
•
Go to www.freescale.com/analogtools
Locate your kit
Review your Tool Summary Page
Look for
Jump Start Your Design
•
Download documents, software, and other information
KT33907_8AEUG User’s Guide Rev. 2.0 3/2014
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Freescale Semiconductor, Inc.
Terms
3
Terms
Part Number or Parameter
SPIGen
Definitions
Software utility (installed on a PC) that provides communication functions between the PC and a Freescale evaluation
board.
WD
Watchdog
FCCU
Fault Collection and Control Unit
SMPS
Switching mode power supply
LDO
Low-dropout regulator
EVB
Evaluation Board
VPRE
Pre-regulator voltage
VAUX
Auxiliary power supply
VCCA
Power supply for ADC
CAN_5V
5.0 V CAN voltage
IO
Input/output
FS0B
Fail-safe output no. 0
RSTB
Reset
INTB
Interrupt
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Important Notice
4
Important Notice
Freescale provides the enclosed product(s) under the following conditions:
This evaluation kit is intended for use of ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES
ONLY. It is provided as a sample IC pre-soldered to a printed circuit board to make it easier to access inputs,
outputs, and supply terminals. This evaluation board may be used with any development system or other
source of I/O signals by simply connecting it to the host MCU or computer board via off-the-shelf cables. This
evaluation board is not a Reference Design and is not intended to represent a final design recommendation
for any particular application. Final device in an application will be heavily dependent on proper printed circuit
board layout and heat sinking design as well as attention to supply filtering, transient suppression, and I/O
signal quality.
The goods provided may not be complete in terms of required design, marketing, and or manufacturing related
protective considerations, including product safety measures typically found in the end product incorporating
the goods. Due to the open construction of the product, it is the user's responsibility to take any and all
appropriate precautions with regard to electrostatic discharge. In order to minimize risks associated with the
customers applications, adequate design and operating safeguards must be provided by the customer to
minimize inherent or procedural hazards. For any safety concerns, contact Freescale sales and technical
support services.
Should this evaluation kit not meet the specifications indicated in the kit, it may be returned within 30 days from
the date of delivery and will be replaced by a new kit.
Freescale reserves the right to make changes without further notice to any products herein. Freescale makes
no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor
does Freescale assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages.
“Typical” parameters can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typical”, must be validated for each customer application by customer’s
technical experts.
Freescale does not convey any license under its patent rights nor the rights of others. Freescale products are
not designed, intended, or authorized for use as components in systems intended for surgical implant into the
body, or other applications intended to support or sustain life, or for any other application in which the failure
of the Freescale product could create a situation where personal injury or death may occur.
Should the Buyer purchase or use Freescale products for any such unintended or unauthorized application,
the Buyer shall indemnify and hold Freescale and its officers, employees, subsidiaries, affiliates, and
distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising
out of, directly or indirectly, any claim of personal injury or death associated with such unintended or
unauthorized use, even if such claim alleges that Freescale was negligent regarding the design or manufacture
of the part.Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other
product or service names are the property of their respective owners.
© Freescale Semiconductor, Inc. 2014
KT33907_8AEUG User’s Guide Rev. 2.0 3/2014
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Freescale Semiconductor, Inc.
Introduction
5
Introduction
KIT33907AEEVB and KIT33908AEEVB evaluation boards demonstrate the functionality of the SMARTMOS MC33907 and
MC33908 power system basis chips, respectively. These ICs are equipped with an Intelligent Power Management System
including safety features targeting the latest ISO26262 automotive functional safety standard. The evaluation board is a
standalone board that can be used either with a compatible microcontroller or with a PC. In the latter case, it is necessary
to use an KITUSBSPIDGLEVME accessory interface board. See section “Required Equipment”.
6
Evaluation Board Features
This evaluation board comes mounted with either an MC33907 or an MC33908 IC. The main features of the board are as
follows:
•
•
•
•
•
•
•
•
•
•
7
VBAT power supply either through power jack (2.0 mm) or phoenix connector
VCORE configuration:1.23 V or 3.3 V
VCCA configuration:
• 5.0 V/3.3 V
• Internal transistor or external PNP
VAUX configuration:
• 3.3 V or 5.0 V
• Enabled or disabled at startup
Ignition key switch
LIN bus
CAN bus
IO connector (IO_0 to IO_5)
Debug connector (SPI bus, CAN digital, LIN digital, RSTB, FS0B, INTB, Debug, MUX_OUT)
Signalling LED to give state of signals or regulators
MC33907 and MC33908 Device Features
The MC33907 and the MC33908 are multi-output ICs, with power supply and HSCAN transceiver. These devices have been
designed specifically with the automotive market in mind. The MC33907 is designed to support up 800 mA on VCORE, while
MC33908 will support up to 1.5 A on VCORE. All other features are the same. Both devices support following functions:
•
•
•
•
•
•
•
•
•
•
Highly flexible SMPS pre-regulator, allowing two topologies: non-inverting buck-boost or standard buck
Switching mode power supply (SMPS) dedicated to MCU core supply: 1.2 V or 3.3 V, delivering up to 1.5 A
for the MC33908 and up to 800 mA for the MC33907
Linear voltage regulator dedicated to MCU A/D reference voltage or I/Os supply (VCCA): 5.0 V or 3.3 V
Linear voltage regulator dedicated to auxiliary functions or to a sensor supply (VCCA tracker or independent
5.0 V/3.3 V)
Multiple wake-up sources in Low-power mode: CAN and/or IOs
Battery voltage sensing and multiplexer output terminal (various signal monitoring)
Enhanced safety block associated with fail-safe outputs
Six configurable I/Os
ISO11898 high speed CAN interface compatibility for baud rates of 40 kB/s to 1.0 MB/s
High EMC immunity and ESD robustness
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5
Required Equipment
8
Required Equipment
Minimum equipment required:
•
Power supply: 2.7 V to 40 V with 3.0 A capability
Note: When not connected to an MCU, the KITUSBSPIDGLVME can be used for register setting. In this case, the SPIgen
dongle and USB cable are required. For more information, see the “SPIgen 7 User Guide”.
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Freescale Semiconductor, Inc.
Evaluation Board Hardware Description
9
Evaluation Board Hardware Description
The evaluation board comes with either a Freescale MC33907 or MC33908 IC mounted on it. Below is a board-level logic
diagram.
Buck/Buck-Boost
section
Power supplies
LEDs for
power
supplies
Battery
connection
Compensation
network
Main
switch
VCORE
selection
Ignition
key
switch
DBG mode
select
LIN bus
For future
use
SPI Dongle
connector
Can bus
Main signals of
the MC33907_8
I/Os of the
MC33907_8
Second resistor bridge
- VDRIFT selection
For future use
FS output
circuitry
VCCA and VAUX
selection
Figure 2. Block Diagram for KIT33907AEEVB and KIT33908AEEVB
9.1
Evaluation Board Configuration
Figure 3 shows a configuration example for the EVB, which enables:
•
•
•
•
•
•
•
•
•
VCORE 3.3 V
Compensation network for MPC5643L
VCCA & VAUX = 5.0 V
VCCA with external PNP
Debug mode
VPRE in Buck mode
VDDIO tied to VCCA
Various signalling LEDs enabled
IO1 configured as IN/OUT
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Evaluation Board Hardware Description
J4
SW3
J16
J1
J6
J11
J14
J9
J8
J17
J5
J10
J25
J29
J19
J28
J31
J26
J27
SW2
J18
J30
J15
D12
J13
J12
Switch
Jumper
RED Led
Green Led
Figure 3. Default Board Configuration
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Evaluation Board Hardware Description
9.2
LED Definitions
The following table lists the LEDs used as visual output devices on the evaluation board:
Table 1. LEDs
9.3
Schematic
Label
Name
D6
VPRE
Indicator of pre-regulator voltage
D7
VAUX
Indicator of auxiliary power supply
D8
VCCA
Indicator of ADC power supply
D9
CAN_5V
Indicator of 5.0 V CAN voltage
Description
D10
IO_5
Indicator of IO_5 state
D11
IO_4
Indicator of IO_4 state
D12
FS0B
Indicator for Fail-safe output no. 0
D13
Vbat_P
D14
RSTB
Indicator of a reset
D15
INTB
Indicator of an interrupt
Indicator of battery voltage after protection diode
Test Point Definitions
The following test-point jumpers provide access to signals on the MC33907 or MC33908 IC:
Table 2. Test Points
Schematic
Label
Signal Name
TP2
J24.3
-
TP3
J24.5
-
TP4
J24.7
-
TP5
J20.16
-
TP6
PGND
Power ground
TP7
PGND
Power ground
TP8
GND
Ground
TP9
GND
Ground
TP10
GND
Ground
TP11
GND
Ground
TP12
GND
Ground
TP13
GND
Ground
TP14
GND
Ground
TP15
GND
Ground
TP16
GND
Ground
TP17
GND
Ground
TP18
J24.2
-
Description
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Evaluation Board Hardware Description
Table 2. Test Points (continued)
Schematic
Label
Signal Name
TP19
J24.4
-
TP20
J24.6
-
TP21
J24.8
-
TP22
J24.10
-
TP23
J24.12
-
TP24
J24.14
-
TP25
J24.16
-
TP26
VPRE
TP27
VCORE
Core voltage for the MCU
TP28
CANH
-
TP29
CANL
-
TP30
LIN
TP31
MUX_OUT
TP32
FS0B
Fail-safe output
TP33
RSTB
Reset signal
TP34
INTB
Interrupt output
TP35
VSW
VPRE Switching voltage
TP36
VAUX
Auxiliary power supply
TP37
VCCA
ADC power supply
TP38
CAN_5V
CAN power supply
TP39
VSUP3
Description
Pre-regulator voltage
LIN bus
Output from the analog multiplexer
Supply voltage
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Evaluation Board Hardware Description
9.4
Connector and Jumper Definitions
Table 3. Main Power Supply Connector
JP1 Pin Number
Name of Power Rail
Description
1
VCORE
Core voltage for the MCU
2
PGND
Power ground
3
VCCA
ADC power supply
4
GND
Ground
5
VAUX
Auxiliary power supply
6
GND
7
CAN_5V
Ground
8
GND
Ground
9
VPRE
Pre-regulator voltage
10
PGND
Power ground
CAN power supply
Table 4. Jumpers J1 through J31 (Including Connectors)
Schematic
Label
J1
J2
Pin Number
Pin Name
Jumper/Pin Function
Compensation network for FB_core – part 1
1-2
VCORE = 1.23 V
3-4
VCORE = 3.3 V
C_OUT – selection of the output capacitance for VCORE. If connected, the output capacitance is 40 µF, 20 µF otherwise.
No jumper
COUT = 20 µF
1-2
COUT = 40 µF
J3
Power supply DC 12 V
J4
Buck-boost/standard buck mode configuration
1-2
Buck-boost configuration
3-4
No jumper
J5
J6
Buck only configuration
VCORE selection
1-2
VCORE = 1.23 V
3-4
VCORE = 3.3 V
Configuration for Boots_core pin
1-2
Boots_core pin connected to GND – used
for devices with linear voltage regulator on
VCORE
2-3
Boots_core pin connected to SW_core –
used for devices with switching mode
power Supply on VCORE
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Evaluation Board Hardware Description
Table 4. Jumpers J1 through J31 (Including Connectors) (continued)
Schematic
Label
J7
J8
J9
Pin Number
Pin Name
Jumper/Pin Function
Power supply (max. voltage = 40 V)
This connector should be used to supply evaluation board from protected voltage source.
1
VBAT
Positive supply
2
GND
Ground
Power supply for evaluation board
Allows disconnecting of all three supply pins for current measurements. Normally (no measurement), jumpers should
be connected.
1-2
Enables power supply (VBAT_P) for VSUP3
pin of the MC33907 (or MC33908)
3-4
Enables power supply (VSUP) for VSUP1
and VSUP2 pins of the MC33907 (or
MC33908)
Compensation network for FB_core – part 2
1-2
VCORE = 1.23 V
3-4
VCORE = 3.3 V
J10
Vsns_EN – connects battery voltage before filter to the VSENSE
J11
External transistor for VCCA
1-2
Emitter of Q2 connected to VCCA_E
2-3
External transistor Q2 is not used
J12
IO_0_PD – pulls down IO_0
J13
FS0B pull-up connection
1-2
FS0B pull-up is supplied from VSUP3
2-3
FS0B pull-up is supplied from VDDIO
J14
Connects base of the transistor Q2 to the VCCA_B pin
J15
External resistor bridge monitoring for future use
Used in conjunction with J18. This resistor bridge has to be in the same configuration as the J5. The voltage on this
voltage divider has to be adjusted to the same level as for the first bridge using potentiometer R17.
J16
J17
J18
J19
1-2
VCORE =1.23 V
3-4
VCORE = 3.3 V
VDDIO tracking
1-2
VDDIO tracks VCCA
2-3
VDDIO tracks VCORE
DBG_EN - enables debug mode
No jumper
Normal mode
1-2
Debug mode
DRIFT_MONIT – External resistor bridge monitoring for future use
1-2
Second resistor bridge on IO_1 is disabled
2-3
Reserved for future use
VCCA/VAUX regulator selection
1-3 and 2-4
VAUX is disabled
3-5 and 4-6
VAUX is enabled
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Evaluation Board Hardware Description
Table 4. Jumpers J1 through J31 (Including Connectors) (continued)
Schematic
Label
J20
J21
J22
Pin Number
Pin Name
Jumper/Pin Function
Additional Inputs/Output
1
FS0B
Fail-safe output
2
VDDIO
VDDIO voltage
3
MISO
SPI – Master Input Slave Output
4
RSTB
Reset pin – connect to the reset line of the
MCU
5
MOSI
SPI – Master Output Slave Input
6
GND
Ground
7
SCLK
SPI – clock
8
GND
Ground
9
NCS
SPI – Chip Select
10
GND
Ground
11
MUX_OUT
Output from the multiplexer – connect to
the MCU's ADC
12
INTB
Interrupt pin – connect to the MCU IO with
an interrupt capability
13
RXD_L
LIN receive pin – connect to the MCU. For
future use
14
TXD_L
LIN transmit pin – connect to the MCU. For
future use
15
GND
Ground
16
TP5
-
17
RXD
CAN receive pin – connect to the MCU
18
TXD
CAN transmit pin – connect to the MCU
19
DBG
Debug pin
20
GND
Ground
1
LIN
LIN after transceiver (NOT the MCU side).
For future use
2
GND
Ground
1
CANH
CANH signal after transceiver (NOT the
MCU side)
2
CANL
CANL signal after transceiver (NOT the
MCU side)
LIN connector
CAN connector
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Evaluation Board Hardware Description
Table 4. Jumpers J1 through J31 (Including Connectors) (continued)
Schematic
Label
J23
J24
J25
Pin Number
Pin Name
General Inputs/Outputs
pin1
IO_1
-
pin2
IO_0
-
pin3
IO_3
-
pin4
IO_2
-
pin5
IO_5
-
pin6
IO_4
-
pin7
VDDIO
-
pin8
NC
-
pin9
VBAT
-
pin10
GND
-
SPI/USB dongle or MCU connection
SPI/USB dongle should be directly connected to this port
pin1
GND
Ground
pin2
TP18
-
pin3
TP2
-
pin4
TP19
-
pin5
TP3
-
pin6
TP20
-
pin7
TP4
-
pin8
TP21
-
pin9
SCLK
SPI – clock
pin10
TP22
Not connected
pin11
MOSI
SPI – Master Output Slave Input
pin12
TP23
-
pin13
MISO
SPI – Master Input Slave Output
pin14
TP24
-
pin15
NCS
SPI – Chip Select
pin16
TP25
-
Power supply for LEDs on IO_4 and IO_5 (D11, D10)
1-2
Enables power supply for IO_4 (D11)
3-4
Enables power supply for IO_5 (D10)
J26
RSTB_LED_EN – enables LED D14 for RSTB output
J27
INTB_LED_EN – enables LED D15 for INTB output
J28
IO5_OUT – IO_5 output configuration
J29
Jumper/Pin Function
1-2
IO_5 connected to the LED D10 via transistor Q5
2-3
IO_5 pulled down
IO4_OUT – IO_4 output configuration
1-2
IO_4 pulled down
2-3
IO_4 connected to the LED D11 via transistor Q6
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Evaluation Board Hardware Description
Table 4. Jumpers J1 through J31 (Including Connectors) (continued)
Schematic
Label
Pin Number
Pin Name
J30
Enable LED D12 for Fail-safe 0.
J31
Enables LED D13 as indicator of power supply
9.4.1
Jumper/Pin Function
Compensation Network
Voltage regulator needs a feedback from the VCORE voltage to be able to adjust (control) output voltage. For this reason
two bridges are implemented in the external MC33907 or MC33908 circuitry. Static feedback (steady-state) voltage is
defined by a simple resistor bridge (given by RA3/RB3 and RA4). Dynamic behavior of the regulator is controlled by another
bridge that is an RC divider (defined by RBx, CBx, R1, C1, R2, C2). Compensation network is shown in the Figure 4.
Steady-state voltage can be either 1.23 or 3.3 V. To tune the dynamic performance, the board is equipped by two different
bridges (possible combinations of the jumpers J1 and J9 are shown in Table 5). The combinations shown in Table 5 are
chosen to provide an optimal performance for the given output voltage. The real dynamic performance can differ for different
applications and can be tuned by changing the compensation network and by adding output capacitors (J2).
Table 5. Compensation Network and VCORE Settings
VCORE
(V)
Jumper Settings
Static Behavior
Dynamic Behavior
J5
J1
J9
1.23
3-4
3-4
3-4
3.3
1-2
1-2
1-2
Figure 4. Compensation Network and VCORE Setup Schematic
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Evaluation Board Hardware Description
9.4.2
Second Resistor Bridge - VDRIFT Monitoring (for future use)
To increase safety level of an application, a second resistor bridge has been added for future use. This bridge generates
the same voltage as the bridge connected to FB_core pin. If difference between voltages is greater than VDRIFT, then the
FS state machine is impacted.
Table 6. VDRIFT Monitoring Settings
VCORE
(V)
Hardware Settings
J15
J18
1.23
1+2
3+4
3.3
3+4
1+2
To use this functionality, few settings have to be done in the hardware as well as in the software configuration. For the
hardware part, the second resistor bridge has to be configured by jumper J18, as shown in the Figure 5, and adjusted by
the potentiometer R17 to set the same voltage as on the first bridge. Software sets registers INIT_Vreg1 (bit Vcore_FB to
1) and register INIT_FSSM1 (bit IO_1_FS to 1). This functionality is not supported by the MC33907_8AE version and is
intended for future use.
Figure 5. Second Resistor Bridge
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Evaluation Board Hardware Description
9.5
Switch Definitions
Table 7. Switches
Switch No.
SW1
SW2
SW3
SW4
Position
Function
Description
Power supply select
1-2
Supply from J7 selected
2-3
Power jack on J3 selected
VCCA/VAUX switch. Only one choice is possible at the same time
1
3.3 V / 3.3 V
2
5.0 V / 5.0 V
3
3.3 V / 5.0 V
4
5.0 V / 3.3 V
This setting is not allowed if VAUX is not used - option
VCCA only (selected by J19)
LEDs - indicators for Power supplies
1
VPRE
Enables LED indicator for pre-regulator
2
VAUX
Enables LED indicator for auxiliary power supply
3
VCCA
Enables LED indicator for VCCA regulator
4
CAN_5 V
Enables LED indicator for CAN regulator
1-2
IO_0 connected to VBAT
(ignition key active)
2-3
No voltage on the IO_0
Ignition switch
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Accessory Interface Board
10
Accessory Interface Board
The KIT33907AEEVB or KIT33908AEEVB is generally used with the KITUSBSPIDGLEVME interface dongle (shown
below), which provides a bidirectional SPI/USB conversion. This small board makes use of the USB, SPI, and parallel ports
built into Freescale’s MC68HC908JW32 microcontroller. The main function provided by this dongle is to allow Freescale
evaluation kits that have a parallel port to communicate via a USB port to a PC. For more information regarding
KITUSBSPIDGLEVME interface dongle, go to
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=KITUSBSPIDGLEVME.
Figure 6. KITUSBSPIDGLEVME Interface Dongle
For information on setting up the dongle with the evaluation board, see section “Connecting the KITUSBSPIDGLEVME
Interface Dongle”.
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Connecting the KITUSBSPIDGLEVME Interface Dongle
11
Connecting the KITUSBSPIDGLEVME Interface Dongle
A typical connection of KITUSBSPIDGLEVME Interface Dongle (section “Accessory Interface Board”) to the
KIT33907AEEVB or KIT33908AEEVB evaluation board is done through connector J24 (see Figure 7). In this configuration,
it is recommended to use the evaluation board in a debug mode (J17 configured as Debug). In this mode there is no time-out
used for the INIT phase, so the initialization commands can be sent anytime. WD refresh is also not mandatory in the debug
mode. This means that no action is taken if WD refresh fails (WD window expires, WD refreshed during closed window,
wrong WD answer).
,(9%,(9%
Figure 7. Installation of KITUSBSPIDGLEVME on Evaluation Board
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19
Connecting the KITUSBSPIDGLEVME Interface Dongle
11.1
Evaluation Board Setup
The figure below shows the setup required to use KIT33907AEEVB and KIT33908AEEVB.
!"#$%&!%'"(
)%$
*)&+
,.
Figure 8. Evaluation Board Setup
11.2
Setting Up and Using the Hardware
11.2.1
Step-by-Step Instructions
In order to perform the demonstration examples, first set up the evaluation board hardware and software as follows:
1. Ready the computer, install SPIgen.
2. Connect SPIgen on J24.
3. Connect SPIgen USB cable to the PC.
4. Set the EVB jumpers and switches as needed. Refer to Figure 3 for an example.
5. Select Debug or Normal mode with J17 (1).
6. Attach loads to JP1 as needed.
7. Attach DC power supply on J3 or J7 (maximum voltage: 40 V).
8. Switch SW1 to supply the board.
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Connecting the KITUSBSPIDGLEVME Interface Dongle
9. If SW2 switches are ON and VBAT is set correctly, then VPRE, VCCA, VAUX, CAN_5 V LEDs should turn ON.
VBAT value is dependent on VPRE configuration. In Buck mode, it must be 8.2 V min. FS0B LED should
turn ON (J13 / J30 must be plugged).
10. Launch SPIgen.
11. Open the SPIgen configuration file.
12. In Debug mode, use the SPIgen batch RST_counter_to_0.spi to reset the error counter. FS0B should turn
off (LED D12 turned off).
Note: At this stage, EVB is powered and SPIgen is working. When Normal mode is selected with J17, valid watchdog must
be sent, otherwise the device goes into deep Fail-safe.
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Initialization and Configuration Mode
12
Initialization and Configuration Mode
12.1
INIT Phase
INIT registers are set after POR (power-on reset) condition with their default values. This default configuration is compatible
with the default evaluation board settings excluding one register - INIT FSSM2. Bit IO_23_FS in this register is set by default,
which means that the fail-safe outputs (FCCU_x of the MPC5643L or similar device) have to be connected to the IOs 2 and
3 of the MC33907 or MC33908. If MPC5643L (or similar device) is not used, the bit IO_23_FS has to be cleared during INIT
phase (setting shown in Table 8). INIT phase of the main part is finished after writing to the INIT_INT register. This command
closes access to the INIT registers and device goes in Normal mode. This sequence (INIT_FSSM2, INIT_INT) has to be
done in the same manner in Debug and also in Standard mode. The only difference is in the time-out constraints used for
the Standard mode. In the Standard mode, INIT commands have to be sent before the 256 ms timer (starting from the RST
pin release) expires.
Table 8. INIT FSSM2 Setting
bit15
MOSI
1
1
bit15
MOSI
12.2
1
bit14
bit14
1
bit13
0
bit13
0
bit12
0
bit12
0
bit11
1
bit11
1
bit10
0
bit10
0
bit9
1
bit8
P
bit7
bit6
RSTB_
err_FS
IO_23_
FS
bit5
PS
bit4
F_FS1
bit3
bit2
bit1
bit0
Secure
_3
Secure
_2
Secure
_1
Secure
_0
bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
1
1
0
0
0
1
1
0
0
0
Normal Operation
During normal operation (after INIT phase), in both modes it is possible to send a WD refresh command. In the Debug mode,
no action is performed on a bad WD answer. In Normal mode, the KITUSBSPIDGLEVMESPI interface dongle is not able
to guarantee WD refresh period (Windows XP, 7 are not real-time operating systems); nevertheless, WD refresh was
successfully tested in Standard mode using WD window duration 512 ms (reconfigured in the INIT phase).
12.3
Debug Mode
The KIT33907AEEVB or KIT33908AEEVB is mainly intended to be used in Debug mode. Use in normal mode requires an
MCU to be able to manage the watchdog. To use the part in Normal mode, it is required to send a good watchdog answer
at startup, in the 256 ms windows after reset release, then to update the watchdog at the right time. With KIT33907AEEVB
or KIT33908AEEVB attached to the KITUSBSPIDGLEVME, this can be done only manually, which is not really feasible.
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Graphical User Interface
13
Graphical User Interface
There are two possible interfaces to configure registers:
•
•
13.1
SPI generator (SPIgen) allows easy and simple drive, setting registers individually or sending batch of
commands.
MC33907_8 GUI provides friendly access to registers with a visual environment.
SPI Gen
The latest version of SPIGen is designed to run on any Windows 8, Windows 7, Vista or XP-based operating system. To
install the software, go to www.freescale.com/analogtools and select your kit. Click on that link to open the corresponding
Tool Summary Page. Look for “Jump Start Your Design”. Download to your computer desktop the SPIGen software as well
as the associated configuration file.
Run the install program from the desktop. The Installation Wizard will guide you through the rest of the process.
To use SPIGen, go to the Windows Start menu, then Programs, then SPIGen, and click on the SPIGen icon. The SPIGen
Graphic User Interface (GUI) will appear. Go to the file menu in the upper left hand corner of the GUI, and select “Open”. In
the file selection window that appears, set the “Files of type:” drop-down menu to “SPIGen Files (*.spi)”. (As an exceptional
case, the file name may have a .txt extension, in which case you should set the menu to “All Files (*.*)”.) Next, browse for
the configuration file you saved on your desktop earlier and select it. Click “Open”, and SPIGen creates a specially
configured SPI command generator for your evaluation board.
In order to fill specific need, it is also possible to edit registers with another value and to save it for further use, either as
standalone or inside a batch.
Figure 9 shows a batch called “RST_counter_to_0”, as an example.
Figure 9. RST_counter_to_0 Batch
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Graphical User Interface
At startup or when resuming from LPOFF mode the reset error counter starts at level 1 and FS0B is asserted low. To remove
activation of FS0B, the RST error counter must go back to value “0” (seven consecutive good watchdog refresh decreases
the reset error counter down to 0) and a right command is sent to FS_OUT register. This can be demonstrated with this
batch running in debug mode.
The batch shown in Figure 9 executes the following action:
–
–
–
–
–
–
WD_Window_DIS_xCD0C:
• Disables normal watchdog
INIT_FSSM2_xCB0C:
• IO_23_FS bits configured in “NOT SAFETY” mode
WD_answer1 to WD_answer7:
• If the part is in debug mode, this sends the right first watchdog answer and allows the reset counter to
change to 0
FS_OUT_xD327:
• Disables FS0B pin, coming back to high level (D12 turned off)
INIT_INT_x8C00:
• Closes the init phase of the main state machine
CAN_MODE_B0C0:
• Enables CAN transceiver
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Graphical User Interface
13.2
Working with KIT33907_8 GUI
The Graphical User Interface allows the user to program all SPI features by using a friendly interface as well as modifying
the register table manually for advance users. Refer to KTMPC5643DBEMOUG for a complete description of the GUI.
1. To launch the MC33907_8 GUI application, select the application icon from the Freescale folder in the Start
menu as it is shown in the figure below.
Figure 10. Launching MC33907_8 GUI application
2. Figure 11 shows the status of several registers at startup. In this example, register INIT_FSSM2 has bit
IO_23_FS configured as Safety Critical.
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Graphical User Interface
Figure 11. MC33907_8 GUI Main Screen
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Graphical User Interface
3. In the right side of the GUI, select Not Safety and send command as shown in Figure 12.
Figure 12. MC33907_8 GUI Register
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A
B
A
J10
R13
4.32K
R24
5.1K
IO_1
R52
510K
GND
1
2
3
2
GND
R15
24.9K
J15
R25
5.6K
R17
5.0K
1 3
2 4
Vcore
1
2
2K
2K
GND
R141
C
D2
LIN
A
1N4148W S
C37
1000PF
R50
RED
INTb
RSTb
J26
D14
2
1
R39
1.5K
VDDIO
2
1
J27
R40
1.5K
RED
D15
5
1uH
Vbat
1
2
IO_5
PLUG_1X2
J22
GND
C89
2.2UF
CAN_5V
C44
10nF
Vsense
DNP
Vsup3
GND
R43
510K
LED Signalling
PLUG_1X2
J21
LIN
L4
C28
4.7uF
1
GND
GND
C22
1uF
GND
GND GND
J18-IO_1 Configuration
1 - 2 IN / OUT
2 - 3 VcoreFB drift
J18
1 - 2 Vcore = 1.23V
3 - 4 Vcore = 3.3V
Vsup3
S1
GND
Vsup3
CB20
C20 10nF
47uF DNP
+
C
D4
SBRS81100T3G
Vbat
J15
IO_1 VcoreFB Drift Enable
GND
GND
S1
S2
00 3
00
0 2
00
0
00 1
A
C
C
1
2
PLUG_1X2
J7
Vbat
SW 1
500SSP3S1M6QEA
GND
A
C
D
GND
1
2
J3
3
1
00
00 3
00 2
00
00
00 1
J28
3
CANH
R45
510K
R41
5.1K
1
J12
Q5
CANL
R51
60.4
4
2
3
1
J25
PGND
LED/GRN
D10
4 2
3 1
1
R46
510K
LED/GRN
D11
R42
Q6
5.1K
R34
1.5K
IO_1
IO_3
IO_5
DEBUG
NORMAL
VDDIO
Vbat
ON
OFF
Vpre
R33
1.5K
10K
J17
GND
CB31
10nF
DNP
VSUP1
VSUP2
VSENSE
VSUP3
NC_5
GND_COM
CAN_5V
CANH
CANL
IO_4
IO_5
IO_0
U1
1
3
5
7
9
J29
IO_1
GND
J23
4
2
4
6
8
10
PGND
R67
4.7
GND
R30
11.0K
GND
R44
510K
IO_0
IO_2
IO_4
C
CAN_5V
Vcca
Vaux
Vpre
IO_2
IO_3
TXD
RXD
TXD_L
RXD_L
TP2
TP3
TP4
GND
1
2
3
4
SCLK
MOSI
MISO
NCSb
GND
J31
5.1K
J4
MUX_OUT
RSTb
VDDIO
8
7
6
5
J24
PGND
1 3
A
3
LED/GRN
D13
D9
LED/GRN
A
R47
1.2K
D8
D7
LED/GRN
A
LED/GRN
A
D6
TP18
TP19
TP20
TP21
TP22
TP23
TP24
TP25
GND
C
C R37
C R36
C R32
C R31
Vcca
10uF
560
560
560
1.5K
GND
PGND
RXD
DBG
FS0_b
MISO
MOSI
SCLK
NCSb
MUX_OUT
RXD_L
GND
D16
FS0b
J30
MMSZ5248ET1
1
3
5
7
9
11
13
15
17
19
J20
2
1
R38
5.6K
2
4
6
8
10
12
14
16
18
20
DEBUG
1
GND
R35
510K
FS0b_PU
GND
R48
10K
RED
D12
Q7
TXD
INTb
TXD_L
GND
RSTb
VDDIO
GND
PGND
C24
0.22uF
GNDGND
C48
0.1UF
Vpre
Vaux
Vcca
Vcore
2
1
J6
C14
0.1UF
J6
1 - 2 33906
2 - 3 33907_8
C5
0.1UF
Boost_core
VSW _Core
2
JP1
TP5
2
PLUG_1X10
1
2
3
4
5
6
7
8
9
10
Power Supply
GND
Vcore
CAN_5V
J16
PGND PGND
CB29
10nF
DNP
Vpre
3
GND
PGND
C6
1000PF
INTb
10uF 10uF
C21
10uF
CB21 CC21 C29
PGND
GND
VDDIO
Vcore
DNP
C43
1000PF
VDDIO
GND
LED/GRN
A
2
4
6
8
10
12
14
16
SPI
0
C32
1000PF
1
3
5
7
9
11
13
15
SW 3
R26
GND
R64
NCSb
SCLK
MOSI
MISO
Boost_core
VSW _Core
Vcore_sense
Comp_core
FB_core
SELECT
GND
C36
10nF
Vbat
36
35
34
33
32
31
30
29
28
27
26
25
49
MC33907
BOOT_CORE
VSW_CORE
VCORE_SNS
COMP_CORE
FB_CORE
SELECT
VDDIO
INT
CS
SCLK
MOSI
MISO
EP
PGND
2 4
MBRS340T3G
C
J4-Vpre mode
Buck only
1-2 & 3-4
Jumpers off Buck or Boost
1
BUK9832-55A
Q1
D3
A
1
3
MTG1
BH3
L5
J14
COUT4
PGND
1
2
10uF
1
2
3
4
SW 2
C33
4.7uF
1
J11
1
2
3
Vcca
8
7
6
5
GND
Vpre
24K
51K
R49
Vcca only
3.3
5
NA
5
GND
MTG1
BH4
1
Date:
Size
C
GND
CB2
1000PF
Vcore
GND
J19
1
2
4
6
C23
4.7uF
Vaux_Emitter
1
3
5
1 3
2 4
GND
Vaux_E
Vaux_Emitter
Vaux
Q3
NJT4030P
C2
150pF
TP35
TP34
FCP: ___
GND
GND
GND
TP33
TP32
TP31
TP30
TP29
TP28
FIUO: X
PUBI: ___
VSW
INTb
RSTb
FS0b
MUX_OUT
LIN
CANL
CANH
Regulator
VCCA only
VAUX & VCCA
Jumper
1-3 & 2-4
3-5 & 4-6
EVB
1
Thursday, December 12, 2013
Sheet
2
SCH-27901 PDF: SPF-27901
of
2
B
Rev
PowerSBC10_EVB-KIT33907AEEVB
GND
Vsup3
GND
Vaux
PGND
J9
RB2
39K
R2
18K
C1
680PF
R1
510
Vcore
J19
Vcca/Vaux regulator select.
Vpre
1 3
2 4
CB1
220PF
RB1
200
J1
Vaux
Comp_core
RA4
8.06K
1 3
Document Number
Page Title:
ICAP Classification:
Drawing Title:
TP17
GND
MTG1
TP15
GND
TP16
TP11
TP39
TP9
TP14
GND
CAN_5V
GND
TP7
TP36
TP13
BH2
PGND
Vcca
GND
1
1
1
TP27
TP12
GND
TP10
TP38
TP8
TP37
TP6
Vpre
1
12K
R27
5.1K
Vcca
2 4
VAUX_B
J5
RA3
1
RB3
FB_Core
R23
Test Points
SWITCH Vcca / Vaux
1-8
3.3
3.3
2-7
5
5
3-6
3.3
5
4-5
5
3.3
TP26
C8
10nF
PGND
R22
Q2
NJT4030P
VCCA_E
SW2
Vcca/Vaux Voltages config.
SELECT
VCCA_B
J2
10uF
J1 / J5 / J9
1 - 2 Vcore = 1.23V
3 - 4 Vcore = 3.3V
PGND
10uF
COUT3
Vcore_sense
COUT2
COUT1 10uF
2.2uH
2
D5
SS22T3G
1
PGND
MTG1
BH1
R140
4.7
C88
4700PF
C
A
22uH
2
4
3
L3
D1
MBRS340T3G
PGND
A
Vpre
C11
4700PF
VAUX_B
VAUX
PGND
VSW
C4
0.1UF
GND
IO_4
I/O
C30
10nF
DBG
FS0b
J17-DEBUG MODE
R28
VDDIO
FS0b_PU
R63
5.1K
GND
C31
10nF
Vpre
R29
5.1K
Vsup3
J13
CANH
CANL
IO_4
IO_5
IO_0
Vsense
C46
10nF
C45
10nF
1
2
3
4
5
6
7
8
9
10
11
12
DNP
PGND
DNP
GND
IO_0
CAN_5V
C49
0.1UF
GND
J8
GND
GND
FS0_b
CAN
GND
R11
510K
C47
220PF
DNP
LIN
C27
4.7uF
Vsup
PGND
2
Contact KEY
R53
5.1K
1
2
1
3
2
2
3
S2
1
1
2
3
4.32K
GND
3
VCCA
VCCA_B
VCCA_E
VAUX_E
48
47
46
45
44
43
42
41
40
39
38
37
VSW1
VSW2
BOOT_PRE
DGND
GATE_LS
VCCA
VCCA_B
VCCA_E
VAUX_E
VAUX_B
VAUX
VPRE
IO_1
FS0
DEBUG
AGND
MUX_OUT
IO_2
IO_3
TXD
RXD
NC_22
NC_23
RST
13
14
15
16
17
18
19
20
21
22
23
24
SW 4
500SSP3S1M6QEA
2
1
2
24.9K
Vbat Jack
1
3
4
1
2
3
1
2
A
C
3
2
C
A
2
A
C3
2
2
B
A
3
E
C
C
B
2
4
E
28
2
4
A
B
C
D
14
C
LSF
5
Schematic
Schematic
Figure 13. Evaluation Board Schematic
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Board Layout
15
Board Layout
15.1
Assembly Layer Top
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29
Board Layout
15.2
Assembly Layer Bottom
.
Note: This image is an exception to the standard top-view mode of representation used in this document. It has been flipped to show a
bottom view.
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Board Layout
15.3
Top Layer Routing
1
2
3
1
2
3
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Board Layout
15.4
Inner Layer 1 Routing
1
2
3
1
2
3
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Board Layout
15.5
Inner Layer 2 Routing
1
2
3
1
2
3
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Board Layout
15.6
Bottom Layer Routing
1
2
3
1
2
3
170-27643 REV A
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Bill of Material
16
Bill of Material
Table 9. Bill of Materials (1)
Item
Qty
Schematic Label
Value
1
2
3
4
5
6
7
8
9
10
11
4
1
4
6
4
4
1
1
5
4
2
BH1, BH2, BH3, BH4
CB1
CB2, C6, C32, C37
CB20, CB29, CB31, C44, C45, C46
CC21, CB21, C21, C29
COUT1, COUT2, COUT3, COUT4
C1
C2
C4, C5, C14, C48, C49
C8, C30, C31, C36
C11, C88
220 pF
1000 pF
10 nF
10 μF
10 μF
680 pF
150 pF
0.1 μF
10 nF
4700 pF
12
1
C20
47 μF
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
1
2
1
1
1
2
1
1
1
7
3
1
1
7
29
9
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
1
7
3
1
1
1
1
1
1
1
1
2
2
1
2
1
1
1
2
1
1
C22
C23, C33
C24
C27, C28
C43
C47
C89
D1, D3
D2
D4
D5
D6, D7, D8, D9, D10, D11, D13
D12, D14, D15
D16
JP1
J1, J4, J5, J8, J9, J15, J25
J2, J10, J12, J14, J17, J26, J27,
J30, J31
J3
J6, J11, J13, J16, J18, J28, J29
J7, J21, J22
J19
J20
J23
J24
L3
L4
L5
Q1
Q2, Q3
Q5, Q6
Q7
RA3, R15
RA4
RB1
RB2
RB3, R13
R1
R2
1.0 μF
4.7 μF
0.22 μF
4.7 μF
1000 pF
220 pF
2.2 μF
22μH
1.0 μH
2.2 μH
24.9 K
8.06 K
200
39 K
4.32 K
510
18 K
Manufacturer
N/A
KEMET
AVX
AVX
TDK
Murata
KEMET
KEMET
KEMET
AVX
YAGEO AMERICA
NIPPON CHEMI-CON CORPORATION
TDK
Murata
KEMET
Murata
AVX
KEMET
AVX
ON SEMICONDUCTOR
DIODES INC
ON Semiconductor
ON Semiconductor
OSRAM
OSRAM
ON SEMICONDUCTOR
Phoenix contact
SAMTEC
Part Number
MTG1
C0603C221K5GACTU
06035U102KAT2A
06035C103JAT2A
CGA6M3X7R1C106K
GCM32ER71E106KA57
C0603C681J5GAC
C0603C151J5GAC
C0603C104K3RAC
06035C103JAT2A
CC0603KRX7R9BB472
Assy Opt
(2)
(3)
(3)
EMVH500ADA470MJA0G
CGA5L3X7R1H105K160AB
GCM31CR71C475KA37
C0603C224K3RACTU
GCM32ER71H475KA55L
06035U102KAT2A
C0603C221K5GACTU
08053C225KAT2A
MBRS340T3G
1N4148WS-7-F
SBRS81100T3G
SS22T3G
LED/GRN LP M67K-E2G1-25
RED LS M67K-H2L1-1-0-2-R18-Z
MMSZ5248BT1G
PLUG_1X10 1803358
HDR 2X2 TSW-102-07-G-D
SAMTEC
HDR 1X2 TSW-102-07-T-S
CUI STACK
TYCO ELECTRONICS
Phoenix contact
TYCO ELECTRONICS
SAMTEC
SAMTEC
SULLINS ELECTRONICS CORP
EPCOS
EPCOS
EPCOS
NXP SEMICONDUCTORS
ON Semiconductor
ON SEMICONDUCTOR
ON SEMICONDUCTOR
KOA SPEER
KOA SPEER
KOA SPEER
KOA SPEER
KOA SPEER
BOURNS
KOA SPEER
CON_1_PWR PJ-102AH
HDR_1X3 826629-3
PLUG_1X2 1803277
HDR 2X3 1-87215-2
HDR_10X2 TSW-110-07-S-D
HDR 2X5 TSW-105-07-G-D
NPPC082KFMS-RC
B82479G1223M000
B82472G6102M000
B82472G6222M000
BUK9832-55A,115
NJT4030PT3G
MMBF0201NLT1G
BSS84LT1G
RK73H1JTTD2492F
RK73H1JTTD8061F
RK73B1JTTD201J
RK73H1JTTD3902F
RK73H1JTTD4321F
CR0603-JW-511ELF
RK73H1JTTD1802F
(2)
(2)
(3)
(3)
(3)
(3)
(3)
(3)
KT33907_8AEUG User’s Guide Rev. 2.0 3/2014
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35
Bill of Material
Table 9. Bill of Materials (1) (continued)
Item
Qty
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
7
1
1
1
7
1
1
1
2
1
5
3
1
1
1
2
1
2
2
2
71
12
72
5
73
7
74
14
75
1
Schematic Label
Value
R11, R35, R43, R44, R45, R46, R52
R17
R22
R23
R24, R29, R41, R42, R53, R63, R64
R25
R26
R27
R28, R48
R30
R31, R33, R34, R39, R40
R32, R36, R37
R38
R47
R49
R50, R141
R51
R67, R140
SW1, SW4
SW2, SW3
TP2, TP3, TP4, TP5, TP18, TP19,
TP20, TP21, TP22, TP23, TP24,
TP25
TP6, TP7, TP8, TP9, TP10
TP11, TP12, TP13, TP14, TP15,
TP16, TP17
TP26, TP27, TP28, TP29, TP30,
TP31, TP32, TP33, TP34, TP35,
TP36, TP37, TP38, TP39
U1
510 K
1.0 K
5.1 K
12 K
5.1 K
7.15 K
0
24 K
10 K
11.0 K
1.5 K
560
5.6 K
1.2 K
51 K
2.0 K
60.4
4.7
Manufacturer
Part Number
YAGEO AMERICA
BOURNS
KOA SPEER
BOURNS
VISHAY INTERTECHNOLOGY
KOA SPEER
VISHAY INTERTECHNOLOGY
PANASONIC
KOA SPEER
KOA SPEER
BOURNS
KOA SPEER
KOA SPEER
KOA SPEER
VISHAY INTERTECHNOLOGY
Yageo
KOA SPEER
BOURNS
E Switch
GRAYHILL
RC0603JR-07510KL
3224W-1-102E
RK73H1JTTD5101F
CR0603-JW-123ELF
CRCW06035K10JNEA
RK73H1JTTD7151F
CRCW06030000Z0EA
ERJ-3GEYJ243V
RK73B1JTTD103J
RK73H1JTTD1102F
CR0603-JW-152ELF
RK73B1JTTD561J
RK73B1JTTD562J
RK73H1JTTD1201F
CRCW060351K0JNEA
RC1206JR-072KL
RK73H1JTTD60R4F
CR0603-JW-4R7ELF
500SSP3S1M6QEA
SW_DIP-4_SM 78RB04ST
NOTACOMPONENT
TP_PTH
Keystone Electronics
5006
KEYSTONE ELECTRONICS
5011 TESTLOOP_BLACK
KEYSTONE ELECTRONICS
5010 TESTLOOP_RED
FREESCALE SEMICONDUCTOR
MC33907AE or MC33908AE
Assy Opt
(2)
(3)
Notes
1. Freescale does not assume liability, endorse, or warrant components from external manufacturers that are referenced in circuit drawings or tables.
While Freescale offers component recommendations in this configuration, it is the customer’s responsibility to validate their application.
2. Do not populate
3. Critical components. For critical components, it is vital to use the manufacturer listed.
KT33907_8AEUG User’s Guide Rev. 2.0 3/2014
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Freescale Semiconductor, Inc.
References
17
References
Following are URLs where you can obtain information on related Freescale products and application solutions:
Freescale.com Support Pages
URL
MC33907 Product Summary Page
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MC33907
KIT33907AEEVB Tool Summary
Page
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=KIT33907AEEVB
MC33908 Product Summary Page
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MC33908
KIT33908AEEVB Tool Summary
Page
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=KIT33908AEEVB
SPIGen Tool Summary Page
http://www.freescale.com/files/soft_dev_tools/software/device_drivers/SPIGen.html
KITUSBSPIDGLEVME Tool Summary Page
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=KITUSBSPIDGLEVME
Analog Home Page
http://www.freescale.com/analog
Automotive Home Page
http://www.freescale.com/automotive
17.1
Support
Visit www.freescale.com/support for a list of phone numbers within your region.
17.2
Warranty
Visit www.freescale.com/warranty for a list of phone numbers within your region.
KT33907_8AEUG User’s Guide Rev. 2.0 3/2014
Freescale Semiconductor, Inc.
37
Revision History
18
Revision History
Revision
Date
Description of Changes
1.0
2/2014
• Initial Release
2.0
3/2014
• Corrected error in Figure 3
KT33907_8AEUG User’s Guide Rev. 2.0 3/2014
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Document Number: KT33907_8AEUG
Rev. 2.0
3/2014