INTEGRATED CIRCUITS SA3601 Low voltage dual-band RF front-end Preliminary specification 1999 Nov 09 Philips Semiconductors Preliminary specification Low voltage dual-band RF front-end SA3601 DESCRIPTION APPLICATIONS • 800 to 1000 MHz analog and digital receivers • 1800 to 2000 MHz digital receivers • Portable radios • Mobile communications equipment The SA3601 is an integrated dual-band RF front-end that operates at both cellular (AMPS and TDMA) and PCS (TDMA) frequencies, and is designed in a 20 GHz fT BiCMOS process—QUBiC2. The low-band (LB) receiver is a combined low-noise amplifier (LNA) and mixer. The LNA has a 1.7 dB noise figure (NF) at 881 MHz with 17 dB of gain and an IIP3 of –7 dBm. The wide-dynamic range mixer has a 9.5 dB NF at 881 MHz with 9.5 dB of gain and an IIP3 of +6 dBm. The high-band (HB) receiver is a combined low-noise amplifier (LNA) and mixer, with the low-band and high-band mixers sharing the same mixer output. The LNA has a 2.2 dB NF at 1960 MHz with 16 dB of gain and an IIP3 of –5 dBm. The wide-dynamic range mixer has a 8.5 dB NF at 1960 MHz with 8.5 dB of gain and an IIP3 of +5.5 dBm. HBLNA_OUT GND LBLNA_OUT GND GND LBLNA_IN 32 31 30 29 28 27 26 25 HBLNA_IN 1 GND 2 24 GND VCC 3 23 VCC HBMXR+_IN 4 22 LBMXR_IN HBMXR–_IN 5 21 GND PD1 6 20 MXR+_OUT VCC 7 19 MXR–_OUT GND 8 18 GND 17 LBVCO_IN 9 10 11 12 13 14 15 16 GND GND LBVCO_OUT GND HBVCO_IN PD3 GND TOP VIEW PD2 • Low current consumption: LB ICC = 14 mA; HB ICC = 15.5 mA • Outstanding low- and high-band noise figure • LNAs with gain control (30 dB gain step) • LO input and output buffers • Frequency doubler • On chip logic for network selection and power down • Very small outline package GND FEATURES GND PIN CONFIGURATION SR02237 ORDERING INFORMATION TYPE NUMBER SA3601 1999 Nov 09 PACKAGE NAME DESCRIPTION VERSION BCC32++ HBCC32: plastic, heatsink bottom chip carrier; 32 terminals; body 5 x 5 x 0.65 mm SOT560-1 2 Philips Semiconductors Preliminary specification Low voltage dual-band RF front-end SA3601 PIN DESCRIPTIONS PIN NO. PIN NAME PIN NO. DESCRIPTION PIN NAME DESCRIPTION 1 HBLNA_IN Highband LNA input 17 LBVCO_IN Lowband VCO input 2 GND Ground 18 GND Ground 3 VCC Power supply 19 MXR–_OUT Mixer negative output 4 HBMXR+_IN Highband mixer positive input 20 MXR+_OUT Mixer positive output 5 HBMXR–_IN Highband mixer negative input 21 GND Ground 6 PD1 Power down control 1 22 LBMXR_IN Lowband mixer input 7 VCC Power supply 23 VCC Power supply 8 GND Ground 24 GND Ground 9 PD2 Power down control 2 25 LBLNA_IN Lowband LNA input 10 GND Ground 26 GND Ground ÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ 11 GND Ground 27 GND Ground 12 LBVCO_OUT Lowband VCO buffered output 28 LBLNA_OUT Lowband LNA output 13 GND Ground 29 GND Ground 14 HBVCO_IN Highband VCO input 30 HBLNA_OUT Highband LNA output 15 PD3 Power down control 3 31 GND Ground 16 GND Ground 32 GND Ground GND HBLNA_OUT GND LBLNA_OUT GND GND 32 31 30 29 28 27 26 LBLNA_IN GND BLOCK DIAGRAM 25 HBLNA_IN 1 GND 2 24 VCC 3 23 HBMXR+_IN 4 HBMXR–_IN GND VCC 22 LBMXR_IN 5 21 GND PD1 6 20 MXR+_OUT VCC 7 19 MXR–_OUT GND 8 18 GND 17 LBVCO_IN TOP VIEW 9 10 11 12 13 14 15 16 PD2 GND GND LBVCO_OUT GND HBVCO_IN PD3 GND x2 SR02238 Figure 1. 1999 Nov 09 Block Diagram 3 Philips Semiconductors Preliminary specification Low voltage dual-band RF front-end SA3601 MODE SELECT LOGIC Cel LNA Cel MXR PCS LNA PCS MXR x2 DBL Sleep mode off off off off Tx mode, LO lowband buffer off off off off Rx mode cellular, low gain off on off Rx mode cellular, high gain on on off 0 Rx mode PCS, low gain, x2 off off 1 Rx mode PCS, high gain, x2 off off 1 0 Rx mode PCS, low gain, no x2 off off 1 1 Rx mode PCS, high gain, no x2 off off PD1 PD2 PD3 0 0 0 0 0 1 0 1 0 0 1 1 1 0 1 0 1 1 1999 Nov 09 OPERATING MODE 4 LB LO O/P HB LO O/P off off off off on off off off on off off off on off off on on on off on on on on off off on off off off on on off off off Philips Semiconductors Preliminary specification Low voltage dual-band RF front-end SA3601 OPERATION The desired gain state can be selected by setting the logic pins (PD1,PD2,PD3) appropriately. The SA3601 is a highly integrated dual-band radio frequency (RF) front-end integrated circuit (IC) targeted for TDMA applications. This IC is split into separate low-band (LB) and high-band (HB) receivers. The LB receiver contains a low noise amplifier (LNA) and mixer that are designed to operate in the cellular frequency range (869–894MHz). The HB receiver contains an LNA and mixer that are designed to operate in the PCS frequency range (1930–1990 MHz). The SA3601 also contains a frequency doubler that can drive the HB mixer local oscillator (LO) port, allowing a single-band voltage controlled oscillator (VCO) to be used to drive both mixers. Modes for bypassing the doubler are also provided, in the case where a dual-band VCO is used. High-Band Receive Section The HB circuit contains a LNA followed by a Gilbert cell mixer with differential inputs. The LNA output uses an internal pull-up inductor to VCC , which eliminates the need for an external pull-up. The mixer IF outputs are differential and are combined with the low-band IF mixer outputs thereby eliminating the need for extra output pins. Similar to the LB LNA, the HB LNA has two gain settings: high gain (16 dB) and low gain (–15 dB). Control Logic Section The SA3601 has eight modes of operation that control the LNAs, mixers, LO buffers and doubler. The select pins (PD1,2,3) are used to change modes of operation. The internal select logic powers the device down (0,0,0), turns on the LB LO buffer for use in transmit mode (0,0,1), enables cellular receive mode for high and low gain (0,1,X), enables PCS receive mode for high and low gain both without doubler (1,1,X) and with doubler (1,0,X). Pins PD1, PD2, and PD3, control the logic functions of the SA3601. The PD1 selects between LB and HB operations. In LB receive mode, the LB LNA is in high gain mode (or on) when PD1,2,3 are (0,1,1). In all other modes, the LB LNA is off. The LB mixer is on when PD1,2,3 are (0,1,X). In all other modes, the LB mixer is off. During transmit mode when PD1,2,3 are (0,0,1), the LB LO buffer is on, enabling use of the LO signal for the transmitter. Low-Band Receive Section In HB receive mode, the HB LNA is in high gain mode (or on) when PD1,2,3 are (1,X,1). In all other modes, the HB LNA is off. The HB mixer is on when PD1,2,3 are (1,X,X), and is off in all other modes. The on-chip frequency doubler (X2) is on in (1,0,X) modes. When the frequency doubler is on, the input signal from the LB LO buffer is doubled in frequency, which can then be used to drive the HB mixer LO port. The frequency doubler can also be bypassed in modes (1,1,X), in which case the HB mixer is driven directly by an external 2 GHz LO signal. The LB circuit contains a LNA followed by a wide dynamic range active mixer. In a typical application circuit, the LNA output uses an external pull-up inductor to VCC and is AC coupled. The mixer IF outputs are differential and are combined with the high-band IF mixer outputs thereby eliminating the need for extra output pins. External inductors and capacitors can be used to convert the differential mixer outputs to single-ended. Furthermore, the LNA provides two gain settings: high gain (17dB) and low gain (–15 dB). 1999 Nov 09 5 Philips Semiconductors Preliminary specification Low voltage dual-band RF front-end SA3601 ABSOLUTE MAXIMUM RATINGS1 SYMBOL LIMITS PARAMETER MIN. MAX. UNITS VCC Supply voltage –0.3 +4.5 V VIN Voltage applied to any other pin –0.3 VCC+0.3 V PD Power dissipation, Tamb = +25 °C (still air) TBD mW TJ MAX Maximum junction temperature 150 °C PMAX Power input/output +20 dBm IMAX DC current into any I/O pin –10 +10 mA TSTG Storage temperature range –65 +150 °C –40 +85 °C TO Operating temperature NOTES: 1. IC is protected for ESD voltages up to 500 V (human body model). DC ELECTRICAL CHARACTERISTICS Unless otherwise specified, all Input/Output ports are single-ended. DC PARAMETERS VCC = +3.0 V, Tamb = +25°C; unless otherwise specified SYMBOL ICC PARAMETER PD2 PD3 Sleep mode 0 0 0 Tx mode, LO lowband buffer 0 0 Rx mode cellular, low gain 0 1 Rx mode cellular, high gain 0 1 Rx mode PCS, low gain, x2 1 0 Rx mode PCS, high gain, x2 1 Rx mode PCS, low gain, no x2 Rx mode PCS, high gain, no x2 VIH Input HIGH voltage VIL Input LOW voltage IBIAS Input bias current 1999 Nov 09 TEST CONDITIONS PD1 TESTER LIMITS UNIT TYP MAX 0.1 1 µA 1 4.3 5.5 mA 0 10.1 12 mA 1 14 16.5 mA 0 17.5 21 mA 0 1 23.5 28 mA 1 1 0 10 TBD mA 1 1 1 15.5 TBD mA 0.5xVCC VCC+0.3 V –0.3 0.2xVCC V –5 +5 µA Logic 1 or logic 0 6 MIN Philips Semiconductors Preliminary specification Low voltage dual-band RF front-end SA3601 AC ELECTRICAL CHARACTERISTICS VCC = +3.0 V, fRF = 881 MHz, fLO = 963 MHz, Tamb = +25°C, unless otherwise specified SYMBOL PARAMETER TEST CONDITIONS LIMITS MIN. –3 σ TYP +3 σ MAX. UNIT Cascaded Gain Section GSYS LB LNA + Mixer, High Gain Filter loss = 3 dB 20.5 23.5 26.5 dB GBYP LB LNA + Mixer, Low Gain Filter loss = 3 dB –11.5 –8.5 –5.5 dB 894 MHz Low-band LNA Section fRF RF input frequency range 869 GENA Small signal gain ENABLED 17 dB NFENA Noise figure ENABLED 1.7 dB IIP3ENA Input 3rd order Intercept Point –7 dBm P1dBENA Input 1 dB Compression Point –20 dBm GBYP Small signal gain BYPASSED –15 dB NFBYP Noise figure BYPASSED 15 dB IIP3BYP Input 3rd order Intercept Point 15 dBm dB Input return loss 50 Ω system 10 ZOUT Output return loss 50 Ω system 10 TSW ENABLE/DISABLE speed1 ZIN dB 20 µs Low-band Mixer Section fRF RF input frequency range 869 894 MHz fIF IF output frequency range 70 200 MHz fLO LO input range 939 1100 MHz GMXR Small signal gain PLO = –5 dBm 9.5 NFMXR SSB Noise figure PLO = –5 dBm 9.5 dB IIP3MXR Input 3rd order Intercept Point PLO = –5 dBm 6 dBm P1dBMXR Input 1 dB Compression Point PLO = –5 dBm PLO LO input power range ZIN Input return loss ZOUT Output return loss Two-tone spurious rejection: 2-Tone –14 –7 –5 dBm –3 dBm 50 Ω system 10 dB 50 Ω system 10 dB PLO = –5 dBm 2(fRF–fTx), fRF–fTx=fIF/2 fRF=890.0 MHz @–36 dBm fTx=848.9 MHz @–20 dBm –110 3(fRF–fTx), fRF–fTx=fIF/3 fRF=876.3 MHz @–36 dBm fTx=848.9 MHz @–20 dBm –110 RF–LO RF to LO isolation 25 LO–RF LO to RF isolation 40 TSW dB ENABLE/DISABLE speed1 dBm dB dB 20 µs 1100 MHz –3 dBm Low-band LO Buffer Section PLO LO Input frequency range PIN LO Input power 939 50 Ω matched LB_VCO_IN –7 –5 POUT LO Output power 50 Ω matched LB_VCO_OUT –7.5 dBm ZIN Input return loss 50 Ω system 10 dB Output return loss 50 Ω system 10 dB Harmonic content PLO = –5 dBm –20 dBc ZOUT TSW 1999 Nov 09 ENABLE/DISABLE speed1 20 7 µs Philips Semiconductors Preliminary specification Low voltage dual-band RF front-end SA3601 AC ELECTRICAL CHARACTERISTICS VCC = +3.0 V, fRF = 1960 MHz, fLO = 2042 MHz, Tamb = +25°C, unless otherwise specified SYMBOL PARAMETER TEST CONDITIONS LIMITS MIN. –3 σ TYP +3 σ MAX. UNIT Cascaded Gain Section GSYS HB LNA + Mixer, High Gain Filter loss = 3 dB 18.5 21.5 24.5 dB GBYP HB LNA + Mixer, Low Gain Filter loss = 3 dB –12.5 –9.5 –6.5 dB 1990 MHz High-band LNA Section fRF RF input frequency range 1930 GENA Small signal gain ENABLED 16 dB NFENA Noise figure ENABLED 2.2 dB IIP3ENA Input 3rd order Intercept Point –5 dBm P1dBENA Input 1 dB Compression Point –14 dBm GBYP Small signal gain BYPASSED –15 dB NFBYP Noise figure BYPASSED 15 dB IIP3BYP Input 3rd order Intercept Point ZIN ZOUT TSW 15 dBm Input return loss 50 Ω system, ENA and BYP 10 dB Output return loss 50 Ω system, ENA and BYP 10 dB ENABLE/DISABLE 20 µs 1990 MHz 70 200 MHz 2000 2190 MHz speed1 High-band Mixer Section fRF RF input frequency range fIF IF output frequency range fLO LO input range GMXR NFMXR IIP3MXR P1dBMXR IF/2 rej rej. IF/3 rej. Small signal gain PLO = –5 dBm 8.5 dB SSB Noise figure, doubler off PLO = –5 dBm 8.5 dB SSB Noise figure, doubler on PLO = –5 dBm 9 dB Input 3rd order Intercept Point, doubler off PLO = –5 dBm 5.5 dBm Input 3rd order Intercept Point, doubler on PLO = –5 dBm 3 dBm Input 1 dB Compression Point PLO = –5 dBm –14 dBm Half-IF spurious rejection 2(fRF–fLO), fRF–fLO=fIF/2, doubler off Half-IF spurious rejection 2(fRF–fLO), fRF–fLO=fIF/2, doubler on Third-IF spurious rejection 3(fRF–fLO), fRF–fLO=fIF/3 Two-tone spurious rejection: 2-Tone 1930 –90 fRF=1972.0 MHz @–36 dBm fLO=2013.1 MHz @–5 dBm dBm –85 fRF=1985.7 MHz @–36 dBm fLO=2013.1 MHz @–5 dBm –114 PLO = –5 dBm, fRF–fTx, fRF–fTx=fIF fRF=1933.0 MHz @–36 dBm fTx=1850.8 MHz @–20 dBm –70 2(fRF–fTx), fRF–fTx=fIF/2 fRF=1951.0 MHz @–36 dBm fTx=1909.9 MHz @–20 dBm –115 3(fRF–fTx), fRF–fTx=fIF/3 fRF=1937.3 MHz @–36 dBm fTx=1909.9 MHz @–20 dBm –125 PLO LO input power range ZIN dBm –7 –5 dBm –3 dBm Input return loss 50 Ω system 10 dB ZOUT Output return loss 50 Ω system 10 dB RF–LO RF to LO isolation 40 dB LO–RF LO to RF isolation 30 TSW 1999 Nov 09 ENABLE/DISABLE speed1 dB 20 8 µs Philips Semiconductors Preliminary specification Low voltage dual-band RF front-end SA3601 AC ELECTRICAL CHARACTERISTICS VCC = +3.0 V, Tamb= +25°C, unless otherwise specified SYMBOL PARAMETER TEST CONDITIONS LIMITS MIN. –3 σ TYP +3 σ MAX. UNITS High-band LO Buffer Section PLO LO Input frequency range PIN LO Input power 2000 50 Ω matched HB_VCO_IN –7 –5 2190 MHz –3 dBm POUT LO Output power 50 Ω matched HB_VCO_OUT –8 dBm ZIN Input return loss 50 Ω system 10 dB Output return loss 50 Ω system 10 dB Harmonic content PLO = –5 dBm –20 ZOUT TSW ENABLE/DISABLE speed1 dBc 20 µs 1095 MHz –3 dBm x2 LO Doubler Section fLO LO Input frequency PIN LO Input power 50 Ω matched LB_VCO_IN 1000 ZIN –7 –5 Input return loss 50 Ω system 10 ZOUT Output return loss 50 Ω system 10 TSW ENABLE/DISABLE speed1 dB 20 NOTES: 1. Dependent on external components. 1999 Nov 09 dB 9 µs Philips Semiconductors Preliminary specification Low voltage dual-band RF front-end PIN NO PIN MNEMONIC SA3601 DC V EQUIVALENT CIRCUIT VBIAS 5K 1 HB LNA IN 0.8 SR01787 VCC 3, 7, 23 VCC 4 HB MXR+ IN 1.2 5 HB MXR– IN 1.2 VBIAS SR01788 6 PD1 9 PD2 15 PD3 Apply externally SR01789 VCC 12 LB VCO OUT VCC – 0.2 V SR01791 VCC 14 HB VCO IN VBIAS VBIAS 1.9 SR01792 1999 Nov 09 10 Philips Semiconductors Preliminary specification Low voltage dual-band RF front-end PIN NO PIN MNEMONIC SA3601 DC V EQUIVALENT CIRCUIT VCC 17 LB VCO IN 1.0 SR01793 VCC 2 pF 19 MXR– OUT VCC Pull-up externally to VCC Pull-u 20 2 pF MXR+ OUT SR01794 VCC 22 LB MXR IN VBIAS 1.2 SR01795 VCC VBIAS 5K 25 LB LNA IN 0.8 SR01796 1999 Nov 09 11 Philips Semiconductors Preliminary specification Low voltage dual-band RF front-end PIN NO PIN MNEMONIC SA3601 DC V EQUIVALENT CIRCUIT VCC 28 LB LNA OUT Pull-up externally to VCC SR01797 VCC 30 HB LNA OUT SR01786 1999 Nov 09 12 Philips Semiconductors Preliminary specification Low voltage dual-band RF front-end SA3601 HBCC32: plastic, heatsink bottom chip carrier; 32 terminals; body 5 x 5 x 0.65 mm 1999 Nov 09 13 SOT560-1 Philips Semiconductors Preliminary specification Low voltage dual-band RF front-end SA3601 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 2000 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 Date of release: 04-00 Document order number: 1999 Nov 09 14 9397 750 07037