MPC5668GNEXUSADP SPF-25195.pdf?fpsp=1&WT TYPE=Schematics&WT VENDOR=FREESCALE&WT FILE FORMAT=pdf&WT ASSET=Downloads&fileExt=

5
4
3
2
1
MPC5668 Nexus Emulation Adapter
D
D
Table of Contents
256 MCU I/O
208 MCU I/O
256 & 208 Power
Debug Circuitry
Revisions
Sheet
Sheet
Sheet
Sheet
2
3
4
5
Rev
Description
Date
Designer
A
Original Release
Sept 18th 2008
D.McMenamin
June 09th 2010
S.McLaughlin
B
Capacitor update C1 and C2
C
C
B
B
Microcontroller Solutions Group
A
A
6501 William Cannon Drive West
Austin, TX 78735-8598
This document contains information proprietary to Freescale Semiconductor and shall not be used for
engineering design, procurement or manufacture in whole or in part without the express written permission
of Freescale Semiconductor.
ICAP Classification:
FCP: ____
FIUO: X
PUBI: ____
Designer:
Drawing Title:
R62709
MPC5668ADP
5
4
3
2
Drawn by:
R62709
Page Title:
Approved:
R64495
Size
C
Document Number
Date:
Wednesday, June 09, 2010
TITLE PAGE
Rev
B
SCH-25195 PDF: SPF-25195
Sheet
1
1
of
5
5
4
3
2
1
256 MCU I/O
U1A
(pg3)
PG[0..15]
PA[0..15]
D
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
D15
E15
F16
F15
G16
G15
H16
G14
F14
E14
D13
E13
D14
F13
D16
E16
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PB15
B14
C14
B13
C13
C12
D12
C11
D11
A10
B12
A9
B9
C10
A8
B8
C9
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
D9
C8
A7
B7
D8
C6
C7
A6
B6
A5
B5
B4
A4
C5
C4
D5
PD15
PD14
PD13
PD12
PD11
PD10
PD9
PD8
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
D3
C3
H1
G2
G1
F2
F1
E2
E1
D2
D1
C2
C1
B1
B2
A2
PE15
PE14
PE13
PE12
PE11
PE10
PE9
PE8
PE7
PE6
PE5
PE4
PE3
PE2
PE1
PE0
N6
N7
P5
P4
N4
N3
M4
J4
L2
M2
H3
G3
F3
F4
E4
E3
PF15
PF14
PF13
PF12
PF11
PF10
PF9
PF8
PF7
PF6
PF5
PF4
PF3
PF2
PF1
PF0
P13
P14
M14
N14
R3
R1
T2
P1
R2
N1
P2
M1
N2
J2
J1
H2
AN[0]/PA[0]
AN[1]/PA[1]
AN[2]/PA[2]
AN[3]/PA[3]
AN[4]/PA[4]
AN[5]/PA[5]
AN[6]/PA[6]
AN[7]/PA[7]
AN[8]/PA[8]
AN[9]/PA[9]
AN[10]/PA[10]
AN[11]/PA[11]
AN[12]/PA[12]
AN[13]/PA[13]
AN[14]/EXTAL32/PA[14]
AN[15]/XTAL32/PA[15]
PCS_A[4]/PCS_B[3]/AN[48]/PG[0]
PCS_A[5]/PCS_B[4]/AN[49]/PG[1]
PCS_D[1]/SCL_C/AN[50]/PG[2]
PCS_D[2]/SDA_C/AN[51]/PG[3]
PCS_D[3]/SCL_B/AN[52]/PG[4]
PCS_D[4]/SDA_B/AN[53]/PG[5]
PCS_C[1]/FEC_MDC/AN[54]/PG[6]
PCS_C[2]/FEC_MDIO/AN[55]/PG[7]
EMIOS[7]/FEC_TX_CLK/AN[56}/PG[8]
EMIOS[6]/FEC_CRS/AN[57]/PG[9]
EMIOS[5]/FEC_TX_ER/AN[58]/PG[10]
EMIOS[4]/FEC_RX_CLK/AN[59]/PG[11]
EMIOS[3]/FEC_TXD[0]/AN[60]/PG[12]
EMIOS[2]/FEC_TXD[1]/AN[61]/PG[13]
EMIOS[1]/FEC_TXD[2]/AN[62]/PG[14]
EMIOS[0]/FEC_TXD[3]/AN[63]/PG[15]
AN[16]|ANW/PB[0]
AN[17]|ANX/PB[1]
AN[18]|ANY/PB[2]
AN[19]|ANZ/PB[3]
AN[20]/PB[4]
AN[21]/PB[5]
AN[22]/PB[6]
AN[23]/PB[7]
AN[24]/PCS_A[2]/PB[8]
AN[25]/PCS_A[3]/PB[9]
AN[26]/PCS_B[4]/PB[10]
AN[27]/PCS_B[5]/PB[11]
AN[28]/PCS_C[1]/PB[12]
AN[29]/PCS_C[2]/PB[13]
AN[30]/PCS_D[3]/PB[14]
AN[31]/PCS_D[4]/PB[15]
EMIOS[31]/FEC_COL/PH[0]
EMIOS[30]/FEC_RX_DV/PH[1]
EMIOS[29]/FEC_TX_EN/PH[2]
EMIOS[28]/FEC_RX_ER/PH[3]
EMIOS[27]/FEC_RXD[0]/PH[4]
EMIOS[26]/FEC_RXD[1]/PH[5]
EMIOS[25]/FEC_RXD[2]/PH[6]
EMIOS[24]/FEC_RXD[3]/PH[7]
EMIOS[23]/PH[8]
EMIOS[22]/PH[9]
EMIOS[21]/PH[10]
EMIOS[20]/PH[11]
EMIOS[19]/PH[12]
EMIOS[18]/PH[13]
EMIOS[17]/PH[14]
EMIOS[16]/PH[15]
PG0
PG1
PG2
PG3
PG4
PG5
PG6
PG7
PG8
PG9
PG10
PG11
PG12
PG13
PG14
PG15
T14
P16
R16
N15
P15
R14
R15
T15
P7
N8
P8
N9
P9
P10
P11
N11
PH0
PH1
PH2
PH3
PH4
PH5
PH6
PH7
PH8
PH9
PH10
PH11
PH12
PH13
PH14
PH15
R7
T7
R8
T8
R9
T9
R10
T10
T11
R11
N12
P12
R12
T12
R13
T13
PJ0
PJ1
PJ2
PJ3
PJ4
PJ5
PJ6
PJ7
PJ8
PJ9
PJ10
PJ11
PJ12
PJ13
PJ14
PJ15
L1
K1
K2
T3
R4
T4
R5
T5
R6
T6
P6
PK0
PK1
PK2
PK3
PK4
PK5
PK6
PK7
PK8
PK9
PK10
A11
MCU-RSTx
MCU-RSTx
(pg3,5)
M11
M12
M9
M8
M10
E5
F5
G5
H5
H6
J6
J5
K5
L5
M5
M6
M7
EVTI
EVTO
MSEO[0]
MSEO[1]
MCKO
MDO0
MDO1
MDO2
MDO3
MDO4
MDO5
MDO6
MDO7
MDO8
MDO9
MDO10
MDO11
EVTI
EVTO
MSEO[0]
MSEO[1]
MCKO
(pg5)
(pg5)
(pg5)
(pg5)
(pg5)
J3
M3
L3
P3
K3
M13
TDI
TDO
TMS
TCK
JCOMP
TEST
D
PH[0..15]
(pg3) PB[0..15]
AN[32]/PC[0]
AN[33]/PC[1]
AN[34]/EVTI/PC[2]
AN[35]/EVTO/PC[3]
AN[36]/PC[4]
AN[37]/Z6NMI/PC[5]
AN[38]/Z0NMI/PC[6]
AN[39]/FR_DBG[3]/PC[7]
AN[40]/FR_DBG[2]/PC[8]
AN[41]/FR_DBG[1]/PC[9]
AN[42]/FR_DBG[0]/PC[10]
AN[43]/SCL_C/PC[11]
AN[44]/SDA_C/PC[12]
AN[45]/MA[0]/PC[13]
AN[46]/MA[1]/PC[14]
AN[47]/MA[2]/PC[15]
MPC5668 256BGA SIGNALS
EMIOS[15]/PCS_A[4]/PJ[0]
EMIOS[14]/PCS_A[5]/PJ[1]
EMIOS[13]/PCS_B[1]/PJ[2]
EMIOS[12]/PCS_B[2]/PJ[3]
EMIOS[11]/PCS_C[3]/PJ[4]
EMIOS[10]/PCS_C[4]/PJ[5]
EMIOS[9]/PCS_D[5]/PJ[6]
EMIOS[8]/PCS_D[1]/PJ[7]
EMIOS[7]/PJ[8]
EMIOS[6]/PJ[9]
EMIOS[5]/PJ[10]
EMIOS[4]/PJ[11]
EMIOS[3]/PJ[12]
EMIOS[2]/PJ[13]
EMIOS[1]/PJ[14]
EMIOS[0]/PJ[15]
(pg3)
C
PK[0..10]
(pg3) PD[0..15]
RXD_B/PD[15]
TXD_B/PD[14]
RXD_A/PD[13]
TXD_A/PD[12]
CNRX_F/RXD_M/SDA_D/PD[11]
CNTX_F/TXD_M/SCL_D/PD[10]
CNRX_E/RXD_L/SDA_C/PD[9]
CNTX_E/TXD_L/SCL_C/PD[8]
CNRX_D/RXD_K/SDA_B/PD[7]
CNTX_D/TXD_K/SCL_B/PD[6]
CNRX_C/PD[5]
CNTX_C/PD[4]
CNRX_B/PD[3]
CNTX_B/PD[2]
CNRX_A/PD[1]
CNTX_A/PD[0]
MLBCLK/SCK_B/CLKOUT/PK[0]
MLBSIG/SOUT_B/PCS_D[4]/PK[1]
MLBDAT/SIN_B/PCS_D[5]/PK[2]
FR_A_RX/MA[0]/PCS_C[1]/PK[3]
FR_A_TX/MA[1]/PCS_C[2]/PK[4]
FR_A_TX_EN/MA[2]/PCS_C[3]/PK[5]
FR_B_RX/PCS_B[1]/PCS_C[4]/PK[6]
FR_B_TX/PCS_B[2]/PCS_C[5]/PK[7]
FR_B_TX_EN/PCS_B[3]/PCS_A[1]/PK[8]
CLKOUT/PCS_D[1]/PCS_A[2]/BOOTCFG/PK[9]
PCS_B[5]/PCS_D[2]/PCS_A[3]/PK[10]
RESET
(pg3) PE[0..15]
B
(pg3)
PJ[0..15]
(pg3) PC[0..15]
C
(pg3)
B3
A3
H14
J14
K14
L14
H15
J15
K15
L15
M15
J16
K16
L16
M16
N16
EVTI
EVTO
MSEO[0]
MSEO[1]
MCKO
MDO[0]
MDO[1]
MDO[2]
MDO[3]
MDO[4]
MDO[5]
MDO[6]
MDO[7]
MDO[8]
MDO[9]
MDO[10]
MDO[11]
SDA_A/PCS_D[5]/PE[15]
SCL_A/PCS_D[2]/PE[14]
RXD_J/PCS_C[3]/PE[13]
TXD_J/PCS_C[5]/PE[12]
RXD_H/PCS_B[2]/PE[11]
TXD_H/PCS_B[3]/PE[10]
RXD_G/PCS_A[4]/PE[9]
TXD_G/PCS_A[1]/PE[8]
RXD_F/EMIOS[24]/PE[7]
TXD_F/EMIOS[25]/PE[6]
RXD_E/EMIOS[26]/PE[5]
TXD_E/EMIOS[27]/PE[4]
RXD_D/EMIOS[28]/PE[3]
TXD_D/EMIOS[29]/PE[2]
RXD_C/EMIOS[30]/PE[1]
TXD_C/EMIOS[31]/PE[0]
(pg3) PF[0..15]
PCS_D[0]/PCS_A[5]/PCS_B[4]/PF[15]
SIN_D/PF[14]
SOUT_D/PF[13]
SCK_D/PF[12]
PCS_C[0]/PCS_D[5]/PCS_A[4]/PF[11]
SIN_C/PF[10]
SOUT_C/PF[9]
SCK_C/PF[8]
PCS_B[0]/PCS_C[5]/PCS_D[4]/PF[7]
SIN_B/PCS_A[3]/PCS_C[5]/PF[6]
SOUT_B/PCS_A[2]/PCS_C[3]/PF[5]
SCK_B/PCS_A[1]/PCS_C[2]/PF[4]
PCS_A[0]/PCS_B[5]/PCS_C[4]/PF[3]
SIN_A/PF[2]
SOUT_A/PF[1]
SCK_A/PF[0]
TDI
TDO
TMS
TCK
JCOMP
TEST
EXTAL/EXTCLK
XTAL
A14
A13
MCU-EXTAL
MCU-XTAL
(pg3,5)
MDO[0..11]
(pg5)
TDI
TDO
TMS
TCK
JCOMP
TEST
(pg3,5)
(pg3,5)
(pg3,5)
(pg3,5)
(pg3,5)
(pg3)
B
MCU-EXTAL (pg3)
MCU-XTAL
(pg3)
Microcontroller Solutions Group
A
MPC5668
A
6501 William Cannon Drive West
Austin, TX 78735-8598
This document contains information proprietary to Freescale Semiconductor and shall not be used for
engineering design, procurement or manufacture in whole or in part without the express written permission
of Freescale Semiconductor.
ICAP Classification:
FCP: ____
FIUO: X
PUBI: ____
Designer:
Drawing Title:
R62709
MPC5668ADP
5
4
3
2
Drawn by:
R62709
Page Title:
Approved:
R64495
Size
C
Document Number
Date:
Wednesday, June 09, 2010
256 MCU I/O
Rev
B
SCH-25195 PDF: SPF-25195
Sheet
1
2
of
5
5
4
3
2
1
208 MCU I/O
U2A
(pg2) PA[0..15]
D
PG[0..15]
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
D15
E15
F16
F15
G16
G15
H16
G14
F14
E14
D13
E13
D14
F13
D16
E16
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PB15
B14
C14
B13
C13
C12
D12
C11
D11
A10
B12
A9
B9
C10
A8
B8
C9
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
D9
C8
A7
B7
D8
C6
C7
A6
B6
A5
B5
B4
A4
C5
C4
D5
PD15
PD14
PD13
PD12
PD11
PD10
PD9
PD8
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
D3
C3
H1
G2
G1
F2
F1
E2
E1
D2
D1
C2
C1
B1
B2
A2
PE15
PE14
PE13
PE12
PE11
PE10
PE9
PE8
PE7
PE6
PE5
PE4
PE3
PE2
PE1
PE0
N6
N7
P5
P4
N4
N3
M4
J4
L2
M2
H3
G3
F3
F4
E4
E3
PF15
PF14
PF13
PF12
PF11
PF10
PF9
PF8
PF7
PF6
PF5
PF4
PF3
PF2
PF1
PF0
P13
P14
M14
N14
R3
R1
T2
P1
R2
N1
P2
M1
N2
J2
J1
H2
AN[0]/PA[0]
AN[1]/PA[1]
AN[2]/PA[2]
AN[3]/PA[3]
AN[4]/PA[4]
AN[5]/PA[5]
AN[6]/PA[6]
AN[7]/PA[7]
AN[8]/PA[8]
AN[9]/PA[9]
AN[10]/PA[10]
AN[11]/PA[11]
AN[12]/PA[12]
AN[13]/PA[13]
AN[14]/EXTAL32/PA[14]
AN[15]/XTAL32/PA[15]
PCS_A[4]/PCS_B[3]/AN[48]/PG[0]
PCS_A[5]/PCS_B[4]/AN[49]/PG[1]
PCS_D[1]/SCL_C/AN[50]/PG[2]
PCS_D[2]/SDA_C/AN[51]/PG[3]
PCS_D[3]/SCL_B/AN[52]/PG[4]
PCS_D[4]/SDA_B/AN[53]/PG[5]
PCS_C[1]/FEC_MDC/AN[54]/PG[6]
PCS_C[2]/FEC_MDIO/AN[55]/PG[7]
EMIOS[7]/FEC_TX_CLK/AN[56]/PG[8]
EMIOS[6]/FEC_CRS/AN[57]/PG[9]
EMIOS[5]/FEC_TX_ER/AN[58]/PG[10]
EMIOS[4]/FEC_RX_CLK/AN[59]/PG[11]
EMIOS[3]/FEC_TXD[0]/AN[60]/PG[12]
EMIOS[2]/FEC_TXD[1]/AN[61]/PG[13]
EMIOS[1]/FEC_TXD[2]/AN[62]/PG[14]
EMIOS[0]/FEC_TXD[3]/AN[63]/PG[15]
AN[16]/ANW/PB[0]
AN[17]|ANX/PB[1]
AN[18]/ANY/PB[2]
AN[19]|ANZ/PB[3]
AN[20]/PB[4]
AN[21]/PB[5]
AN[22]/PB[6]
AN[23]/PB[7]
AN[24]/PCS_A[2]/PB[8]
AN[25]/PCS_A[3]/PB[9]
AN[26]/PCS_B[4]/PB[10]
AN[27]/PCS_B[5]/PB[11]
AN[28]/PCS_C[1]/PB[12]
AN[29]/PCS_C[2]/PB[13]
AN[30]/PCS_D[3]/PB[14]
AN[31]/PCS_D[4]/PB[15]
EMIOS[31]/FEC_COL/PH[0]
EMIOS[30]/FEC_RX_DV/PH[1]
EMIOS[29]/FEC_TX_EN/PH[2]
EMIOS[28]/FEC_RX_ER/PH[3]
EMIOS[27]/FEC_RXD[0]/PH[4]
EMIOS[26]/FEC_RXD[1]/PH[5]
EMIOS[25]/FEC_RXD[2]/PH[6]
EMIOS[24]/FEC_RXD[3]/PH[7]
EMIOS[23]/PH[8]
EMIOS[22]/PH[9]
EMIOS[21]/PH[10]
EMIOS[20]/PH[11]
EMIOS[19]/PH[12]
EMIOS[18]/PH[13]
EMIOS[17]/PH[14]
EMIOS[16]/PH[15]
B3
A3
H14
J14
K14
L14
H15
J15
K15
L15
M15
J16
K16
L16
M16
N16
PG0
PG1
PG2
PG3
PG4
PG5
PG6
PG7
PG8
PG9
PG10
PG11
PG12
PG13
PG14
PG15
T14
P16
R16
N15
P15
R14
R15
T15
P7
N8
P8
N9
P9
P10
P11
N11
PH0
PH1
PH2
PH3
PH4
PH5
PH6
PH7
PH8
PH9
PH10
PH11
PH12
PH13
PH14
PH15
R7
T7
R8
T8
R9
T9
R10
T10
T11
R11
N12
P12
R12
T12
R13
T13
PJ0
PJ1
PJ2
PJ3
PJ4
PJ5
PJ6
PJ7
PJ8
PJ9
PJ10
PJ11
PJ12
PJ13
PJ14
PJ15
L1
K1
K2
T3
R4
T4
R5
T5
R6
T6
P6
PK0
PK1
PK2
PK3
PK4
PK5
PK6
PK7
PK8
PK9
PK10
A11
MCU-RSTx
J3
M3
L3
P3
K3
M13
TDI
TDO
TMS
TCK
JCOMP
TEST
D
(pg2) PB[0..15]
PH[0..15]
(pg2) PC[0..15]
C
EMIOS[15]/PCS_A[4]/PJ[0]
EMIOS[14]/PCS_A[5]/PJ[1]
EMIOS[13]/PCS_B[1]/PJ[2]
EMIOS[12]/PCS_B[2]/PJ[3]
EMIOS[11]/PCS_C[3]/PJ[4]
EMIOS[10]/PCS_C[4]/PJ[5]
EMIOS[9]/PCS_D[5]/PJ[6]
EMIOS[8]/PCS_D[1]/PJ[7]
EMIOS[7]/PJ[8]AN[56]
EMIOS[6]/PJ[9]
EMIOS[5]/PJ[10]
EMIOS[4]/PJ[11]
EMIOS[3]/PJ[12]
EMIOS[2]/PJ[13]
EMIOS[1]/PJ[14]
EMIOS[0]/PJ[15]
(pg2)
C
PK[0..10]
RXD_B/PD[15]
TXD_B/PD[14]
RXD_A/PD[13]
TXD_A/PD[12]
CNRX_F/RXD_M/SDA_D/PD[11]
CNTX_F/TXD_M/SCL_D/PD[10]
CNRX_E/RXD_L/SDA_C/PD[9]
CNTX_E/TXD_L/SCL_C/PD[8]
CNRX_D/RXD_K/SDA_B/PD[7]
CNTX_D/TXD_K/SCL_B/PD[6]
CNRX_C/PD[5]
CNTX_C/PD[4]
CNRX_B/PD[3]
CNTX_B/PD[2]
CNRX_A/PD[1]
CNTX_A/PD[0]
MLBCLK/SCK_B/CLKOUT/PK[0]
MLBSIG/SOUT_B/PCS_D[4]/PK[1]
MLBDAT/SIN_B/PCS_D[5]/PK[2]
FR_A_RX/MA[0]/PCS_C[1]/PK[3]
FR_A_TX/MA[1]/PCS_C[2]/PK[4]
FR_A_TX_EN/MA[2]/PCS_C[3]/PK[5]
FR_B_RX/PCS_B[1]/PCS_C[4]/PK[6]
FR_B_TX/PCS_B[2]/PCS_C[5]/PK[7]
FR_B_TX_EN/PCS_B[3]/PCS_A[1]/PK[8]
CLKOUT/PCS_D[1]/PCS_A[2]/BOOTCFG/PK[9]
PCS_B[5]/PCS_D[2]/PCS_A[3]/PK[10]
RESET
(pg2) PE[0..15]
(pg2)
(pg2)
PJ[0..15]
MPC5668 208BGA SIGNALS
AN[32]/PC[0]
AN[33]/PC[1]
AN[34]/EVTI/PC[2]
AN[35]/EVTO/PC[3]
AN[36]/PC[4]
AN[37]/Z6NMI/PC[5]
AN[38]/Z0NMI/PC[6]
AN[39]/FR_DBG[3]/PC[7]
AN[40]/FR_DBG[2]/PC[8]
AN[41]/FR_DBG[1]/PC[9]
AN[42]/FR_DBG[0]/PC[10]
AN[43]/SCL_C/PC[11]
AN[44]/SDA_C/PC[12]
AN[45]/MA[0]/PC[13]
AN[46]/MA[1]/PC[14]
AN[47]/MA[2]/PC[15]
(pg2) PD[0..15]
B
(pg2)
TDI
TDO
TMS
TCK
JCOMP
TEST
SDA_A/PCS_D[5]/PE[15]
SCL_A/PCS_D[2]/PE[14]
RXD_J/PCS_C[3]/PE[13]
TXD_J/PCS_C[5]/PE[12]
RXD_H/PCS_B[2]/PE[11]
TXD_H/PCS_B[3]/PE[10]
RXD_G/PCS_A[4]/PE[9]
TXD_G/PCS_A[1]/PE[8]
RXD_F/EMIOS[24]/PE[7]
TXD_F/EMIOS[25]/PE[6]
RXD_E/EMIOS[26]/PE[5]
TXD_E/EMIOS[27]/PE[4]
RXD_D/EMIOS[28]/PE[3]
TXD_D/EMIOS[29]/PE[2]
RXD_C/EMIOS[30]/PE[1]
TXD_C/EMIOS[31]/PE[0]
EXTAL/EXTCLK
XTAL
A14
A13
(pg2,5)
MCU-RSTx (pg2,5)
TDI
TDO
TMS
TCK
JCOMP
TEST
MCU-EXTAL
MCU-XTAL
(pg2,5)
(pg2,5)
(pg2,5)
(pg2,5)
(pg2,5)
(pg2)
B
MCU-EXTAL (pg2)
MCU-XTAL (pg2)
PF[0..15]
PCS_D[0]/PCS_A[5]/PCS_B[4]/PF[15]
SIN_D/PF[14]
SOUT_D/PF[13]
SCK_D/PF[12]
PCS_C[0]/PCS_D[5]/PCS_A[4]/PF[11]
SIN_C/PF[10]
SOUT_C/PF[9]
SCK_C/PF[8]
PCS_B[0]/PCS_C[5]/PCS_D[4]/PF[7]
SIN_B/PCS_A[3]/PCS_C[5]/PF[6]
SOUT_B/PCS_A[2]/PCS_C[3]/PF[5]
SCK_B/PCS_A[1]/PCS_C[2]/PF[4]
PCS_A[0]/PCS_B[5]/PCS_C[4]/PF[3]
SIN_A/PF[2]
SOUT_A/PF[1]
SCK_A/PF[0]
Microcontroller Solutions Group
A
A
6501 William Cannon Drive West
Austin, TX 78735-8598
MPC5668
This document contains information proprietary to Freescale Semiconductor and shall not be used for
engineering design, procurement or manufacture in whole or in part without the express written permission
of Freescale Semiconductor.
ICAP Classification:
FCP: ____
FIUO: X
PUBI: ____
Designer:
Drawing Title:
R62709
MPC5668ADP
5
4
3
2
Drawn by:
R62709
Page Title:
Approved:
R64495
Size
C
Document Number
Date:
Wednesday, June 09, 2010
208 MCU I/O
Rev
B
SCH-25195 PDF: SPF-25195
Sheet
1
3
of
5
5
4
MPC5668
3
A1
A16
D7
G4
G7
G8
G9
G10
H7
H8
H9
H10
J7
J8
J9
J10
K7
K8
K9
K10
N13
T1
T16
E7
E8
E9
E10
E11
E12
F7
F8
F9
F10
F11
F12
G11
G12
G6
H11
H12
J11
J12
K6
K12
L10
L12
L8
L9
VSS_A1
VSS_A16
VSS_D7
VSS_G4
VSS_G7
VSS_G8
VSS_G9
VSS_G10
VSS_H7
VSS_H8
VSS_H9
VSS_H10
VSS_J7
VSS_J8
VSS_J9
VSS_J10
VSS_K7
VSS_K8
VSS_K9
VSS_K10
VSS_N13
VSS_T1
VSS_T16
VSS_E7
VSS_E8
VSS_E9
VSS_E10
VSS_E11
VSS_E12
VSS_F7
VSS_F8
VSS_F9
VSS_F10
VSS_F11
VSS_F12
VSS_G11
VSS_G12
VSS_G6
VSS_H11
VSS_H12
VSS_J11
VSS_J12
VSS_K6
VSS_K12
VSS_L10
VSS_L12
VSS_L8
VSS_L9
VSSE6_F6
VSSE6_L6
VSSE6_L11
Nexus (3.3V)
VRCSEL
VRCCTL
VRC
VRL
VRH
VDDA
3.3V I/O
1.2V Logic
MPC5668 256BGA
POWER PINS
2
VDDE1
VDDE2
VDDE1
L4
D6
PT1
VDDE2
VDDE3
J13
A1
A16
D7
G4
G7
G8
G9
G10
H7
H8
H9
H10
J7
J8
J9
J10
K7
K8
K9
K10
N13
T1
T16
C15
A15
ADC
PLL (3.3V)
VRCSEL
VRCCTL
VRC
VRL
VRH
VDDA
VDDSYN
VDDE1
VDDE2
VDDE3
VDDE4
VDD_N5
VDD_K13
VDD_G13
VDD_H4
VDD_D10
VDD_D4
VDD33
VDDEMLB
MLB (2.5V-3.3V)
VRC (3.3V OR 5V)
VSS_A1
VSS_A16
VSS_D7
VSS_G4
VSS_G7
VSS_G8
VSS_G9
VSS_G10
VSS_H7
VSS_H8
VSS_H9
VSS_H10
VSS_J7
VSS_J8
VSS_J9
VSS_J10
VSS_K7
VSS_K8
VSS_K9
VSS_K10
VSS_N13
VSS_T1
VSS_T16
VSSA
VSSSYN
MPC5668 208BGA
POWER PINS
VDDE3
VSSA
VSSSYN
1.2V Logic
VDDE4
VDD_N5
VDD_K13
VDD_G13
VDD_H4
VDD_D10
VDD_D4
VDD33
VDDEMLB
VRCSEL
VRCCTL
VRC
VRL
VRH
VDDA
3.3V I/O
N10
N5
K13
G13
H4
D10
D4
L13
L7
K11
E6
K4
H13
B11
B10
C16
B16
B15
VDDE4
VDDE3
VDDE2
VDDE1
J13
L4
D6
VDD_N5
VDD_K13
VDD_G13
VDD_H4
VDD_D10
VDD_D4
VDD33
VDDEMLB
N10
N5
K13
G13
H4
D10
D4
L13
K4
VRCSEL
VRCCTL
VRC
VRL
VRH
VDDA
C16
B16
B15
H13
B11
B10
VDDSYN
A12
3
VDDE4
VDD_N5
VDD_K13
VDD_G13
VDD_H4
VDD_D10
VDD_D4
VDD33
VDDE6_L7
VDDE6_K11
VDDE6_E6
VDDEMLB
MLB (2.5V-3.3V)
VRC (3.3V OR 5V)
ADC
VDDSYN
4
F6
L6
L11
C2
0.1UF
A12
U2B
VSSA
B
C1
1000PF
C15
VDDSYN
U1B
PLL (3.3V)
2
VSSA
VSSSYN
1
A15
VRC
VSSSYN
1
5
2
1
256 and 208 MCU Power
D
D
I/O (3.3V-5V)
GROUND PINS
C
MPC5668
C
GND
VDDENEX
J1
VDDENEX
I/O (3.3V-5V)
B
GROUND PINS
GND
PT2
1
A
Microcontroller Solutions Group
6501 William Cannon Drive West
Austin, TX 78735-8598
Drawn by:
R62709
Page Title:
Approved:
R64495
Size
C
Document Number
Date:
Wednesday, June 09, 2010
1
Sheet
4
of
A
This document contains information proprietary to Freescale Semiconductor and shall not be used for
engineering design, procurement or manufacture in whole or in part without the express written permission
of Freescale Semiconductor.
ICAP Classification:
FCP: ____
FIUO: X
PUBI: ____
Designer:
Drawing Title:
R62709
MPC5668ADP
256 & 208 Power
SCH-25195 PDF: SPF-25195
Rev
B
5
5
4
3
2
1
D
D
VDDENEX
Jumper allows JTAG RESET to be routed via
buffers or to be directly connected to the MCU
RESETx bi-directional pin (for debug hardware
that can monitor the state of the target reset).
C
C
R1
NEXUS Connector
10.0K
P1
MDO9
(pg2,3) MCU-RSTx
(pg2,3) TDO
(pg2,3)
(pg2,3)
(pg2,3)
(pg2,3)
TCK
TMS
TDI
JCOMP
MCU-RSTx
TDO
TCK
TMS
TDI
JCOMP
TDO
MDO10
TCK
TMS
TDI
JCOMP (TRST)
MDO11
39
40
GND
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
G1
G2
NEXUS Conenctor (MICTOR)
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
G3
G4
G5
G1..G5 = MICTOR
Centre Ground Pins
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
PK[0..10]
(PK9 CLKOUT)
PK[0..10]
(pg2,3)
PK9 (CLKOUT)
MDO8
EVTI
VREF
MDO7
MDO6
MDO5
MDO4
MDO3
MDO2
MDO1
MDO0
EVTO
MCKO
MSEO[1]
MSEO[0]
41
42
43
MDO[0..11]
EVTI
EVTO
MCKO
MSEO[1]
MSEO[0]
(pg2)
(pg2)
(pg2)
(pg2)
(pg2)
MDO[0..11]
(pg2)
GND
B
B
Microcontroller Solutions Group
A
A
6501 William Cannon Drive West
Austin, TX 78735-8598
This document contains information proprietary to Freescale Semiconductor and shall not be used for
engineering design, procurement or manufacture in whole or in part without the express written permission
of Freescale Semiconductor.
ICAP Classification:
FCP: ____
FIUO: X
PUBI: ____
Designer:
Drawing Title:
R62709
MPC5668ADP
5
4
3
2
Drawn by:
R62709
Page Title:
Approved:
R64495
Size
C
Document Number
Date:
Wednesday, June 09, 2010
Debug Circuitry
Rev
B
SCH-25195 PDF: SPF-25195
Sheet
1
5
of
5
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