INTEGRATED CIRCUITS PCA9531 8-bit I2C LED dimmer Product data Philips Semiconductors 2003 Nov 10 Philips Semiconductors Product data 8-bit I2C LED dimmer PCA9531 DESCRIPTION The PCA9531 is an 8-bit I2C & SMBus I/O expander optimized for dimming LEDs in 256 discrete steps for Red/Green/Blue (RGB) color mixing and back light applications. The PCA9531 contains an internal oscillator with two user programmable blink rates and duty cycles coupled to the output PWM. The LED brightness is controlled by setting the blink rate high enough (> 100 Hz) that the blinking can not be seen and then using the duty cycle to vary the amount of time the LED is on and thus the average current through the LED. FEATURES • Eight LED drivers (on, off, flashing at a programmable rate) • Two selectable, fully programmable blink rates (frequency and The initial setup sequence programs the two blink rates/duty cycles for each individual PWM. From then on, only one command from the bus master is required to turn individual LEDs ON, OFF, BLINK RATE 1 or BLINK RATE 2. Based on the programmed frequency and duty cycle, BLINK RATE 1 and BLINK RATE 2 will cause the LEDs to appear at a different brightness or blink at periods up to 1.6 second. The open drain outputs directly drive the LEDs with maximum output sink current of 25 mA per bit and 100 mA per package. duty cycle) between 0.625 and 160 Hz (1.6 and 6.25 milliseconds) • 256 brightness steps • Input/outputs not used as LED drivers can be used as regular GPIOs • Internal oscillator requires no external components • I2C interface logic compatible with SMBus • Internal power-on reset • Noise filter on SCL/SDA inputs • Active low reset input • Eight open drain outputs directly drive LEDs to 25 mA • Edge rate control on outputs • No glitch on power-up • Supports hot insertion • Low stand-by current • Operating power supply voltage range of 2.3 V to 5.5 V • 0 to 400 kHz clock frequency • ESD protection exceeds 2000 V HBM per JESD22-A114, To blink LEDs at periods greater than 1.6 second the bus master (MCU, MPU, DSP, chipset, etc.) must send repeated commands to turn the LED on and off as is currently done when using normal I/O Expanders like the Philips PCF8574 or PCA9554. Any bits not used for controlling the LEDs can be used for General Purpose Parallel Input/Output (GPIO) expansion which provides a simple solution when additional I/O is needed for ACPI power switches, sensors, push-buttons, alarm monitoring, fans, etc. The active low hardware reset pin (RESET) and Power On Reset (POR) initializes the registers to their default state causing the bits to be set high (LED off). Three hardware address pins on the PCA9531 allow eight devices to operate on the same bus. 150 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101 • Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA • Package offer: SO16, TSSOP16, HVQFN16 ORDERING INFORMATION PACKAGES TEMPERATURE RANGE ORDER CODE TOPSIDE MARK DRAWING NUMBER 16-pin plastic SO 16-pin plastic TSSOP -40 to +85 °C PCA9531D PCA9531D SOT109-1 -40 to +85 °C PCA9531PW PCA9531 16-pin plastic HVQFN -40 to +85 °C PCA9531BS 9531 Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging. I2C is a trademark of Philips Semiconductors Corporation. 2003 Nov 10 2 SOT403-1 SOT629-1 Philips Semiconductors Product data 8-bit I2C LED dimmer PCA9531 LED0 4 13 RESET LED1 5 12 LED7 LED2 6 11 LED6 LED3 7 10 LED5 9 LED4 13 A2 1 12 SCL LED0 2 11 RESET LED1 3 10 LED7 LED2 4 9 5 VSS 8 SDA LED3 LED6 8 14 SCL VDD 14 15 SDA A2 3 A0 7 A1 2 A1 15 16 VDD 6 A0 1 PIN CONFIGURATION — HVQFN 16 PIN CONFIGURATION — SO, TSSOP VSS LED4 LED5 SW02039 TOP VIEW Figure 1. Pin configuration — SO, TSSOP su01667 Figure 2. Pin configuration — HVQFN PIN DESCRIPTION SO, TSSOP PIN NUMBER HVQFN PIN NUMBER SYMBOL 1 15 A0 Address input 0 2 16 A1 Address input 1 FUNCTION 3 1 A2 Address input 2 4, 5, 6, 7 2, 3, 4, 5 LED0-3 LED drivers 0-3 8 6 VSS 9, 10, 11, 12 7, 8, 9, 10 LED4-7 LED drivers 4-7 13 11 RESET Active low reset input 14 12 SCL Serial clock line 15 13 SDA Serial data line 16 14 VDD Supply voltage 2003 Nov 10 Supply ground 3 Philips Semiconductors Product data 8-bit I2C LED dimmer PCA9531 BLOCK DIAGRAM A2 A1 A0 PCA9531 INPUT REGISTER SCL INPUT FILTERS I 2C-BUS CONTROL LED SELECT (LSx) REGISTER SDA 0 1 LEDx VDD POWER-ON RESET RESET OSCILLATOR PRESCALER 0 REGISTER PWM0 REGISTER BLINK0 PRESCALER 1 REGISTER PWM1 REGISTER BLINK1 VSS NOTE: ONLY ONE I/O SHOWN FOR CLARITY SW02040 Figure 3. Block diagram 2003 Nov 10 4 Philips Semiconductors Product data 8-bit I2C LED dimmer PCA9531 INPUT — INPUT REGISTER DEVICE ADDRESSING Following a START condition the bus master must output the address of the slave it is accessing. The address of the PCA9531 is shown in Figure 4. To conserve power, no internal pullup resistors are incorporated on the hardware selectable address pins and they must be pulled HIGH or LOW. 1 0 0 A2 A1 7 6 5 4 3 2 1 0 Default X X X X X X X X The INPUT register reflects the state of the device pins. Writes to this register will be acknowledged but will have no effect. PSC0 — FREQUENCY PRESCALER 0 SLAVE ADDRESS 1 bit A0 R/W bit 7 6 5 4 3 2 1 0 default 0 0 0 0 0 0 0 0 PSC0 is used to program the period of the PWM output. FIXED HARDWARE SELECTABLE The period of BLINK0 + su01420 PWM0 — PWM REGISTER 0 Figure 4. Slave address The last bit of the address byte defines the operation to be performed. When set to logic 1 a read is selected while a logic 0 selects a write operation. Following the successful acknowledgement of the slave address, the bus master will send a byte to the PCA9531 which will be stored in the Control Register. 0 0 AI 0 B2 B1 B0 AUTO-INCREMENT FLAG SW01034 B0 REGISTER NAME TYPE 0 INPUT READ INPUT REGISTER 0 0 1 PSC0 READ/ WRITE FREQUENCY PRESCALER 0 0 1 0 PWM0 READ/ WRITE PWM REGISTER 0 0 1 1 PSC1 READ/ WRITE FREQUENCY PRESCALER 1 1 0 0 PWM1 READ/ WRITE PWM REGISTER 1 LED0-LED3 SELECTOR LED4-LED7 SELECTOR 0 1 LS0 1 1 0 LS1 READ/ WRITE 3 2 1 0 0 0 0 0 0 bit 7 6 5 4 3 2 1 0 default 0 0 0 0 0 0 0 0 bit 7 6 5 4 3 2 1 0 default 1 0 0 0 0 0 0 0 The PWM1 register determines the duty cycle of BLINK1. The outputs are LOW (LED on) when the count is less than the value in PWM1 and HIGH (LED off) when it is greater. If PWM1 is programmed with 00h, then the PWM1 output is always HIGH (LED off) . The duty cycle of BLINK1 is: PWM1 256 LS0 — LED0-3 SELECTOR LED 3 LED 2 LED 1 LED 0 bit 7 6 5 4 3 2 1 0 default 0 0 0 0 0 0 0 0 LS1 — LED4-7 SELECTOR LED 7 REGISTER DESCRIPTION The lowest 3 bits are used as a pointer to determine which register will be accessed. If the auto-increment flag is set, the three low order bits of the Control Register are automatically incremented after a read or write. This allows the user to program the registers sequentially. The contents of these bits will rollover to ‘000’ after the last register is accessed. LED 6 LED 5 LED 4 bit 7 6 5 4 3 2 1 0 default 0 0 0 0 0 0 0 0 The LSx LED select registers determine the source of the LED data. 00 = Output is set Hi-Z (LED off - default) 01 = Output is set low (LED on) 10 = Output blinks at PWM0 rate 11 = Output blinks at PWM1 rate When auto-increment flag is set (AI = 1) and a read sequence is initiated, the sequence must start by reading a register different from the input register (B2 B1 B0 0 0 0 0). Only the 3 least significant bits are affected by the AI flag. Unused bits must be programmed with zeroes. 2003 Nov 10 (PSC1 ) 1) 152 PWM1 — PWM REGISTER 1 REGISTER FUNCTION 0 1 4 0 The period of BLINK1 + 0 READ/ WRITE 5 0 PSC1 is used to program the period of PWM output. CONTROL REGISTER DEFINITION B1 6 1 PSC1 — FREQUENCY PRESCALER 1 Figure 5. Control register B2 7 The duty cycle of BLINK0 is: PWM0 256 REGISTER ADDRESS RESET STATE: 00h bit default The PWM0 register determines the duty cycle of BLINK0. The outputs are LOW (LED on) when the count is less than the value in PWM0 and HIGH (LED off) when it is greater. If PWM0 is programmed with 00h, then the PWM0 output is always HIGH (LED off). CONTROL REGISTER 0 (PSC0 ) 1) 152 5 Philips Semiconductors Product data 8-bit I2C LED dimmer PCA9531 POWER-ON RESET When power is applied to VDD, an internal Power On Reset holds the PCA9531 in a reset state until VDD has reached VPOR. At this point, the reset condition is released and the PCA9531 registers are initialized to their default states, all the outputs in the off state. SDA SCL EXTERNAL RESET data line stable; data valid A reset can be accomplished by holding the RESET pin low for a minimum of tW. The PCA9531 registers and I2C state machine will be held in their default state until the RESET input is once again high. change of data allowed SW00363 Figure 6. Bit transfer This input requires a pull-up resistor to VDD. Start and stop conditions Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the clock is HIGH is defined as the start condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the stop condition (P) (see Figure 7). CHARACTERISTICS OF THE I2C-BUS I2C-bus The is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device. Data transfer may be initiated only when the bus is not busy. System configuration A device generating a message is a transmitter: a device receiving is the receiver. The device that controls the message is the master and the devices which are controlled by the master are the slaves (see Figure 8). Bit transfer One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the HIGH period of the clock pulse as changes in the data line at this time will be interpreted as control signals (see Figure 6). SDA SDA SCL SCL S P START condition STOP condition SW00365 Figure 7. Definition of start and stop conditions SDA SCL MASTER TRANSMITTER/ RECEIVER SLAVE RECEIVER SLAVE TRANSMITTER/ RECEIVER MASTER TRANSMITTER MASTER TRANSMITTER/ RECEIVER I 2C MULTIPLEXER SLAVE SW00366 Figure 8. System configuration 2003 Nov 10 6 Philips Semiconductors Product data 8-bit I2C LED dimmer PCA9531 Acknowledge The number of data bytes transferred between the start and the stop conditions from transmitter to receiver is not limited. Each byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter whereas the master generates an extra acknowledge related clock pulse. A slave receiver which is addressed must generate an acknowledge after the reception of each byte. Also a master must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges has to pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse, set-up and hold times must be taken into account. A master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event, the transmitter must leave the data line HIGH to enable the master to generate a stop condition. DATA OUTPUT BY TRANSMITTER not acknowledge DATA OUTPUT BY RECEIVER acknowledge SCL FROM MASTER 1 2 8 9 S clock pulse for acknowledgement START condition SW00368 Figure 9. Acknowledgement on the 2003 Nov 10 7 I2C-bus Philips Semiconductors Product data 8-bit I2C LED dimmer PCA9531 Bus transactions 1 SCL 2 3 4 5 6 7 8 9 command byte slave address SDA S 1 1 0 0 A2 A1 A0 start condition 0 R/W A 0 0 0 AI 0 data to register B2 B1 B0 acknowledge from slave DATA 1 A A acknowledge from slave acknowledge from slave WRITE TO REGISTER DATA OUT FROM PORT DATA 1 VALID tpv SW01081 Figure 10. WRITE to register acknowledge from slave slave address S 1 1 0 0 A2 A1 A0 A 0 acknowledge from slave 0 0 0 AI 0 B2 B1 B0 A S acknowledge from slave slave address 1 1 0 0 A2 A1 R/W A0 1 acknowledge from master data from register DATA A A first byte R/W auto-increment register address if AI = 1 at this moment master-transmitter becomes master-receiver and slave-receiver becomes slave-transmitter data from register no acknowledge from master NA DATA P last byte SW01082 Figure 11. READ from register slave address SDA S 1 1 0 0 start condition A2 data from port A1 A0 1 R/W data from port DATA 1 A A acknowledge from slave DATA 4 acknowledge from master NA no acknowledge from master P stop condition READ FROM PORT DATA INTO PORT DATA 1 DATA 2 DATA 3 tph DATA 4 tps SW01084 NOTES: 1. This figure assumes the command byte has previously been programmed with 00h. Figure 12. READ input port register 2003 Nov 10 8 Philips Semiconductors Product data 8-bit I2C LED dimmer PCA9531 APPLICATION DATA 5V 5V VDD SDA SDA LED0 SCL SCL LED1 RESET LED2 LED3 LED4 LED5 LED6 I 2C/SMBus MASTER GPIO LED7 A2 A1 A0 Note: LED0 to LED5 are used as LED drivers LED6 and LED7 are used as regular GPIOs. VSS PCA9531 SW02041 Figure 13. Typical application Minimizing IDD when the I/O is used to control LEDs When the I/Os are used to control LEDs, they are normally connected to VDD through a resistor as shown in Figure 13. Since the LED acts as a diode, when the LED is off the I/O VIN is about 1.2 V less than VDD. The supply current , IDD, increases as VIN becomes lower than VDD and is specified as ∆IDD in the DC characteristics table. Designs needing to minimize current consumption, such as battery power applications, should consider maintaining the I/O pins greater than or equal to VDD when the LED is off. Figure 14 shows a high value resistor in parallel with the LED. Figure 15 shows VDD less than the LED supply voltage by at least 1.2 V. Both of these methods maintain the I/O VIN at or above VDD and prevents additional supply current consumption when the LED is off. VDD LED 3.3 V 100 k VDD VDD LEDx LED LEDx SW02087 SW02086 Figure 14. High value resistor in parallel with the LED 2003 Nov 10 5V Figure 15. Device supplied by a lower voltage 9 Philips Semiconductors Product data 8-bit I2C LED dimmer PCA9531 Programming example The following example will show how to set LED0 to LED3 on. It will then set LED4 and LED5 to blink at 1 Hz at a 50% duty cycle. LED6 and LED7 will be set to be dimmed at 25% of their maximum brightness (duty cycle = 25%). Table 1. I2C-bus Start S PCA9531 address with A0-A2 = low C0h PSC0 subaddress + auto-increment 11h Set prescaler PSC0 to achieve a period of 1 second: Blink period + 1 + PSC0 ) 1 152 PSC0 = 151 97h Set PWM0 duty cycle to 50%: 80h PWM0 + 0.5 256 PWM0 = 128 Set prescaler PCS1 to dim at max frequency: 00h Blink period + max PSC1 = 0 Set PWM1 output duty cycle to 25%: 40h PWM1 + 0.25 256 PWM1 = 64 Set LED0 to LED3 on 55h Set LED4 and 5 to PWM0, and LED6 or 7 to PWM1 FAh Stop P 2003 Nov 10 10 Philips Semiconductors Product data 8-bit I2C LED dimmer PCA9531 ABSOLUTE MAXIMUM RATINGS In accordance with the Absolute Maximum Rating System (IEC 134) PARAMETER SYMBOL CONDITIONS MIN MAX UNIT -0.5 6.0 V VDD Supply voltage VI/O DC voltage on an I/O VSS - 0.5 5.5 V II/O DC output current on an I/O — +25 mA ISS Supply current — 200 mA Ptot Total power dissipation — 400 mW Tstg Storage temperature range -65 +150 °C Tamb Operating ambient temperature -40 +85 °C HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take precautions appropriate to handling MOS devices. Advice can be found in Data Handbook IC24 under ”Handling MOS devices”. DC CHARACTERISTICS VDD = 2.3 to 5.5 V; VSS = 0 V; Tamb = -40 to +85 °C; unless otherwise specified. TYP at 3.3 V and 25 °C. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT Supplies VDD Supply voltage 2.3 — 5.5 V — 350 500 µA IDD Supply current Operating mode; VDD = 5.5 V; VI = VDD or VSS; fSCL = 100 kHz Istb Standby current Standby mode; VDD = 5.5 V; VI = VDD or VSS; fSCL = 0 kHz — 1.9 3.0 µA ∆IDD Additional standby current Standby mode; VDD = 5.5 V; Every LED I/O at VIN = 4.3 V; fSCL = 0 kHz — — 800 µA VPOR Power-on reset voltage No load; VI = VDD or VSS — 1.7 2.2 V V Input SCL; input/output SDA VIL LOW level input voltage -0.5 — 0.3 VDD VIH HIGH level input voltage 0.7 VDD — 5.5 V IOL LOW level output current VOL = 0.4V 3 6.5 — mA IL Leakage current VI = VDD = VSS -1 — +1 µA CI Input capacitance VI = VSS — 3.7 5 pF VIL LOW level input voltage -0.5 — 0.8 V VIH HIGH level input voltage I/Os IOL IL CIO LOW level output current Input leakage current 2.0 — 5.5 V VOL = 0.4 V; VDD = 2.3 V; Note 1 9 — — mA VOL = 0.4 V; VDD = 3.0 V; Note 1 12 — — mA VOL = 0.4 V; VDD = 5.0 V; Note 1 15 — — mA VOL = 0.7 V; VDD = 2.3 V; Note 1 15 — — mA VOL = 0.7 V; VDD = 3.0 V; Note 1 20 — — mA VOL = 0.7 V; VDD = 5.0 V; Note 1 25 — — mA VDD = 3.6 V; VI = 0 or VDD -1 — 1 µA — 2.5 5 pF 0.8 V V Input/output capacitance Select Inputs A0, A1, A2 / RESET VIL LOW level input voltage -0.5 — VIH HIGH level input voltage; A0 / RESET 2.0 — 5.5 VIH HIGH level input voltage; A1 / A2 2.0 — VDD + 0.5 V ILI Input leakage current -1 — 1 µA CI Input capacitance — 2.3 5 pF VI = VSS NOTE: 1. Each I/O must be externally limited to a maximum of 25 mA and the device must be limited to a maximum current of 100 mA. 2003 Nov 10 11 Philips Semiconductors Product data 8-bit I2C LED dimmer PCA9531 AC SPECIFICATIONS SYMBOL STANDARD MODE I2C BUS PARAMETER MIN MAX FAST MODE I2C BUS UNITS MIN MAX fSCL Operating frequency 0 100 0 400 kHz tBUF Bus free time between STOP and START conditions 4.7 — 1.3 — µs tHD;STA Hold time after (repeated) START condition 4.0 — 0.6 — µs tSU;STA Repeated START condition setup time 4.7 — 0.6 — µs tSU;STO Setup time for STOP condition 4.0 — 0.6 — µs tHD;DAT Data in hold time 0 — 0 — ns tVD;ACK Valid time for ACK condition2 — 600 — 600 ns tVD;DAT (L) Data out valid time3 — 600 — 600 ns tVD;DAT (H) Data out valid time3 — 1500 — 600 ns tSU;DAT Data setup time 250 — 100 — ns tLOW Clock LOW period 4.7 — 1.3 — µs tHIGH Clock HIGH period 4.0 — 0.6 — µs 1 tF Clock/Data fall time — 300 20 + 0.1 Cb 300 ns tR Clock/Data rise time — 1000 20 + 0.1 Cb1 300 ns tSP Pulse width of spikes that must be suppressed by the input filters — 50 — 50 ns tPV Output data valid — 200 — 200 ns tPS Input data setup time 100 — 100 — ns tPH Input data hold time 1 — 1 — µs Reset pulse width 6 — 6 — ns Reset recovery time 0 — 0 — ns 400 — 400 — ns Port Timing Reset tW tREC tRESET4,5 Time to reset NOTES: 1. Cb = total capacitance of one bus line in pF. 2. tVD;ACK = time for Acknowledgement signal from SCL low to SDA (out) low. 3. tVD;DAT = minimum time for SDA data out to be valid following SCL low. 4. Resetting the device while actively communicating on the bus may cause glitches or errant STOP conditions. 5. Upon reset, the full delay will be the sum of tRESET and the RC time constant of the SDA bus. 2003 Nov 10 12 Philips Semiconductors Product data 8-bit I2C LED dimmer PCA9531 +20% MAX +10% 0% PERCENT VARIATION -10% AVG -20% -30% MIN -40% -40 0 +25 +70 +85 TEMPERATURE (°C) SW01085 Figure 16. Typical frequency variation over process at VDD = 2.3 V to 3.0 V +20% MAX +10% 0% PERCENT VARIATION AVG -10% -20% MIN -30% -40% -40 0 +25 +70 +85 TEMPERATURE (°C) Figure 17. Typical frequency variation over process at VDD = 3.0 V to 5.5 V 2003 Nov 10 13 SW01086 Philips Semiconductors Product data 8-bit I2C LED dimmer PCA9531 START ACK OR READ CYCLE SCL SDA 30% tREC RESET 50% 50% 50% tREC tW tREC 50% LEDx LED OFF SW01087 Figure 18. Definition of RESET timing SDA tBUF tLOW tR tF tHD;STA tSP SCL tHD;STA P S tSU;STA tHD;DAT tHIGH tSU;DAT Sr tSU;STO P SU00645 Figure 19. Definition of timing 2003 Nov 10 14 Philips Semiconductors Product data 8-bit I2C LED dimmer handbook, full pagewidth PCA9531 BIT 7 MSB (A7) START CONDITION (S) PROTOCOL t t SU;STA BIT 6 (A6) t HIGH LOW BIT 8 (R/W) STOP CONDITION (S) ACKNOWLEDGE (A) 1 / f SCL SCL t t t r BUF f SDA t t HD;STA t SU;DAT t HD;DAT VD;DAT t VD;ACK tSU;STO SW02143 Figure 20. I2C-bus timing diagram; rise and fall times refer to VIL and VIH VDD VDD Open PULSE GENERATOR RL = 500 Ω VO VI D.U.T. RT CL 50Pf DEFINITIONS RL = Load resistor. CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to the output impedance ZO of the pulse generators. SW02142 Figure 21. Test circuitry for switching times 2003 Nov 10 15 Philips Semiconductors Product data 8-bit I2C LED dimmer PCA9531 SO16: plastic small outline package; 16 leads; body width 3.9 mm 2003 Nov 10 16 SOT109-1 Philips Semiconductors Product data 8-bit I2C LED dimmer PCA9531 TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm 2003 Nov 10 17 SOT403-1 Philips Semiconductors Product data 8-bit I2C LED dimmer PCA9531 HVQFN16: plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 4 x 4 x 0.85 mm 2003 Nov 10 18 SOT629-1 Philips Semiconductors Product data 8-bit I2C LED dimmer REVISION HISTORY Rev Date _1 2003 Nov 10 20031110 PCA9531 Description Product data (9397 750 12292); ECN 853-2407 30411 dated 06 September 2003. Initial version 19 Philips Semiconductors Product data 8-bit I2C LED dimmer PCA9531 Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specifications defined by Philips. This specification can be ordered using the code 9398 393 40011. Data sheet status Level Data sheet status[1] Product status[2] [3] Definitions I Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Koninklijke Philips Electronics N.V. 2002 All rights reserved. Printed in U.S.A. Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 Date of release: 11-03 For sales offices addresses send e-mail to: [email protected]. Document order number: Philips Semiconductors 2003 Nov 10 20 9397 750 12292