NTB0101-Q100 Dual supply translating transceiver; auto direction sensing; 3-state Rev. 1 — 3 July 2014 Product data sheet 1. General description The NTB0101-Q100 is a 1-bit, dual supply translating transceiver with auto direction sensing, that enables bidirectional voltage level translation. It features two 1-bit input-output ports (A and B), one output enable input (OE) and two supply pins (VCC(A) and VCC(B)). VCC(A) can be supplied at any voltage between 1.2 V and 3.6 V. VCC(B) can be supplied at any voltage between 1.65 V and 5.5 V. It makes the device suitable for translating between the low voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins A and OE are referenced to VCC(A) and pin B is referenced to VCC(B). A LOW level at pin OE causes the outputs to assume a high-impedance OFF-state. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from 40 C to +85 C and from 40 C to +125 C Wide supply voltage range: VCC(A): 1.2 V to 3.6 V and VCC(B): 1.65 V to 5.5 V ESD protection: MIL-STD-883, method 3015 Class 2 exceeds 2500 V for A port MIL-STD-883, method 3015 Class 3B exceeds 15000 V for B port HBM JESD22-A114E Class 2 exceeds 2500 V for A port HBM JESD22-A114E Class 3B exceeds 15000 V for B port MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) IOFF circuitry provides partial Power-down mode operation Inputs accept voltages up to 5.5 V Latch-up performance exceeds 100 mA per JESD 78B Class II Multiple package options NTB0101-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range NTB0101GW-Q100 40 C to +125 C Name Description Version SC-88 plastic surface-mounted package; 6 leads SOT363 4. Marking Table 2. Marking Type number Marking code[1] NTB0101GW-Q100 t1 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram OE A 5 3 4 VCC(A) B VCC(B) 001aan311 Fig 1. Logic symbol 6. Pinning information 6.1 Pinning 17%4 9&&$ 9&&% *1' 2( $ % DDD Fig 2. Pin configuration SOT363 NTB0101-Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 3 July 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 2 of 21 NTB0101-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state 6.2 Pin description Table 3. Pin description Symbol Pin Description VCC(A) 1 supply voltage A GND 2 ground (0 V) A 3 data input or output (referenced to VCC(A)) B 4 data input or output (referenced to VCC(B)) OE 5 output enable input (active HIGH; referenced to VCC(A)) VCC(B) 6 supply voltage B 7. Functional description Table 4. Function table[1] Supply voltage Input Input/output VCC(A) VCC(B) OE A B 1.2 V to VCC(B) 1.65 V to 5.5 V L Z Z 1.2 V to VCC(B) 1.65 V to 5.5 V H input or output output or input GND[2] GND[2] X Z Z [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. [2] When either VCC(A) or VCC(B) is at GND level, the device goes into Power-down mode. 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC(A) supply voltage A VCC(B) supply voltage B VI input voltage VO output voltage Conditions Active mode Min Max Unit 0.5 +6.5 V 0.5 +6.5 V [1] 0.5 +6.5 V [1][2][3] 0.5 VCCO + 0.5 V [1] 0.5 +6.5 V Power-down or 3-state mode IIK input clamping current VI < 0 V 50 - mA IOK output clamping current VO < 0 V 50 - mA - 50 mA - 100 mA [2] IO output current VO = 0 V to VCCO ICC supply current ICC(A) or ICC(B) IGND ground current 100 - mA Tstg storage temperature 65 +150 C - 250 mW total power dissipation Ptot [1] Tamb = 40 C to +125 C [4] The minimum input and minimum output voltage ratings may be exceeded if the input and output current ratings are observed. [2] VCCO is the supply voltage associated with the output. [3] VCCO + 0.5 V should not exceed 6.5 V. [4] For SC-88 package: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K. NTB0101-Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 3 July 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 3 of 21 NTB0101-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state 9. Recommended operating conditions Table 6. Recommended operating conditions[1][2] Symbol Parameter VCC(A) Conditions Min Max Unit supply voltage A 1.2 3.6 V VCC(B) supply voltage B 1.65 5.5 V VI input voltage 0 5.5 V VO output voltage A port 0 3.6 V B port 0 5.5 V 40 +125 C - 40 ns/V Power-down or 3-state mode; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V Tamb ambient temperature t/V input transition rise and fall rate VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V [1] The A and B sides of an unused I/O pair must be held in the same state, both at VCCI or both at GND. [2] VCC(A) must be less than or equal to VCC(B). 10. Static characteristics Table 7. Typical static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 C. Symbol Parameter Conditions Min Typ Max Unit VOH HIGH-level output voltage A port; VCC(A) = 1.2 V; IO = 20 A - 1.1 - V VOL LOW-level output voltage A port; VCC(A) = 1.2 V; IO = 20 A - 0.09 - V II input leakage current OE input; VI = 0 V to 3.6 V; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V - - 1 A IOZ OFF-state output A or B port; VO = 0 V to VCCO; VCC(A) = 1.2 V to 3.6 V; current VCC(B) = 1.65 V to 5.5 V - - 1 A IOFF power-off leakage current A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V; VCC(B) = 0 V to 5.5 V - - 1 A B port; VI or VO = 0 V to 5.5 V; VCC(B) = 0 V; VCC(A) = 0 V to 3.6 V - - 1 A [1] CI input capacitance OE input; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V - 1.0 - pF CI/O input/output capacitance A port; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V - 4.0 - pF B port; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V - 7.5 - pF [1] VCCO is the supply voltage associated with the output. [2] VCCI is the supply voltage associated with the input. NTB0101-Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 3 July 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 4 of 21 NTB0101-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state Table 8. Typical supply current At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 C. VCC(A) VCC(B) 1.8 V Unit 2.5 V 3.3 V 5.0 V ICC(A) ICC(B) ICC(A) ICC(B) ICC(A) ICC(B) ICC(A) ICC(B) 1.2 V 10 10 10 10 10 20 10 1050 nA 1.5 V 10 10 10 10 10 10 10 650 nA 1.8 V 10 10 10 10 10 10 10 350 nA 2.5 V - - 10 10 10 10 10 40 nA 3.3 V - - - - 10 10 10 10 nA Table 9. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter VIH VIL VOH 40 C to +85 C Conditions Min Max Min Max 0.65VCCI - 0.65VCCI - V - 0.35VCCI - 0.35VCCI V VCCO 0.4 - VCCO 0.4 - V VCCO 0.4 - VCCO 0.4 - V A port; VCC(A) = 1.4 V to 3.6 V - 0.4 - 0.4 V B port; VCC(B) = 1.65 V to 5.5 V - 0.4 - 0.4 V - 2 - 5 A - 2 - 10 A HIGH-level input voltage A or B port and OE input LOW-level input voltage A or B port and OE input HIGH-level output voltage IO = 20 A LOW-level output voltage Unit [1] VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V [1] VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V [2] A port; VCC(A) = 1.4 V to 3.6 V B port; VCC(B) = 1.65 V to 5.5 V VOL 40 C to +125 C IO = 20 A [2] II input leakage current OE input; VI = 0 V to 3.6 V; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V IOZ OFF-state output current A or B port; VO = 0 V or VCCO; VCC(A) = 1.2 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V IOFF power-off leakage current A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V; VCC(B) = 0 V to 5.5 V - 2 - 10 A B port; VI or VO = 0 V to 5.5 V; VCC(B) = 0 V; VCC(A) = 0 V to 3.6 V - 2 - 10 A NTB0101-Q100 Product data sheet [2] All information provided in this document is subject to legal disclaimers. Rev. 1 — 3 July 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 5 of 21 NTB0101-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state Table 9. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter ICC supply current 40 C to +85 C Conditions 40 C to +125 C Unit Min Max Min Max OE = LOW; VCC(A) = 1.4 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V - 3 - 15 A OE = HIGH; VCC(A) = 1.4 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V - 3 - 20 A VCC(A) = 3.6 V; VCC(B) = 0 V - 2 - 15 A VCC(A) = 0 V; VCC(B) = 5.5 V - 2 - 15 A OE = LOW; VCC(A) = 1.4 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V - 5 - 15 A OE = HIGH; VCC(A) = 1.4 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V - 5 - 20 A VCC(A) = 3.6 V; VCC(B) = 0 V - 2 - 15 A VCC(A) = 0 V; VCC(B) = 5.5 V - 2 - 15 A - 8 - 40 A [1] VI = 0 V or VCCI; IO = 0 A ICC(A) ICC(B) ICC(A) + ICC(B) VCC(A) = 1.4 V to 3.6 V; VCC(B) = 1.65 V to 5.5 V [1] VCCI is the supply voltage associated with the input. [2] VCCO is the supply voltage associated with the output. 11. Dynamic characteristics Table 10. Typical dynamic characteristics for temperature 25 C[1] Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 5; for waveforms, see Figure 3 and Figure 4. Symbol Parameter Conditions VCC(B) Unit 1.8 V 2.5 V 3.3 V 5.0 V A to B 5.9 4.8 4.4 4.2 ns B to A 5.6 4.8 4.5 4.4 ns VCC(A) = 1.2 V tpd propagation delay ten enable time OE to A, B 0.5 0.5 0.5 0.5 s tdis disable time OE to A; no external load [2] 6.9 6.9 6.9 6.9 ns OE to B; no external load [2] 9.5 8.6 8.5 8.0 ns OE to A 81 69 83 68 ns OE to B 81 69 83 68 ns NTB0101-Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 3 July 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 6 of 21 NTB0101-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state Table 10. Typical dynamic characteristics for temperature 25 C[1] …continued Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 5; for waveforms, see Figure 3 and Figure 4. Symbol Parameter Conditions VCC(B) Unit 1.8 V 2.5 V 3.3 V 5.0 V tt transition time A port 4.0 4.0 4.1 4.1 B port 2.6 2.0 1.7 1.4 ns tW pulse width data inputs 15 13 13 13 ns fdata data rate 70 80 80 80 Mbps [1] ns tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. tt is the same as tTHL and tTLH [2] Delay between OE going LOW and when the outputs are disabled. Table 11. Dynamic characteristics for temperature range 40 C to +85 C[1] Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 5; for wave forms see Figure 3 and Figure 4. Symbol Parameter Conditions VCC(B) Unit 1.8 V ± 0.15 2.5 V ± 0.2 3.3 V ± 0.3 5.0 V ± 0.5 Min Max Min Max Min Max Min Max VCC(A) = 1.5 V ± 0.1 tpd ten tdis propagation delay A to B 1.4 12.9 1.2 10.1 1.1 10.0 0.8 9.9 B to A 0.9 14.2 0.7 12.0 0.4 11.7 0.3 13.7 ns enable time OE to A, B - 1.0 - 1.0 - 1.0 - disable time ns 1.0 s 1.0 11.9 ns 1.0 13.8 ns OE to A; no external load [2] 1.0 11.9 1.0 11.9 1.0 11.9 OE to B; no external load [2] 1.0 16.9 1.0 15.2 1.0 14.1 OE to A - 320 - 260 - 260 - 280 ns OE to B - 200 - 200 - 200 - 200 ns transition time A port 0.9 5.1 0.9 5.1 0.9 5.1 0.9 5.1 ns B port 0.9 4.7 0.6 3.2 0.5 2.5 0.4 2.7 ns tW pulse width data inputs 25 - 25 - 25 - 25 - ns fdata data rate - 40 - 40 - 40 - 40 Mbps tt VCC(A) = 1.8 V ± 0.15 tpd ten tdis propagation delay A to B 1.6 11.0 1.4 7.7 1.3 6.8 1.2 6.5 ns B to A 1.5 12.0 1.3 8.4 1.0 7.6 0.9 7.1 ns enable time OE to A, B - 1.0 - 1.0 - 1.0 - 1.0 s ns disable time OE to A; no external load [2] 1.0 11.0 1.0 11.0 1.0 11.0 1.0 11.0 OE to B; no external load [2] 1.0 15.4 1.0 13.5 1.0 12.4 1.0 12.1 ns OE to A - 260 - 230 - 230 - 230 ns OE to B - 200 - 200 - 200 - 200 ns transition time A port 0.8 4.1 0.8 4.1 0.8 4.1 0.8 4.1 ns B port 0.9 4.7 0.6 3.2 0.5 2.5 0.4 2.7 ns tW pulse width data inputs 20 - 17 - 17 - 17 - ns fdata data rate - 49 - 60 - 60 - 60 tt NTB0101-Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 3 July 2014 Mbps © NXP Semiconductors N.V. 2014. All rights reserved. 7 of 21 NTB0101-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state Table 11. Dynamic characteristics for temperature range 40 C to +85 C[1] …continued Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 5; for wave forms see Figure 3 and Figure 4. Symbol Parameter Conditions VCC(B) Unit 1.8 V ± 0.15 2.5 V ± 0.2 3.3 V ± 0.3 5.0 V ± 0.5 Min Max Min Max Min Max Min Max VCC(A) = 2.5 V ± 0.2 tpd propagation delay A to B - - 1.1 6.3 1.0 5.2 0.9 4.7 ns B to A - - 1.2 6.6 1.1 5.1 0.9 4.4 ns enable time OE to A, B 1.0 - 1.0 - 1.0 s ns - - - OE to A; no external load [2] - - 1.0 9.2 1.0 9.2 1.0 9.2 OE to B; no external load [2] - - 1.0 11.9 1.0 10.7 1.0 10.2 ns OE to A - - - 200 - 200 - 200 ns OE to B - - - 200 - 200 - 200 ns transition time A port - - 0.7 3.0 0.7 3.0 0.7 3.0 ns B port - - 0.7 3.2 0.5 2.5 0.4 2.7 ns tW pulse width data inputs - - 12 - 10 - 10 - ns fdata data rate - - - 85 - 100 - 100 Mbps ten disable time tdis tt VCC(A) = 3.3 V ± 0.3 tpd propagation delay A to B - - - - 0.9 4.7 0.8 4.0 ns B to A - - - - 1.0 4.9 0.9 3.8 ns enable time OE to A, B 1.0 - 1.0 s - - - - - OE to A; no external load [2] - - - - 1.0 9.2 1.0 9.2 ns OE to B; no external load [2] - - - - 1.0 10.1 1.0 9.6 ns OE to A - - - - - 260 - 260 ns OE to B - - - - - 200 - 200 ns transition time A port - - - - 0.7 2.5 0.7 2.5 ns B port - - - - 0.5 2.5 0.4 2.7 ns tW pulse width data inputs - - - - 10 - 10 - ns fdata data rate - - - - - 100 - 100 ten disable time tdis tt [1] Mbps tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. tt is the same as tTHL and tTLH. [2] Delay between OE going LOW and when the outputs are disabled. NTB0101-Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 3 July 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 8 of 21 NTB0101-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state Table 12. Dynamic characteristics for temperature range 40 C to +125 C[1] Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 5; for wave forms see Figure 3 and Figure 4. Symbol Parameter Conditions VCC(B) Unit 1.8 V ± 0.15 2.5 V ± 0.2 3.3 V ± 0.3 5.0 V ± 0.5 Min Max Min Max Min Max Min Max VCC(A) = 1.5 V ± 0.1 tpd propagation delay A to B 1.4 15.9 1.2 13.1 1.1 13.0 0.8 12.9 ns B to A 0.9 17.2 0.7 15.0 0.4 14.7 0.3 16.7 ns ten enable time OE to A, B - 1.0 - 1.0 - 1.0 - OE to A; no external load [2] 1.0 12.5 1.0 12.5 1.0 12.5 1.0 12.5 ns OE to B; no external load [2] 1.0 18.1 1.0 16.2 1.0 14.9 1.0 14.6 ns OE to A - 340 - 280 - 280 - 300 ns OE to B - 220 - 220 - 220 - 220 ns tdis disable time 1.0 s transition time A port 0.9 7.1 0.9 7.1 0.9 7.1 0.9 7.1 ns B port 0.9 6.5 0.6 5.2 0.5 4.8 0.4 4.7 ns tW pulse width data inputs 25 - 25 - 25 - 25 - ns fdata data rate - 40 - 40 - 40 - 40 Mbps ns tt VCC(A) = 1.8 V ± 0.15 tpd propagation delay A to B 1.6 14.0 1.4 10.7 1.3 9.8 1.2 9.5 B to A 1.5 15.0 1.3 11.4 1.0 10.6 0.9 10.1 ns ten enable time OE to A, B - 1.0 - 1.0 - 1.0 - 1.0 s OE to A; no external load [2] 1.0 11.5 1.0 11.5 1.0 11.5 1.0 11.5 ns OE to B; no external load [2] 1.0 16.5 1.0 14.5 1.0 13.3 1.0 12.7 ns OE to A - 280 - 250 - 250 - 250 ns OE to B - 220 - 220 - 220 - 220 ns tdis disable time transition time A port 0.8 6.2 0.8 6.1 0.8 6.1 0.8 6.1 ns B port 0.9 5.8 0.6 5.2 0.5 4.8 0.4 4.7 ns tW pulse width data inputs 22 - 19 - 19 - 19 - ns fdata data rate - 45 - 55 - 55 - 55 Mbps ns tt VCC(A) = 2.5 V ± 0.2 tpd propagation delay A to B - - 1.1 9.3 1.0 8.2 0.9 7.7 B to A - - 1.2 9.6 1.1 8.1 0.9 7.4 ns ten enable time OE to A, B - - - 1.0 - 1.0 - 1.0 s tdis disable time OE to A; no external load [2] - - 1.0 9.6 1.0 9.6 1.0 9.6 ns OE to B; no external load [2] - - 1.0 12.6 1.0 11.4 1.0 10.8 ns OE to A - - - 220 - 220 - 220 ns OE to B - - - 220 - 220 - 220 ns transition time A port - - 0.7 5.0 0.7 5.0 0.7 5.0 ns B port - - 0.7 4.6 0.5 4.8 0.4 4.7 ns tW pulse width data inputs; - - 14 - 13 - 10 - fdata data rate - - - 75 - 80 - 100 tt NTB0101-Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 3 July 2014 ns Mbps © NXP Semiconductors N.V. 2014. All rights reserved. 9 of 21 NTB0101-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state Table 12. Dynamic characteristics for temperature range 40 C to +125 C[1] …continued Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 5; for wave forms see Figure 3 and Figure 4. Symbol Parameter Conditions VCC(B) Unit 1.8 V ± 0.15 2.5 V ± 0.2 3.3 V ± 0.3 5.0 V ± 0.5 Min Max Min Max Min Max Min Max VCC(A) = 3.3 V ± 0.3 tpd propagation delay A to B - - - - 0.9 7.7 0.8 7.0 ns B to A - - - - 1.0 7.9 0.9 6.8 ns enable time OE to A, B 1.0 - 1.0 s - - - - - OE to A; no external load [2] - - - - 1.0 9.5 1.0 9.5 ns OE to B; no external load [2] - - - - 1.0 10.7 1.0 9.6 ns OE to A - - - - - 280 - 280 ns OE to B - - - - - 220 - 220 ns transition time A port - - - - 0.7 4.5 0.7 4.5 ns B port - - - - 0.5 4.1 0.4 4.7 ns tW pulse width data inputs - - - - 10 - 10 - ns fdata data rate - - - - - 100 - 100 ten disable time tdis tt [1] Mbps tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. tt is the same as tTHL and tTLH. [2] Delay between OE going LOW and when the outputs are disabled. NTB0101-Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 3 July 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 10 of 21 NTB0101-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state Table 13. Typical power dissipation capacitance Voltages are referenced to GND (ground = 0 V); Tamb = 25 °C.[1][2] Symbol Parameter VCC supply voltage power dissipation capacitance CPD Conditions Unit on pin VCC(A) 1.2 1.2 1.5 1.8 2.5 2.5 on pin VCC(B) 1.8 5.0 1.88 1.8 2.5 5.0 5 5 5 5 5 5 3.3 V 3.3 to 5.0 V outputs enabled; OE = VCC(A) A port: (direction A to B) 5 pF A port: (direction B to A) 8 8 8 8 8 8 8 pF B port: (direction A to B) 18 18 18 18 18 18 18 pF B port: (direction B to A) 13 16 12 12 12 12 13 pF A port: (direction A to B) 0.12 0.12 0.04 0.05 0.08 0.08 0.07 pF A port: (direction B to A) 0.01 0.01 0.01 0.01 0.01 0.01 0.01 pF B port: (direction A to B) 0.01 0.01 0.01 0.01 0.01 0.01 0.01 pF B port: (direction B to A) 0.07 0.09 0.07 0.07 0.05 0.09 0.09 pF outputs disabled; OE = GND [1] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD VCC2 fi N + (CL VCC2 fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL VCC2 fo) = sum of the outputs. [2] fi = 10 MHz; VI = GND to VCC; tr = tf = 1 ns; CL = 0 pF; RL = . 12. Waveforms VI A, B input VM GND tPHL VOH B, A output VOL tPLH 90 % VM 10 % tTHL tTLH 001aan315 Measurement points are given in Table 14. VOL and VOH are typical output voltage levels that occur with the output load. Fig 3. Data input (A, B) to data output (B, A) propagation delay times NTB0101-Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 3 July 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 11 of 21 NTB0101-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state VI OE input VM GND tPLZ output LOW-to-OFF OFF-to-LOW tPZL VCCO VM VX VOL tPHZ VOH tPZH VY output HIGH-to-OFF OFF-to-HIGH VM GND outputs enabled outputs disabled outputs enabled 001aal919 Measurement points are given in Table 14. VOL and VOH are typical output voltage levels that occur with the output load. Fig 4. Enable and disable times Table 14. Measurement points[1] Supply voltage Input Output VCCO VM VM VX VY 1.2 V 0.5VCCI 0.5VCCO VOL + 0.1 V VOH 0.1 V 1.5 V 0.1 V 0.5VCCI 0.5VCCO VOL + 0.1 V VOH 0.1 V 1.8 V 0.15 V 0.5VCCI 0.5VCCO VOL + 0.15 V VOH 0.15 V 2.5 V 0.2 V 0.5VCCI 0.5VCCO VOL + 0.15 V VOH 0.15 V 3.3 V 0.3 V 0.5VCCI 0.5VCCO VOL + 0.3 V VOH 0.3 V 5.0 V 0.5 V 0.5VCCI 0.5VCCO VOL + 0.3 V VOH 0.3 V [1] VCCI is the supply voltage associated with the input and VCCO is the supply voltage associated with the output. NTB0101-Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 3 July 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 12 of 21 NTB0101-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VEXT VCC VI RL VO G DUT CL RL 001aal920 Test data is given in Table 15. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz; ZO = 50 ; dV/dt 1.0 V/ns. RL = Load resistance. CL = Load capacitance including jig and probe capacitance. VEXT = External voltage for measuring switching times. Fig 5. Table 15. Test circuit for measuring switching times Test data Supply voltage Input VCC(A) VI[1] VCC(B) 1.2 V to 3.6 V 1.65 V to 5.5 V VCCI Load VEXT t/V CL RL[2] 1.0 ns/V 15 pF 50 k, 1 M open tPLH, tPHL tPZH, tPHZ tPZL, tPLZ[3] open 2VCCO [1] VCCI is the supply voltage associated with the input. [2] For measuring data rate, pulse width, propagation delay and output rise and fall measurements, RL = 1 M. For measuring enable and disable times, RL = 50 k. [3] VCCO is the supply voltage associated with the output. NTB0101-Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 3 July 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 13 of 21 NTB0101-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state 13. Application information 13.1 Applications Voltage level-translation applications. The NTB0101-Q100 can be used to interface between devices or systems operating at different supply voltages. See Figure 6 for a typical operating circuit using the NTB0101-Q100. 9 9 ) 9 9&&$ 9&&% 9 ) 2( 6<67(0 &21752//(5 '$7$ 17%4 $ % 6<67(0 '$7$ *1' DDD Fig 6. Typical operating circuit NTB0101-Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 3 July 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 14 of 21 NTB0101-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state 13.2 Architecture The architecture of the NTB0101-Q100 is shown in Figure 7. The device does not require an extra input signal to control the direction of data flow from A to B or from B to A. In a static state, the output drivers of the NTB0101-Q100 can maintain a defined output level. However, the output architecture is designed so that an external driver can overdrive them when data on the bus starts flowing in the opposite direction. The output of one-shot circuits detect rising or falling edges on the A or B ports. During a rising edge, the one-shot circuits turn on the PMOS transistors (T1, T3) for a short duration, accelerating the LOW-to-HIGH transition. Similarly, during a falling edge, the one-shot circuits turn on the NMOS transistors (T2, T4) for a short duration, accelerating the HIGH-to-LOW transition. During output transitions, the typical output impedance is 70 at VCCO = 1.2 V to 1.8 V. It is 50 at VCCO = 1.8 V to 3.3 V and 40 at VCCO = 3.3 V to 5.0 V. VCC(B) VCC(A) ONE SHOT T1 4 kΩ ONE SHOT T2 B A T3 ONE SHOT 4 kΩ T4 Fig 7. ONE SHOT 001aal921 Architecture of NTB0101-Q100 I/O cell NTB0101-Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 3 July 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 15 of 21 NTB0101-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state 13.3 Input driver requirements For correct operation, the device driving the data I/Os of the NTB0101-Q100 must have a minimum drive capability of 2 mA. See Figure 8 for a plot of typical input current versus input voltage. II VT/4 kΩ VI −(VD − VT)/4 kΩ 001aal922 VT: input threshold voltage of the NTB0101-Q100 (typically VCCI / 2). VD: supply voltage of the external driver. Fig 8. Typical input current versus input voltage graph 13.4 Power-up During operation, VCC(A) must never be higher than VCC(B). However, during power-up, VCC(A) VCC(B) does not damage the device, so either power supply can be ramped up first. There is no special power-up sequencing required. The NTB0101-Q100 includes circuitry that disables all output ports when either VCC(A) or VCC(B) is switched off. 13.5 Enable and disable An output enable input (OE) is used to disable the device. Setting OE = LOW causes all I/Os to assume the high-impedance OFF-state. The disable time (tdis with no external load) indicates the delay between when OE goes LOW and when outputs actually become disabled. The enable time (ten) indicates the amount of time the user must allow for one one-shot circuitry to become operational after OE is taken HIGH. To ensure the high-impedance OFF-state during power-up or power-down, pin OE should be tied to GND through a pull-down resistor. The current-sourcing capability of the driver determines the minimum value of the resistor. 13.6 Pull-up or pull-down resistors on I/O lines As mentioned previously the NTB0101-Q100 is designed with low static drive strength to drive capacitive loads of up to 70 pF. To avoid output contention issues, any pull-up or pull-down resistors used must be above 50 k. For this reason, the NTB0101-Q100 is not recommended for use in open-drain driver applications such as 1-Wire or I2C-bus. For these applications, the NTS0101-Q100 level translator is recommended. NTB0101-Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 3 July 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 16 of 21 NTB0101-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state 14. Package outline Plastic surface-mounted package; 6 leads SOT363 D E B y X A HE 6 5 v M A 4 Q pin 1 index A A1 1 2 e1 3 bp c Lp w M B e detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max bp c D E e e1 HE Lp Q v w y mm 1.1 0.8 0.1 0.30 0.20 0.25 0.10 2.2 1.8 1.35 1.15 1.3 0.65 2.2 2.0 0.45 0.15 0.25 0.15 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC JEDEC SOT363 Fig 9. JEITA SC-88 EUROPEAN PROJECTION ISSUE DATE 04-11-08 06-03-16 Package outline SOT363 (SC-88) NTB0101-Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 3 July 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 17 of 21 NTB0101-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state 15. Abbreviations Table 16. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MIL Military MM Machine Model NMOS N-type Metal Oxide Semiconductor PMOS P-type Metal Oxide Semiconductor PRR Pulse Repetition Rate 16. Revision history Table 17. Revision history Document ID Release date Data sheet status Change notice Supersedes NTB0101_Q100 v.1 20140703 Product data sheet - - NTB0101-Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 3 July 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 18 of 21 NTB0101-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state 17. Legal information 17.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 17.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 17.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. NTB0101-Q100 Product data sheet Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. All information provided in this document is subject to legal disclaimers. Rev. 1 — 3 July 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 19 of 21 NTB0101-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. 17.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 18. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] NTB0101-Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 3 July 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 20 of 21 NTB0101-Q100 NXP Semiconductors Dual supply translating transceiver; auto direction sensing; 3-state 19. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 13.1 13.2 13.3 13.4 13.5 13.6 14 15 16 17 17.1 17.2 17.3 17.4 18 19 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Application information. . . . . . . . . . . . . . . . . . 14 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Input driver requirements . . . . . . . . . . . . . . . . 16 Power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Enable and disable . . . . . . . . . . . . . . . . . . . . . 16 Pull-up or pull-down resistors on I/O lines . . . 16 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 18 Legal information. . . . . . . . . . . . . . . . . . . . . . . 19 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Contact information. . . . . . . . . . . . . . . . . . . . . 20 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP Semiconductors N.V. 2014. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 3 July 2014 Document identifier: NTB0101-Q100