Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. CY74FCT2374T CY74FCT2574T 8-Bit Registers SCCS040 - September 1994 - Revised March 2000 Features Functional Description • Function and pinout compatible with FCT and F logic • 25Ω output series resistors to reduce transmission line reflection noise • FCT-C speed at 5.2 ns max. • Reduced VOH (typically=3.3V) versions of equivalent FCT functions • Edge-rate control circuitry for significantly improved noise characteristics • Power-off disable feature • Matched rise and fall times • Fully compatible with TTL input and output logic levels • ESD > 2000V • Sink current 12 mA Source current 15 mA • Edge-triggered D-type inputs • 250 MHz typical toggle rate • Extended commercial temp. range of –40˚C to +85˚C The FCT2374T and FCT2574T are high-speed low-power octal D-type flip-flops featuring separate D-type inputs for each flip-flop. On-chip termination resistors have been added to the outputs to reduce system noise caused by reflections. The FCT2374T and FCT2574T can be used to replace the FCT374T and FCT574T to reduce noise in an existing design. Both devices have three-state outputs for bus oriented applications. A buffered clock (CP) and output enable (OE) are common to all flip-flops. The FCT2574T is identical to the FCT2374T except that all the outputs are on one side of the package and inputs on the other side. The flip-flops contained in the FCT2374T and FCT2574T will store the state of their individual D inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. When OE is LOW, the contents of the flip-flops are available at the outputs. When OE is HIGH, the outputs will be in the high-impedence state. The state of output enable does not affect the state of the flip-flops. The outputs are designed with a power-off disable feature to allow for live insertion of boards. Logic Block Diagram D0 D1 Logic Symbol D2 D3 D4 D5 D6 D7 CP CP D Q CP D CP Q D CP Q D CP D Q CP Q D Q CP D CP Q D D0 CP Q OE O0 D1 D2 D3 D4 D5 D6 D7 O1 O2 O3 O4 O5 O6 O7 OE FCT2374T-5 O0 O1 O2 O3 O4 O5 O6 O7 FCT2374T-6 Pin Configurations SOIC/QSOP Top View SOIC/QSOP Top View OE 1 20 VCC OE 1 20 O0 2 19 O7 D0 2 19 O0 D0 3 18 D7 D1 3 18 O1 D1 4 17 D6 D2 4 17 O2 O1 5 16 O6 D3 5 16 O3 O2 6 15 O5 D4 6 15 O4 D2 7 14 D5 D5 7 14 O5 D3 8 13 D4 D6 8 13 O6 O3 9 12 O4 D7 9 12 O7 GND 10 11 CP GND 10 11 CP FCT2374T FCT2374T-2 FCT2574 VCC FCT2374T-4 Copyright © 2000, Texas Instruments Incorporated CY74FCT2374T CY74FCT2574T Function Table[1] Supply Voltage to Ground Potential ............... –0.5V to +7.0V Inputs OE O H L H L L L H Z D CP X DC Input Voltage ........................................... –0.5V to +7.0V Outputs X DC Output Voltage......................................... –0.5V to +7.0V DC Output Current (Maximum Sink Current/Pin) ...... 120 mA Power Dissipation .......................................................... 0.5W Static Discharge Voltage............................................>2001V (per MIL-STD-883, Method 3015) Maximum Ratings[2, 3] Operating Range (Above which the useful life may be impaired. For user guidelines, not tested.) Range Storage Temperature .................................–65°C to +150°C Commercial Ambient Temperature VCC –40°C to +85°C 5V ± 5% Ambient Temperature with Power Applied .............................................–65°C to +135°C Electrical Characteristics Over the Operating Range Parameter Description Test Conditions Min. Typ.[5] 2.4 3.3 VOH Output HIGH Voltage VCC=Min., IOH=–15 mA VOL Output LOW Voltage VCC=Min., IOL=12 mA ROUT Output Resistance VCC=Min., IOL=12 mA VIH Input HIGH Voltage VIL Input LOW Voltage VH Hysteresis[6] All inputs 0.2 VIK Input Clamp Diode Voltage VCC=Min., IIN=–18 mA –0.7 II Input HIGH Current IIH 20 Max. Unit V 0.3 0.55 V 25 40 Ω 2.0 V 0.8 V V –1.2 V VCC=Max., VIN=VCC 5 µA Input HIGH Current VCC=Max., VIN=2.7V ±1 µA IIL Input LOW Current VCC=Max., VIN=0.5V ±1 µA IOZH Off State HIGH-Level Output Current VCC=Max., VOUT=2.7V 10 µA IOZL Off State LOW-Level Output Current VCC=Max., VOUT=0.5V –10 µA IOS Output Short Circuit Current[7] VCC=Max., VOUT=0.0V –225 mA IOFF Power-Off Disable VCC=0V, VOUT=4.5V ±1 µA Typ. [5] Max. Unit –60 –120 Capacitance[6] Parameter Description Test Conditions CIN Input Capacitance 5 10 pF COUT Output Capacitance 9 12 pF Notes: 1. H = HIGH Voltage Level. L = LOW Voltage Level X = Don’t Care Z = HIGH Impedance = LOW-to-HIGH clock transition 2. Unless otherwise noted, these limits are over the operating free-air temperature range. 3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground. 4. TA is the “instant on” case temperature. 5. Typical values are at VCC=5.0V, TA=+25˚C ambient. 6. This parameter is specified but not tested. 7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last. 2 CY74FCT2374T CY74FCT2574T Power Supply Characteristics Parameter Description Test Conditions Typ.[5] Max. Unit ICC Quiescent Power Supply Current VCC=Max., VIN≤0.2V, VIN≥VCC–0.2V 0.1 0.2 mA ∆ICC Quiescent Power Supply Current (TTL inputs) VCC=Max., VIN=3.4V,[8] f1=0, Outputs Open 0.5 2.0 mA ICCD Dynamic Power Supply Current[9] VCC=Max., One Input Toggling, 50% Duty Cycle, Outputs Open, OE=GND, VIN≤0.2V or VIN≥VCC–0.2V 0.06 0.12 mA/ MHz IC Total Power Supply Current[10] VCC=Max., 50% Duty Cycle, Outputs Open, One Bit Toggling at f1=5 MHz, f0=10 MHz OE=GND, VIN≤0.2V or VIN≥VCC–0.2V 0.7 1.4 mA VCC=Max., 50% Duty Cycle, Outputs Open, One Bit Toggling at f1=5 MHz, f0=10 MHz OE=GND, VIN=3.4V or VIN=GND 1.2 3.4 mA VCC=Max., 50% Duty Cycle, Outputs Open, Eight Bits Toggling at f1=2.5 MHz, Fo=10 MHz, OE=GND, VIN≤0.2V or VIN≥VCC–0.2V 1.6 3.2[11] mA VCC=Max., 50% Duty Cycle, Outputs Open, Eight Bits Toggling at f1=2.5 MHz, Fo=10 MHz, OE=GND, VIN=3.4V or VIN=GND 3.9 12.2[11] mA Switching Characteristics Over the Operating Range[11] CY74FCT2374T CY74FCT2574T Parameter Description CY74FCT2374AT CY74FCT2574AT CY74FCT2374CT CY74FCT2574CT Min. Max. Min. Max. Min. Max. Unit Fig. No.[13] tPLH tPHL Propagation Delay Clock to Output 2.0 10.0 2.0 6.5 2.0 5.2 ns 1, 5 tPZH tPZL Output Enable Time 1.5 12.5 1.5 6.5 1.5 6.2 ns 1, 7, 8 tPHZ tPLZ Output Disable Time 1.5 8.0 1.5 5.5 1.5 5.0 ns 1, 7, 8 tS Set-Up Time, HIGH or LOW D to CP 2.0 2.0 1.5 ns 4 tH Hold Time, HIGH or LOW D to CP 1.5 1.5 1.0 ns 4 tW Clk Pulse Width HIGH or LOW 7.0 5.0 4.0 ns 5 Notes: 8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND. 9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. 10. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC+∆ICCDHNT+ICCD(f0/2 + f1N1) ICC = Quiescent Current with CMOS input levels ∆ICC = Power Supply Current for a TTL HIGH input (VIN=3.4V) DH = Duty Cycle for TTL inputs HIGH NT = Number of TTL inputs at DH ICCD = Dynamic Current caused by an input transition pair (HLH or LHL) f0 = Clock frequency for registered devices, otherwise zero f1 = Input signal frequency N1 = Number of inputs changing at f1 All currents are in milliamps and all frequencies are in megahertz. 11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested. 12. Minimum limits are specified but not tested on Propagation Delays. 13. See “Parameter Measurement Information” in the General Information section. 3 CY74FCT2374T CY74FCT2574T Ordering Information Speed (ns) 5.2 6.5 10.0 Ordering Code Package Name Package Type CY74FCT2374CTQCT Q5 20-Lead (150-Mil) QSOP CY74FCT2374CTSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC CY74FCT2374ATQCT Q5 20-Lead (150-Mil) QSOP CY74FCT2374ATSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC CY74FCT2374TSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC Operating Range Commercial Commercial Commercial Ordering Information Speed (ns) 5.2 Ordering Code Package Name Package Type Operating Range CY74FCT2574CTQCT Q5 20-Lead (150-Mil) QSOP CY74FCT2574CTSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC 6.5 CY74FCT2574ATQCT Q5 20-Lead (150-Mil) QSOP Commercial 10.0 CY74FCT2574TSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC Commercial Document #: 38-00345-B 4 Commercial CY74FCT2374T CY74FCT2574T Package Diagrams 20-Lead Quarter Size Outline Q5 20-Lead (300-Mil) Molded SOIC S5 5 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 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