Features • Low-voltage and Standard-voltage Operation • • • • • • • – 5.0 (VCC = 4.5V to 5.5V) – 2.7 (VCC = 2.7V to 5.5V) – 2.5 (VCC = 2.5V to 5.5V) – 1.8 (VCC = 1.8V to 5.5V) User-selectable Internal Organization – 1K: 128 x 8 or 64 x 16 – 2K: 256 x 8 or 128 x 16 – 4K: 512 x 8 or 256 x 16 3-wire Serial Interface 2 MHz Clock Rate (5V) Self-timed Write Cycle (10 ms max) High Reliability – Endurance: 1 Million Write Cycles – Data Retention: 100 Years Automotive Grade and Extended Temperature Devices Available 8-lead PDIP, 8-lead JEDEC and EIAJ SOIC, and 8-lead TSSOP Packages 3-wire Serial EEPROMs 1K (128 x 8 or 64 x 16) 2K (256 x 8 or 128 x 16) 4K (512 x 8 or 256 x 16) Description The AT93C46/56/66 provides 1024/2048/4096 bits of serial electrically erasable programmable read only memory (EEPROM) organized as 64/128/256 words of 16 bits each, when the ORG pin is connected to VCC and 128/256/512 words of 8 bits each when it is tied to ground. The device is optimized for use in many industrial and commercial applications where low power and low voltage operations are essential. The AT93C46/56/66 is available in space-saving 8-lead PDIP and 8-lead JEDEC and EIAJ (continued) SOIC packages. AT93C46 AT93C56 AT93C66 Pin Configurations 8-lead PDIP Pin Name Function CS Chip Select SK Serial Data Clock DI Serial Data Input DO Serial Data Output GND Ground VCC Power Supply ORG Internal Organization DC Don’t Connect 1 2 3 4 CS SK DI DO VCC DC ORG GND 8 7 6 5 8-lead SOIC CS SK DI DO 8-lead SOIC Rotated (R) (1K JEDEC Only) 1 2 3 4 8 7 6 5 VCC DC ORG GND 8-lead TSSOP DC VCC CS SK 1 2 3 4 8 7 6 5 ORG GND DO DI CS SK DI DO 1 2 3 4 8 7 6 5 VCC DC ORG GND Rev. 0172O–08/01 1 The AT93C46/56/66 is enabled through the Chip Select pin (CS), and accessed via a 3-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SK). Upon receiving a READ instruction at DI, the address is decoded and the data is clocked out serially on the data output pin DO. The WRITE cycle is completely selftimed and no separate ERASE cycle is required before WRITE. The WRITE cycle is only enabled when the part is in the ERASE/WRITE ENABLE state. When CS is brought “high” following the initiation of a WRITE cycle, the DO pin outputs the READY/BUSY status of the part. The AT93C46 is available in 4.5V to 5.5V, 2.7V to 5.5V, 2.5V to 5.5V, and 1.8V to 5.5V versions. The AT93C56/66 is available in 4.5V to 5.5V, 2.7V to 5.5V, and 2.5V to 5.5V versions. Absolute Maximum Ratings* Operating Temperature.................................. -55°C to +125°C Storage Temperature ..................................... -65°C to +150°C Voltage on Any Pin with Respect to Ground .....................................-1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability DC Output Current........................................................ 5.0 mA Block Diagram Notes: 1. When the ORG pin is connected to VCC, the x 16 organization is selected. When it is connected to ground, the x 8 organization is selected. If the ORG pin is left unconnected and the application does not load the input beyond the capability of the internal 1 Meg ohm pullup, then the x 16 organization is selected. The feature is not available on the 1.8V devices. 2. For the AT93C46, if x 16 organization is the mode of choice and Pin 6 (ORG) is left unconnected, Atmel recommends using the AT93C46A device. For more details, see the AT93C46A datasheet. 2 AT93C46/56/66 0172O–08/01 AT93C46/56/66 Pin Capacitance(1) Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +5.0V (unless otherwise noted). Symbol Test Conditions COUT CIN Note: Max Units Conditions Output Capacitance (DO) 5 pF VOUT = 0V Input Capacitance (CS, SK, DI) 5 pF VIN = 0V 1. This parameter is characterized and is not 100% tested. DC Characteristics Applicable over recommended operating range from: TAI = -40°C to +85°C, VCC = +1.8V to +5.5V, TAC = 0°C to +70°C, VCC = +1.8V to +5.5V (unless otherwise noted). Symbol Parameter VCC1 Supply Voltage VCC2 Test Condition Min Typ Max Unit 1.8 5.5 V Supply Voltage 2.5 5.5 V VCC3 Supply Voltage 2.7 5.5 V VCC4 Supply Voltage 4.5 5.5 V ICC Supply Current ISB1 Standby Current VCC = 1.8V ISB2 Standby Current ISB3 READ at 1.0 MHz 0.5 2.0 mA WRITE at 1.0 MHz 0.5 2.0 mA CS = 0V 0 0.1 µA VCC = 2.5V CS = 0V 6.0 10.0 µA Standby Current VCC = 2.7V CS = 0V 6.0 10.0 µA ISB4 Standby Current VCC = 5.0V CS = 0V 17 30 µA IIL Input Leakage VIN = 0V to VCC 0.1 1.0 µA IOL Output Leakage VIN = 0V to VCC 0.1 1.0 µA VIL1(1) VIH1(1) Input Low Voltage Input High Voltage 4.5V ≤ VCC ≤ 5.5V -0.6 2.0 0.8 VCC + 1 V VIL2(1) VIH2(1) Input Low Voltage Input High Voltage 1.8V ≤ VCC ≤ 2.7V -0.6 VCC x 0.7 VCC x 0.3 VCC + 1 V VOL1 VOH1 Output Low Voltage Output High Voltage 4.5V ≤ VCC ≤ 5.5V 0.4 V VOL2 VOH2 Output Low Voltage Output High Voltage 1.8V ≤ VCC ≤ 2.7V Note: VCC = 5.0V IOL = 2.1 mA IOH = -0.4 mA 2.4 IOL = 0.15 mA IOH = -100 µA V 0.2 VCC - 0.2 V V 1. VIL min and VIH max are reference only and are not tested. 3 0172O–08/01 AC Characteristics Applicable over recommended operating range from TA = -40°C to + 85°C, VCC = As Specified, CL = 1 TTL Gate and 100 pF (unless otherwise noted). Symbol Parameter Test Condition Min fSK SK Clock Frequency 4.5V 2.7V 2.5V 1.8V ≤ VCC ≤ VCC ≤ VCC ≤ VCC ≤ 5.5V ≤ 5.5V ≤ 5.5V ≤ 5.5V 0 0 0 0 SK High Time 4.5V 2.7V 2.5V 1.8V ≤ VCC ≤ VCC ≤ VCC ≤ VCC ≤ 5.5V ≤ 5.5V ≤ 5.5V ≤ 5.5V 250 250 500 1000 ns tSKL SK Low Time 4.5V 2.7V 2.5V 1.8V ≤ VCC ≤ VCC ≤ VCC ≤ VCC ≤ 5.5V ≤ 5.5V ≤ 5.5V ≤ 5.5V 250 250 500 1000 ns tCS Minimum CS Low Time 4.5V 2.7V 2.5V 1.8V ≤ VCC ≤ VCC ≤ VCC ≤ VCC ≤ 5.5V ≤ 5.5V ≤ 5.5V ≤ 5.5V 250 250 500 1000 ns tSKH CS Setup Time tCSS ns 4.5V ≤ VCC 2.7V ≤ VCC 2.5V ≤ VCC 1.8V ≤ VCC ≤ 5.5V ≤ 5.5V ≤ 5.5V ≤ 5.5V 100 100 200 400 ns 0 ns 100 100 200 400 ns CS Hold Time Relative to SK Output Delay to ‘0’ tPD0 Relative to SK 4.5V ≤ VCC 2.7V ≤ VCC 2.5V ≤ VCC 1.8V ≤ VCC ≤ 5.5V ≤ 5.5V ≤ 5.5V ≤ 5.5V AC Test 4.5V ≤ VCC 2.7V ≤ VCC 2.5V ≤ VCC 1.8V ≤ VCC ≤ 5.5V ≤ 5.5V ≤ 5.5V ≤ 5.5V 250 250 500 1000 ns AC Test 4.5V ≤ VCC 2.7V ≤ VCC 2.5V ≤ VCC 1.8V ≤ VCC ≤ 5.5V ≤ 5.5V ≤ 5.5V ≤ 5.5V 250 250 500 1000 ns ≤ 5.5V ≤ 5.5V ≤ 5.5V ≤ 5.5V 250 250 500 1000 ns ≤ 5.5V ≤ 5.5V ≤ 5.5V ≤ 5.5V 100 100 200 400 ns 10 ms tSV CS to Status Valid AC Test 4.5V ≤ VCC 2.7V ≤ VCC 2.5V ≤ VCC 1.8V ≤ VCC tDF CS to DO in High Impedance AC Test CS = VIL 4.5V ≤ VCC 2.7V ≤ VCC 2.5V ≤ VCC 1.8V ≤ VCC tWP Write Cycle Time Endurance Note: 4 (1) MHz Relative to SK tCSH Output Delay to ‘1’ 2 1 0.5 0.25 50 50 100 200 Relative to SK tPD1 Units ≤ 5.5V ≤ 5.5V ≤ 5.5V ≤ 5.5V DI Setup Time DI Hold Time Max 4.5V ≤ VCC 2.7V ≤ VCC 2.5V ≤ VCC 1.8V ≤ VCC tDIS tDIH Typ 4.5V ≤ VCC ≤ 5.5V 5.0V, 25°C, Page Mode 3 1M ms Write Cycles 1. This parameter is characterized and is not 100% tested. AT93C46/56/66 0172O–08/01 AT93C46/56/66 Instruction Set for the AT93C46 Address Data SB Op Code x8 x 16 READ 1 10 A6 - A0 A5 - A0 EWEN 1 00 11XXXXX 11XXXX Write enable must precede all programming modes. ERASE 1 11 A6 - A0 A5 - A0 Erase memory location An - A0. WRITE 1 01 A6 - A0 A5 - A0 ERAL 1 00 10XXXXX 10XXXX WRAL 1 00 01XXXXX 01XXXX EWDS 1 00 00XXXXX 00XXXX Instruction x8 x 16 Comments Reads data stored in memory, at specified address. D7 - D0 D15 - D0 Writes memory location An - A0. Erases all memory locations. Valid only at VCC = 4.5V to 5.5V. D7 - D0 D15 - D0 Writes all memory locations. Valid only at VCC = 4.5V to 5.5V. Disables all programming instructions. 5 0172O–08/01 Functional Description The AT93C46/56/66 is accessed via a simple and versatile 3-wire serial communication interface. Device operation is controlled by seven instructions issued by the host processor. A valid instruction starts with a rising edge of CS and consists of a Start Bit (logic “1”) followed by the appropriate Op Code and the desired memory Address location. READ (READ): The Read (READ) instruction contains the Address code for the memory location to be read. After the instruction and address are decoded, data from the selected memory location is available at the serial output pin DO. Output data changes are synchronized with the rising edges of serial clock SK. It should be noted that a dummy bit (logic “0”) precedes the 8- or 16-bit data output string. ERASE/WRITE (EWEN): To assure data integrity, the part automatically goes into the Erase/Write Disable (EWDS) state when power is first applied. An Erase/Write Enable (EWEN) instruction must be executed first before any programming instructions can be carried out. Please note that once in the Erase/Write Enable state, programming remains enabled until an Erase/Write Disable (EWDS) instruction is executed or VCC power is removed from the part. ERASE (ERASE): The Erase (ERASE) instruction programs all bits in the specified memory location to the logical “1” state. The self-timed erase cycle starts once the ERASE instruction and address are decoded. The DO pin outputs the READY/BUSY status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS). A logic “1” at pin DO indicates that the selected memory location has been erased, and the part is ready for another instruction. WRITE (WRITE): The Write (WRITE) instruction contains the 8 or 16 bits of data to be written into the specified memory location. The self-timed programming cycle, tWP, starts after the last bit of data is received at serial data input pin DI. The DO pin outputs the READY/BUSY status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS). A logic “0” at DO indicates that programming is still in progress. A logic “1” indicates that the memory location at the specified address has been written with the data pattern contained in the instruction and the part is ready for further instructions. A READY/BUSY status cannot be obtained if the CS is brought high after the end of the self-timed programming cycle, tWP. ERASE ALL (ERAL): The Erase All (ERAL) instruction programs every bit in the memory array to the logic “1” state and is primarily used for testing purposes. The DO pin outputs the READY/BUSY status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS). The ERAL instruction is valid only at VCC = 5.0V ± 10%. WRITE ALL (WRAL): The Write All (WRAL) instruction programs all memory locations with the data patterns specified in the instruction. The DO pin outputs the READY/BUSY status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS). The WRAL instruction is valid only at VCC = 5.0V ± 10%. ERASE/WRITE DISABLE (EWDS): To protect against accidental data disturb, the Erase/Write Disable (EWDS) instruction disables all programming modes and should be executed after all programming operations. The operation of the READ instruction is independent of both the EWEN and EWDS instructions and can be executed at any time. 6 AT93C46/56/66 0172O–08/01 AT93C46/56/66 Timing Diagrams Synchronous Data Timing Note: 1. This is the minimum SK period. Organization Key for Timing Diagrams AT93C46 (1K) I/O Notes: x8 AT93C56 (2K) x 16 AN A6 A5 DN D7 D15 x8 A8 (1) D7 AT93C66 (4K) x 16 x8 x 16 (2) A8 A7 D7 D15 A7 D15 1. A8 is a DON’T CARE value, but the extra clock is required. 2. A7 is a DON’T CARE value, but the extra clock is required. READ Timing 7 0172O–08/01 EWEN Timing tCS CS SK DI 1 0 0 1 ... 1 EWDS Timing tCS CS SK DI 1 0 0 0 ... 0 WRITE Timing tCS CS SK DI DO 1 0 1 AN ... A0 DN ... D0 HIGH IMPEDANCE BUSY READY tWP WRAL Timing(1) tCS CS SK DI DO 1 0 0 0 1 ... DN ... D0 BUSY HIGH IMPEDANCE READY tWP Note: 8 1. Valid only at VCC = 4.5V to 5.5V. AT93C46/56/66 0172O–08/01 AT93C46/56/66 ERASE Timing tCS CS STANDBY CHECK STATUS SK DI 1 1 1 AN AN-1 AN-2 ... A0 tDF tSV DO HIGH IMPEDANCE HIGH IMPEDANCE BUSY READY tWP ERAL Timing(1) tCS CS CHECK STATUS STANDBY tSV tDF SK DI DO 1 0 0 1 0 BUSY HIGH IMPEDANCE HIGH IMPEDANCE READY tWP Note: 1. Valid only at VCC = 4.5V to 5.5V. 9 0172O–08/01 AT93C46 Ordering Information tWP (max) (ms) ICC (max) (µA) ISB (max) (µA) fMAX (kHz) Ordering Code Package 10 2000 30.0 2000 AT93C46-10PC AT93C46-10SC AT93C46R-10SC AT93C46W-10SC AT93C46-10TC 8P3 8S1 8S1 8S2 8T Commercial (0°C to 70°C) 30.0 2000 AT93C46-10PI AT93C46-10SI AT93C46R-10SI AT93C46W-10SI AT93C46-10TI 8P3 8S1 8S1 8S2 8T Industrial (-40°C to 85°C) 10.0 1000 AT93C46-10PC-2.7 AT93C46-10SC-2.7 AT93C46R-10SC-2.7 AT93C46W-10SC-2.7 AT93C46-10TC-2.7 8P3 8S1 8S1 8S2 8T Commercial (0°C to 70°C) 10.0 1000 AT93C46-10PI-2.7 AT93C46-10SI-2.7 AT93C46R-10SI-2.7 AT93C46W-10SI-2.7 AT93C46-10TI-2.7 8P3 8S1 8S1 8S2 8T Industrial (-40°C to 85°C) 10 800 Operation Range Package Type 8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8S2 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) 8T 8-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) Options Blank Standard Operation (4.5V to 5.5V) -2.7 Low Voltage (2.7V to 5.5V) -2.5 Low Voltage (2.5V to 5.5V) R Rotated Pinout 10 AT93C46/56/66 0172O–08/01 AT93C46/56/66 AT93C46 Ordering Information (Continued) tWP (max) (ms) ICC (max) (µA) ISB (max) (µA) fMAX (kHz) Ordering Code Package 10 600 10.0 500 AT93C46-10PC-2.5 AT93C46-10SC-2.5 AT93C46R-10SC-2.5 AT93C46W-10SC-2.5 AT93C46-10TC-2.5 8P3 8S1 8S1 8S2 8T Commercial (0°C to 70°C) 10.0 500 AT93C46-10PI-2.5 AT93C46-10SI-2.5 AT93C46R-10SI-2.5 AT93C46W-10SI-2.5 AT93C46-10TI-2.5 8P3 8S1 8S1 8S2 8T Industrial (-40°C to 85°C) 0.1 250 AT93C46-10PC-1.8 AT93C46-10SC-1.8 AT93C46R-10SC-1.8 AT93C46W-10SC-1.8 AT93C46-10TC-1.8 8P3 8S1 8S1 8S2 8T Commercial (0°C to 70°C) 0.1 250 AT93C46-10PI-1.8 AT93C46-10SI-1.8 AT93C46R-10SI-1.8 AT93C46W-10SI-1.8 AT93C46-10TI-1.8 8P3 8S1 8S1 8S2 8T Industrial (-40°C to 85°C) 10 80 Operation Range Package Type 8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8S2 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) 8T 8-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) Options Blank Standard Operation (4.5V to 5.5V) -2.7 Low Voltage (2.7V to 5.5V) -2.5 Low Voltage (2.5V to 5.5V) -1.8 Low Voltage (1.8V to 5.5V) R Rotated Pinout 11 0172O–08/01 AT93C56 Ordering Information tWP (max) (ms) ICC (max) (µA) ISB (max) (µA) fMAX (kHz) Ordering Code Package 10 2000 30.0 2000 AT93C56-10PC AT93C56-10SC AT93C56W-10SC 8P3 8S1 8S2 Commercial (0°C to 70°C) 30.0 2000 AT93C56-10PI AT93C56-10SI AT93C56W-10SI 8P3 8S1 8S2 Industrial (-40°C to 85°C) 10.0 1000 AT93C56-10PC-2.7 AT93C56-10SC-2.7 AT93C56W-10SC-2.7 8P3 8S1 8S2 Commercial (0°C to 70°C) 10.0 1000 AT93C56-10PI-2.7 AT93C56-10SI-2.7 AT93C56W-10SI-2.7 8P3 8S1 8S2 Industrial (-40°C to 85°C) 10.0 500 AT93C56-10PC-2.5 AT93C56-10SC-2.5 AT93C56W-10SC-2.5 8P3 8S1 8S2 Commercial (0°C to 70°C) 10.0 500 AT93C56-10PI-2.5 AT93C56-10SI-2.5 AT93C56W-10SI-2.5 8P3 8S1 8S2 Industrial (-40°C to 85°C) 10 10 800 600 Operation Range Package Type 8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8S2 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) Options Blank Standard Operation (4.5V to 5.5V) -2.7 Low Voltage (2.7V to 5.5V) -2.5 Low Voltage (2.5V to 5.5V) 12 AT93C46/56/66 0172O–08/01 AT93C46/56/66 AT93C66 Ordering Information tWP (max) (ms) ICC (max) (µA) ISB (max) (µA) fMAX (kHz) Ordering Code Package 10 2000 30.0 2000 AT93C66-10PC AT93C66-10SC AT93C66W-10SC AT93C66-10TC 8P3 8S1 8S2 8T Commercial (0°C to 70°C) 30.0 2000 AT93C66-10PI AT93C66-10SI AT93C66W-10SI AT93C66-10TI 8P3 8S1 8S2 8T Industrial (-40°C to 85°C) 10.0 1000 AT93C66-10PC-2.7 AT93C66-10SC-2.7 AT93C66W-10SC-2.7 AT93C66-10TC-2.7 8P3 8S1 8S2 8T Commercial (0°C to 70°C) 10.0 1000 AT93C66-10PI-2.7 AT93C66-10SI-2.7 AT93C66W-10SI-2.7 AT93C66-10TI-2.7 8P3 8S1 8S2 8T Industrial (-40°C to 85°C) 10.0 500 AT93C66-10PC-2.5 AT93C66-10SC-2.5 AT93C66W-10SC-2.5 AT93C66-10TC-2.5 8P3 8S1 8S2 8T Commercial (0°C to 70°C) 10.0 500 AT93C66-10PI-2.5 AT93C66-10SI-2.5 AT93C66W-10SI-2.5 AT93C66-10TI-2.5 8P3 8S1 8S2 8T Industrial (-40°C to 85°C) 0.1 250 AT93C66-10PC-1.8 AT93C66-10SC-1.8 AT93C66W-10SC-1.8 AT93C66-10TC-1.8 8P3 8S1 8S2 8T Commercial (0°C to 70°C) 0.1 250 AT93C66-10PI-1.8 AT93C66-10SI-1.8 AT93C66W-10SI-1.8 AT93C66-10TI-1.8 8P3 8S1 8S2 8T Industrial (-40°C to 85°C) 10 10 10 800 600 80 Operation Range Package Type 8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8S2 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) 8T 8-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) Options Blank Standard Operation (4.5V to 5.5V) -2.7 Low Voltage (2.7V to 5.5V) -2.5 Low Voltage (2.5V to 5.5V) -1.8 Low Voltage (1.8V to 5.5V) 13 0172O–08/01 Packaging Information 8P3, 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) Dimensions in Inches and (Millimeters) 8S1, 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) Dimensions in Inches and (Millimeters) JEDEC STANDARD MS-001 BA .400 (10.16) .355 (9.02) .020 (.508) .013 (.330) PIN 1 .280 (7.11) .240 (6.10) .157 (3.99) .150 (3.81) PIN 1 .244 (6.20) .228 (5.79) .037 (.940) .027 (.690) .300 (7.62) REF .050 (1.27) BSC .210 (5.33) MAX .100 (2.54) BSC SEATING PLANE .196 (4.98) .189 (4.80) .068 (1.73) .053 (1.35) .015 (.380) MIN .150 (3.81) .115 (2.92) .022 (.559) .014 (.356) .070 (1.78) .045 (1.14) .010 (.254) .004 (.102) .325 (8.26) .300 (7.62) 0 REF 15 .012 (.305) .008 (.203) 0 REF 8 .010 (.254) .007 (.203) .430 (10.9) MAX .050 (1.27) .016 (.406) 8S2, 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) Dimensions in Inches and (Millimeters) 8T, 8-lead, 0.170" Wide, Thin Shrink Small Outline Package (TSSOP) Dimensions in Millimeters and (Inches)* PIN 1 .020 (.508) .012 (.305) 6.50 (.256) 6.25 (.246) .213 (5.41) .205 (5.21) PIN 1 .330 (8.38) .300 (7.62) 0.30 (.012) 0.19 (.008) .050 (1.27) BSC .212 (5.38) .203 (5.16) .080 (2.03) .070 (1.78) 3.10 (.122) 2.90 (.114) 1.05 (.041) 0.80 (.033) .65 (.026) BSC .013 (.330) .004 (.102) 0 REF 8 0.15 (.006) 0.05 (.002) 4.5 (.177) 4.3 (.169) .010 (.254) .007 (.178) .035 (.889) .020 (.508) 1.20 (.047) MAX 0.20 (.008) 0.09 (.004) 0 REF 8 0.75 (.030) 0.45 (.018) *Controlling dimension: millimeters 14 AT93C46/56/66 0172O–08/01 Atmel Headquarters Atmel Product Operations Corporate Headquarters Atmel Colorado Springs 2325 Orchard Parkway San Jose, CA 95131 TEL (408) 441-0311 FAX (408) 487-2600 Europe Atmel SarL Route des Arsenaux 41 Casa Postale 80 CH-1705 Fribourg Switzerland TEL (41) 26-426-5555 FAX (41) 26-426-5500 Asia Atmel Asia, Ltd. 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The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems. ATMEL ® is the registered trademark of Atmel. Other terms and product names may be the trademarks of others. Printed on recycled paper. 0172O–08/01/xM