AT27C4096 Features • Fast Read Access Time - 55 ns • Low Power CMOS Operation • • • • • • • • – 100 µA Maximum Standby – 40 mA Maximum Active at 5 MHz JEDEC Standard Packages – 40-Lead 600 mil PDIP – 44-Lead PLCC – 40-Lead TSOP (10 mm x 14 mm) Direct Upgrade from 512K bit, 1M bit, and 2M bit (AT27C516, AT27C1024, and AT27C2048) EPROMs 5V ± 10% Power Supply High Reliability CMOS Technology – 2,000V ESD Protection – 200 mA Latchup Immunity Rapid™ Programming Algorithm - 50 µs/word (typical) CMOS and TTL Compatible Inputs and Outputs Integrated Product Identification Code Commercial and Industrial Temperature Ranges 4-Megabit (256K x 16) OTP EPROM AT27C4096 Description The AT27C4096 is a low-power, high-performance 4,194,304-bit one-time programmable read only memory (OTP EPROM) organized 256K by 16 bits. It requires a single 5V power supply in normal read mode operation. Any word can be accessed in less than 55 ns, eliminating the need for speed-reducing WAIT states. The by-16 organization makes this part ideal for high-performance 16- and 32-bit microprocessor systems. (continued) Pin Configurations Pin Name Function A0 - A17 Addresses O0 - O15 Outputs CE Chip Enable OE Output Enable NC Note: PDIP Top View No Connect Both GND pins must be connected. PLCC Top View TSOP Top View Type 1 0311E-A–06/97 1 Description System Considerations In read mode, the AT27C4096 typically consumes 15 mA. Standby mode supply current is typically less than 10 µA. The AT27C4 096 is a va ila ble i n i ndus tr y st anda rd JEDEC-approved one-time programmable (OTP) plastic PDIP, PLCC, and TSOP packages. The device features two-line control (CE, OE) to eliminate bus contention in high-speed systems. With high density 256K word storage capability, the AT27C4096 allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media. Atmel’s AT27C4096 has additional features that ensure high quality and efficient production use. The Rapid™ Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 50 µs/word. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper programming algorithms and voltages. Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the VCC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the VCC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array. 2 AT27C4096 AT27C4096 Block Diagram Absolute Maximum Ratings* *NOTICE: Temperature Under Bias ......................-55°C to +125°C Storage Temperature............................-65°C to +150°C Voltage on Any Pin with Respect to Ground ...............................-2.0V to +7.0V(1) Voltage on A9 with Respect to Ground ............................-2.0V to +14.0V(1) Note: VPP Supply Voltage with Respect to Ground .............................-2.0V to +14.0V(1) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum voltage is -0.6V dc which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is VCC + 0.75V dc which may overshoot to +7.0V for pulses of less than 20 ns. Operating Modes Mode/Pin Read Output Disable CE OE Ai VPP Outputs DOUT VIL VIL Ai X(1) X VIH X X High Z High Z Standby VIH X X X(5) Rapid Program(2) VIL VIH Ai VPP DIN PGM Verify VIH VIL Ai VPP DOUT PGM Inhibit VIH VIH X VPP High Z VCC Identification Code (3) Product Identification(4) Notes: VIL VIL A9 = VH A0 = VIH or VIL A1 - A17 = VIL 1. X can be VIL or VIH. 2. Refer to the Programming characteristics. 3. VH = 12.0 ± 0.5V. 4. Two identifier words may be selected. All Ai inputs are held low (VIL), except A9, which is set to VH, and A0, which is toggled low (VIL) to select the Manufacturer’s Identification word and high (VIH) to select the Device Code word. 5. Standby VCC current (ISB) is specified with VPP = VCC. VCC > VPP will cause a slight increase in ISB. 3 DC and AC Operating Conditions for Read Operation AT27C4096 Operating Temperature (Case) -55 -70 -90 -12 -15 Com. 0°C - 70°C 0°C - 70°C 0°C - 70°C 0°C - 70°C 0°C - 70°C Ind. -40°C - 85°C -40°C - 85°C -40°C - 85°C -40°C - 85°C -40°C - 85°C 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10% VCC Power Supply DC and Operating Characteristics for Read Operation Symbol Parameter Condition ILI Input Load Current ILO IPP1 (2) Max Units VIN = 0V to VCC ±1 µA Output Leakage Current VOUT = 0V to VCC ±5 µA VPP(1) VPP = VCC 10 µA ISB1 (CMOS) CE = VCC ± 0.3V 100 µA ISB2 (TTL) CE = 2.0 to VCC + 0.5V 1 mA f = 5 MHz, IOUT = 0 mA, CE = VIL 40 mA Read/Standby Current VCC(1) Standby Current ISB Min ICC VCC Active Current VIL Input Low Voltage -0.6 0.8 V VIH Input High Voltage 2.0 VCC + 0.5 V VOL Output Low Voltage IOL = 2.1 mA 0.4 V Output High Voltage IOH = -400 µA VOH Notes: 2.4 V 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP. 2. VPP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and IPP. AC Characteristics for Read Operation AT27C4096 -55 Max Min -90 Max Min -12 Symbol Parameter Condition tACC(3) Address to Output Delay CE = OE = VIL 55 70 90 tCE(2) Max Min -15 Max Min Max Units 120 150 ns CE to Output Delay OE = VIL 55 70 90 120 150 ns tOE (2)(3) OE to Output Delay CE = VIL 20 30 35 40 50 ns tDF(4)(5) OE or CE High to Output Float, whichever occurred first 20 20 20 30 35 ns tOH(4) Output Hold from Address, CE or OE, whichever occurred first Note: 4 Min -70 7 7 2, 3, 4, 5. See the AC Waveforms for Read Operation diagram. AT27C4096 0 0 0 ns AT27C4096 AC Waveforms for Read Operation(1) Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified. 2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE. 3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC. 4. This parameter is only sampled and is not 100% tested. 5. Output float is defined as the point when data is no longer driven. Input Test Waveforms and Measurement Levels Output Test Load For -55 devices only: tR, tF < 5 ns (10% to 90%) Note: For -70, -90, -12 and -15 devices: CL = 100 pF including jig capacitance, except for the -45 and -55 devices, where CL = 30 pF. tR, tF < 20 ns (10% to 90%) Pin Capacitance (f = 1 MHz T = 25°C)(1) Typ Max Units Conditions CIN 4 10 pF VIN = 0V COUT 8 12 pF VOUT = 0V Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. 5 Programming Waveforms(1) Notes: 1. The Input Timing Reference is 0.8V for V IL and 2.0V for VIH. 2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer. 3. When programming the AT27C4096, a 0.1 µF capacitor is required across VPP and ground to suppress spurious voltage transients. DC Programming Characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V Limits 6 Symbol Parameter Test Conditions ILI Input Load Current VIN = VIL, VIH VIL Input Low Level VIH Input High Level VOL Output Low Voltage IOL = 2.1 mA VOH Output High Voltage IOH = -400 µA ICC2 VCC Supply Current (Program and Verify) IPP2 VPP Supply Current VID A9 Product Identification Voltage AT27C4096 Min Max Units ±10 µA -0.6 0.8 V 2.0 VCC + 0.7 V 0.4 V 2.4 CE = VIL 11.5 V 50 mA 30 mA 12.5 V AT27C4096 AC Programming Characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V Limits Test Conditions(1) Symbol Parameter tAS Address Setup Time tOES OE Setup Time Input Rise and Fall Times (10% to 90%) 20ns tDS Data Setup Time tAH Address Hold Time tDH Data Hold Time tDFP OE High to Output Float Delay(2) tVPS VPP Setup Time tVCS VCC Setup Time Input Pulse Levels 0.45V to 2.4V Width(3) tPW CE Program Pulse tOE Data Valid from OE tPRT VPP Pulse Rise Time During Programming Notes: Min Max Units 2 µs 2 µs 2 µs 0 µs 2 µs 0 130 ns Input Timing Reference Level 0.8V to 2.0V 2 µs 2 µs Output Timing Reference Level 0.8V to 2.0V 47.5 52.5 µs 150 ns 50 ns 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP. 2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven —see timing diagram. 3. Program Pulse width tolerance is 50 µsec ± 5%. Atmel’s 27C4096 Intergrated Product Identification Code Pins Codes A0 015-08 O7 O6 O5 O4 O3 O2 O1 O0 Hex Data Manufacturer 0 0 0 0 0 1 1 1 1 0 001E Device Type 1 0 1 1 1 1 0 1 0 0 00F4 7 Rapid Programming Algorithm A 50 µs CE pulse width is used to program. The address is set to the first location. V CC is raised to 6.5V and V PP is raised to 13.0V. Each address is first programmed with one 50 µs CE pulse without verification. Then a verification/reprogramming loop is executed for each address. In the event a word fails to pass verification, up to 10 successive 50 µs pulses are applied with a verification after each 8 AT27C4096 pulse. If the word fails to verify after 10 pulses have been applied, the part is considered failed. After the word verifies properly, the next address is selected until all have been checked. VPP is then lowered to 5.0V and VCC to 5.0V. All words are read again and compared with the original data to determine if the device passes or fails. AT27C4096 Ordering Information ICC (mA) tACC (ns) Active Standby 55 40 70 90 120 150 Ordering Code Package Operation Range 0.1 AT27C4096-55JC AT27C4096-55PC AT27C4096-55VC 44J 40P6 40V Commercial (0°C to 70°C) 40 0.1 AT27C4096-55JI AT27C4096-55PI AT27C4096-55VI 44J 40P6 40V Industrial (-40°C to 85°C) 40 0.1 AT27C4096-70JC AT27C4096-70PC AT27C4096-70VC 44J 40P6 40V Commercial (0°C to 70°C) 40 0.1 AT27C4096-70JI AT27C4096-70PI AT27C4096-70VI 44J 40P6 40V Industrial (-40°C to 85°C) 40 0.1 AT27C4096-90JC AT27C4096-90PC AT27C4096-90VC 44J 40P6 40V Commercial (0°C to 70°C) 40 0.1 AT27C4096-90JI AT27C4096-90PI AT27C4096-90VI 44J 40P6 40V Industrial (-40°C to 85°C) 40 0.1 AT27C4096-12JC AT27C4096-12PC AT27C4096-12VC 44J 40P6 40V Commercial (0°C to 70°C) 40 0.1 AT27C4096-12JI AT27C4096-12PI AT27C4096-12VI 44J 40P6 40V Industrial (-40°C to 85°C) 40 0.1 AT27C4096-15JC AT27C4096-15PC AT27C4096-15VC 44J 40P6 40V Commercial (0°C to 70°C) 40 0.1 AT27C4096-15JI AT27C4096-15PI AT27C4096-15VI 44J 40P6 40V Industrial (-40°C to 85°C) Package Type 44J 44 Lead, Plastic J-Leaded Chip Carrier (PLCC) 40P6 40 Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) 40V 40 Lead, Plastic Thin Small Outline Package (TSOP) 10 x 14 mm 9