5 4 3 2 1 Revision History Rev 0.1 Original Rev 0.2, S.Delano, 5/22/06, Refdes modified - J1 was J2, P1 was J1. MGA (P1) pin numbering changed to match PCB. Rev 0.3 P1 pin 39 was VCC P1 D VCC VCC NC22 P0_3 NC21 P0_5 NC20 P0_7 NC19 P6_7 P6_6 P6_5 P6_4 P6_3 P6_2 P6_1 P6_0 VSS VSS VDD VDD P0_6 NC18 P0_4 NC17 P0_2 NC16 P3_7 P3_5 P3_3 P3_1 P5_7 P5_5 P5_3 P5_1 P1_7 NC1 NC2 P0_1 P2_7 P2_5 P2_3 P2_1 P4_7 P4_5 P4_3 P4_1 OCDE OCDO SMP VSS P3_7 P3_5 P3_3 P3_1 P5_7 P5_5 P5_3 P5_1 P1_7 NC3 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 NC15 P0_0 NC14 P2_6 NC13 P2_4 P2_2 P2_0 P4_6 P4_4 VSS P4_2 P4_0 XRES CCLK HCLK P3_6 P3_4 P3_2 P3_0 P5_6 P5_4 P5_2 P5_0 NC12 U1 CY8C29000-24AXI Hydra OCD TQFP 100-Pin P0_0 VCC VCC P2_6 P2_4 P2_2 P2_0 P4_6 P4_4 C1 0603 C2 R1 P4_2 P4_0 OCD_RESET OCD_CCLK OCD_HCLK P3_6 P3_4 P3_2 P3_0 P5_6 P5_4 P5_2 P5_0 0603 NO LOAD NO LOAD R2 Y1 P1_0 P1_1 zero 32.768KHz XTAL NO LOAD zero PX1_1 PX1_0 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 NC4 NC5 P1_5 P1_3 P1_1 NC6 VDD NC7 VSS NC8 P7_7 P7_6 P7_5 P7_4 P7_3 P7_2 P7_1 P7_0 P1_0 P1_2 P1_4 P1_6 NC9 NC10 NC11 C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 P3_1 P3_3 P3_7 P4_3 P6_5 P6_7 P3_3 P3_4 P3_2 P3_0 P3_5 P4_1 P4_5 P4_7 P3_7 P4_3 P3_1 P2_1 P2_3 P1_1 P1_5 SMP P0_5 P2_7 P5_3 P6_4 P5_1 P2_0 This circuit added to allow for addtion of a precision external crystal. 0603 P0_1 P2_7 P2_5 P2_3 P2_1 P4_7 P4_5 P4_3 P4_1 OCD_DE OCD_DO SMP P6_6 P0_2 P0_4 P0_6 P0_7 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 P0_5 P6_7 P6_6 P6_5 P6_4 P6_3 P6_2 P6_1 P6_0 Hydra POD Schematic (TQFP) 0603 P0_3 VCC Bypass caps for Hydra and MGA P7_7 P7_6 P7_5 P7_4 P7_3 P7_2 P7_1 P7_0 PX1_0 P1_2 P1_4 P1_6 P1_5 P1_3 PX1_1 VCC VCC C3 0603 0.1 uFd C4 0603 0.1 uFd C5 0603 0.1 uFd VCC C6 0603 C7 0.1 uFd 0603 0805 0.1 uFd D1 C8 10 uFd Ceramic 0805 VCC 1206 0603 1K R4 ICE_DE OCD_DE 0603 56 R5 1K NO LOAD VCC 0603 C9 0603 P1_3 P1_7 P2_5 P0_1 P0_7 P5_2 P5_0 P2_2 P1_0 P1_2 P1_4 P0_0 P0_6 P0_3 P4_0 P4_4 P3_6 P2_4 P2_6 P0_2 P1_6 OCD_RESET P0_4 P4_2 P4_6 P7_1 P3_6 P4_0 P4_2 P4_4 P4_6 P6_1 VCC R3 LED Green B P7_7 P7_6 P7_5 P7_4 P5_5 P5_7 P7_0 P7_2 P7_3 P5_4 P5_6 P6_3 P6_2 P6_0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 D C B MGA FEMALE VCC R6 VCC OCD_DO J1 1 3 5 7 9 11 13 15 17 19 56 ICE_DO C10 0603 ICE_RST NO LOAD ICE_HCLK R7 ICE_CCLK OCD_CCLK 0603 2 4 6 8 10 12 14 16 18 20 0603 ICE_DE 56 C11 20-Pin Hirose 0603 NO LOAD R8 zero OCD_RESET ICE_RST 0603 C12 100 pFd 0603 0402 R9 1K A A R10 ICE_HCLK OCD_HCLK 0603 56 0603 C13 NO LOAD PCB: PDCR-9322 PCA: 121R-32200 CYPRESS SEMICONDUCTOR © 2005 Title Hydra TQFP POD Size C Date: 5 4 3 2 Document Number REF-13502 Rev 0.3 Monday, May 22, 2006 Sheet 1 1 of 1