CY3210-21x23 EvalPod Schematic.pdf

5
4
3
2
1
VCC
C8
C9
C10
3528
0603
0.1 uFd
0603
0.1 uFd
VCC
+
10 uFd 16v
1206
0603
D
U2
220
R5
OCD_DE
D
VCC
LED Green
56
Be aware when
measuring current that
this resistor may need
to be removed.
D1
R1
VCC
OCD_DE
OCD_DO
14
15
OCDE
OCDO
OCD_HCLK
OCD_CCLK
42
43
HCLK
CCLK
OCD_RESET
41
XRES
52
5
53
4
54
3
55
2
P0_0
P0_1
P0_2
PO_3
P0_4
P0_5
P0_6
P0_7
16
SMP
10
11
12
13
21
22
25
29
30
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
0603
56.2
C1
R9
1K
NO LOAD
C6
0603
0603
0603
P0_[0:7]
P0_0
P0_1
P0_2
P0_3
P0_4
P0_5
P0_6
P0_7
NO LOAD
VCC
R6
OCD_DO
P1_0
P1_1
P1_2
P1_3
P1_4
P1_5
P1_6
P1_7
31
27
32
26
33
24
34
23
P1_0
P1_1
P1_2
P1_3
P1_4
P1_5
P1_6
P1_7
P2_0
P2_1
P2_2
P2_3
P2_4
P2_5
P2_6
P2_7
48
9
49
8
50
7
51
6
P2_0
P2_1
P2_2
P2_3
P2_4
P2_5
P2_6
P2_7
P3_0
P3_1
P3_2
P3_3
44
20
45
19
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
35
36
37
38
39
40
46
47
0603
NO LOAD
U1
VCC
R7
OCD_CCLK
0603
56.2
VCC
C3
19
XRES
P0_0
P0_1
P0_2
P0_3
P0_4
P0_5
P0_6
P0_7
24
4
25
3
26
2
27
1
P0_0
P0_1
P0_2
P0_3
P0_4
P0_5
P0_6
P0_7
SMP
9
SMP
0603
GND2
C7
0.1 uFd
R3
1K
NO LOAD
0603
0603
OCD_RESET
8
7
6
5
4
3
2
1
C4
330 pFd
R12
1K
P1_0
P1_1
P1_2
P1_3
P1_4
P1_5
P1_6
P1_7
15
13
16
12
17
11
18
10
P1_0
P1_1
P1_2
P1_3
P1_4
P1_5
P1_6
P1_7
P2_0
P2_1
P2_2
P2_3
P2_4
P2_5
P2_6
P2_7
20
8
21
7
22
6
23
5
P2_0
P2_1
P2_2
P2_3
P2_4
P2_5
P2_6
P2_7
TV2
TV3
TV4
TV5
TV6
TV7
TV8
TV9
TV10
C
TV11
TV12
TV13
TV14
TV15
TV16
TV17
TV18
CY8C21x23
28 DIP Socket
B
0603
0603
14
P1
R8
OCD_HCLK
0603
B
SMP
GND1
GND2
GND3
GND4
R2
1K
0603
0603
1
17
18
28
C2
C
28
56.2
C5
P2_[0:7]
56.2
R4
1K
RJ45 Right Angle
NO LOAD
P1_[0:7]
0603
0603
NOTE: RJ45 pinout assumes a
straight-through connector
will be used.
VCC
P1_[0:7]
C11
0603
A
TP2
TP-43R
0.1 uFd
VCC
J1
1
2
3
4
5
PCB:
PCA:
TP3
TP-43R
PDCR-9277 *A
121R-27700 *A
A
CYPRESS SEMICONDUCTOR © 2005
OCD_RESET
P1_1
P1_0
Title
CY3210-CY8C21x23 (PROTON) POD MODULE DESIGN
TP1
TP-43R
HDR 1x5
Programming header
Size
B
Test points
Date:
5
4
3
2
Document Number
REF-13338
Monday, May 22, 2006
Rev
*A
Sheet
1
1
of
1