CBT3253A Dual 1-of-4 FET multiplexer/demultiplexer Rev. 3 — 24 September 2013 Product data sheet 1. General description The CBT3253A is a dual 1-of-4 high-speed TTL-compatible FET multiplexer/demultiplexer. The low ON-resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. 1OE, 2OE, S0, and S1 select the appropriate B output for the A-input data. The CBT3253A is characterized for operation from 40 C to +85 C. 2. Features and benefits 5 switch connection between two ports TTL-compatible input levels Minimal propagation delay through the switch Latch-up protection exceeds 100 mA per JEDEC standard JESD78 class II level A ESD protection: HBM JESD22-A114E exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101C exceeds 1000 V Multiple package options Specified from 40 C to +85 C 3. Ordering information Table 1. Ordering information Type number Temperature range Package Name Description Version CBT3253AD 40 C to +85 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 CBT3253ADB 40 C to +85 C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 CBT3253ADS 40 C to +85 C SSOP16[1] plastic shrink small outline package; 16 leads; body width 3.9 mm; lead pitch 0.635 mm SOT519-1 CBT3253APW 40 C to +85 C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 [1] Also known as QSOP16. CBT3253A NXP Semiconductors Dual 1-of-4 FET multiplexer/demultiplexer 4. Functional diagram 1A 7 6 5 4 3 2A 9 10 11 12 13 S0 S1 1OE 2OE Fig 1. 1B1 1B2 1B3 1B4 2B1 2B2 2B3 2B4 14 2 1 15 002aab828 Logic diagram CBT3253A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 September 2013 © NXP B.V. 2013. All rights reserved. 2 of 15 CBT3253A NXP Semiconductors Dual 1-of-4 FET multiplexer/demultiplexer 5. Pinning information 5.1 Pinning CBT3253A 1OE 1 16 VCC S1 2 15 2OE 1B4 3 14 S0 1B3 4 13 2B4 1B2 5 12 2B3 1B1 6 11 2B2 1A 7 GND 8 CBT3253A 10 2B1 9 2A 1OE 1 16 VCC S1 2 15 2OE 1B4 3 14 S0 1B3 4 13 2B4 1B2 5 12 2B3 1B1 6 11 2B2 1A 7 10 2B1 GND 8 2A 002aab827 002aab824 Fig 2. 9 Pin configuration SOT109-1 (SO16) and SOT519-1 (SSOP16) Fig 3. Pin configuration SOT338-1 (SSOP16) and SOT403-1 (TSSOP16) 5.2 Pin description Table 2. Pin description Symbol Pin Description 1OE, 2OE 1, 15 output enable (active LOW) S1, S0 2, 14 select control input 1B4, 1B3, 1B2, 1B1 3, 4, 5, 6 1B outputs/inputs 1A 7 1A input/output GND 8 ground (0 V) 2A 9 2A input/output 2B1, 2B2, 2B3, 2B4 10, 11, 12, 13 2B outputs/inputs VCC 16 positive supply voltage CBT3253A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 September 2013 © NXP B.V. 2013. All rights reserved. 3 of 15 CBT3253A NXP Semiconductors Dual 1-of-4 FET multiplexer/demultiplexer 6. Functional description Table 3. Function selection H = HIGH voltage level; L = LOW voltage level; X = Don’t care. Inputs Switch 1OE 2OE S1 S0 X H X X disconnect 1A and 2A H X X X disconnect 1A and 2A L L L L 1A to 1B1 and 2A to 2B1 L L L H 1A to 1B2 and 2A to 2B2 L L H L 1A to 1B3 and 2A to 2B3 L L H H 1A to 1B4 and 2A to 2B4 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions supply voltage VCC Min Max Unit 0.5 +7.0 V VI input voltage 0.5 +7.0 V ISW switch current continuous current through each switch - 128 mA IIK input clamping current VI < 0 V 50 mA Tstg storage temperature 65 +150 C Ptot total power dissipation [1] Tamb = 40 C to +85 C SO16 package [2] - 500 mW SSOP16 package [3] - 500 mW TSSOP16 package [3] - 500 mW [1] The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. [2] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C. [3] For SSOP16 and TSSOP16 package: Ptot derates linearly with 5.5 mW/K above 70 C. 8. Recommended operating conditions Table 5. Operating conditions All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Symbol Parameter Min Max Unit VCC supply voltage 4.5 5.5 V VIH HIGH-level input voltage 2.0 - V VIL LOW-level input voltage - 0.8 V Tamb ambient temperature 40 +85 C CBT3253A Product data sheet Conditions operating in free-air All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 September 2013 © NXP B.V. 2013. All rights reserved. 4 of 15 CBT3253A NXP Semiconductors Dual 1-of-4 FET multiplexer/demultiplexer 9. Static characteristics Table 6. Static characteristics Tamb = 40 C to +85 C. Symbol Parameter Conditions Min Typ[1] Max Unit VIK input clamping voltage VCC = 4.5 V; II = 18 mA - - 1.2 V Vpass pass voltage VI = VCC = 5.0 V; IO = 100 A 3.6 3.9 4.2 V II input leakage current VCC = 5.5 V; VI = GND or 5.5 V - - 1 A ICC supply current VCC = 5.5 V; IO = 0 mA; VI = VCC or GND - - 3 A ICC additional supply current per input; VCC = 5.5 V; one input at 3.4 V, other inputs at VCC or GND - - 2.5 mA CI input capacitance control pins; VI = 3 V or 0 V - 4.5 - pF Cio(off) off-state input/output capacitance A port; VO = 3 V or 0 V; nOE = VCC - 11.4 - pF B port; VO = 3 V or 0 V; nOE = VCC - 3.8 - pF Cio(on) on-state input/output capacitance A port and B port - 18.6 - pF - 5 7 RON ON resistance VCC = 4.5 V VI = 0 V; II = 64 mA [1] [2] [3] VI = 0 V; II = 30 mA - 5 7 VI = 2.4 V; II = 15 mA - 10 15 All typical values are measured at VCC = 5 V; Tamb = 25 C. [2] This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. [3] Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. The lowest voltage of the two (A or B) terminals determines the ON resistance. 10. Dynamic characteristics Table 7. Dynamic characteristics Tamb = 40 C to +85 C; VCC = 4.5 V to 5.5 V; for test circuit, see Figure 6. Symbol Parameter Conditions Min Max Unit tpd propagation delay nA to nBn or nBn to nA; see Figure 4 [1][2] - 0.25 ns Sn to nA; see Figure 4 [1][2] 1.2 6.2 ns nOE to nA or nBn; see Figure 5 [2] 1.3 6.3 ns Sn to nBn; see Figure 5 [2] 1.4 6.4 ns nOE to nA or nBn; see Figure 5 [2] 1.1 7.2 ns Sn to nBn; see Figure 5 [2] 1.0 7 ns enable time ten disable time tdis [1] This parameter is warranted but not production tested. The propagation delay is based on the RC time constant of the typical ON resistance of the switch and a load capacitance, when driven by an ideal voltage source (zero output impedance). [2] tPLH and tPHL are the same as tpd. tPZL and tPZH are the same as ten. tPLZ and tPHZ are the same as tdis. CBT3253A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 September 2013 © NXP B.V. 2013. All rights reserved. 5 of 15 CBT3253A NXP Semiconductors Dual 1-of-4 FET multiplexer/demultiplexer 11. AC waveforms VI VM input VM 0V tPHL tPLH VOH VM output VM VOL 001aai367 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 4. The input (nA; nBn) to output (nBn; nA) or input (Sn) to output (nA) propagation delay times VI VM nOE, Sn input VM GND tPZL tPLZ VCC output LOW-to-OFF OFF-to-LOW VM VX VOL tPZH tPHZ VOH VY output HIGH-to-OFF OFF-to-HIGH VM GND switch enabled switch disabled switch enabled 001aal212 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 5. Table 8. Enable and disable times Measurement points Supply voltage Input VCC VI VM VM VX VY 4.5 V to 5.5 V GND to 3.0 V 1.5 V 1.5 V VOL + 0.3 V VOH 0.3 V CBT3253A Product data sheet Output All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 September 2013 © NXP B.V. 2013. All rights reserved. 6 of 15 CBT3253A NXP Semiconductors Dual 1-of-4 FET multiplexer/demultiplexer 12. Test information VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VEXT VCC VI RL VO G DUT RT RL CL 001aae331 Test data is given in Table 9. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig 6. Table 9. Test circuit for measuring switching times Test data Supply voltage Input VCC VI tr, tf CL RL tPLH, tPHL tPLZ, tPZL tPHZ, tPZH 4.5 V to 5.5 V GND to 3.0 V 2.5 ns 50 pF 500 open 7.0 V open CBT3253A Product data sheet Load VEXT All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 September 2013 © NXP B.V. 2013. All rights reserved. 7 of 15 CBT3253A NXP Semiconductors Dual 1-of-4 FET multiplexer/demultiplexer 13. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.039 0.016 0.028 0.020 inches 0.010 0.057 0.069 0.004 0.049 0.16 0.15 0.05 0.244 0.041 0.228 0.01 0.01 0.028 0.004 0.012 θ 8o o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. Fig 7. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Package outline SOT109-1 (SO16) CBT3253A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 September 2013 © NXP B.V. 2013. All rights reserved. 8 of 15 CBT3253A NXP Semiconductors Dual 1-of-4 FET multiplexer/demultiplexer SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm D SOT338-1 E A X c y HE v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 8 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.00 0.55 8o o 0 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT338-1 Fig 8. REFERENCES IEC JEDEC JEITA MO-150 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Package outline SOT338-1 (SSOP16) CBT3253A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 September 2013 © NXP B.V. 2013. All rights reserved. 9 of 15 CBT3253A NXP Semiconductors Dual 1-of-4 FET multiplexer/demultiplexer SSOP16: plastic shrink small outline package; 16 leads; body width 3.9 mm; lead pitch 0.635 mm D E SOT519-1 A X c y HE v M A Z 9 16 A2 A (A 3) A1 θ Lp L 8 1 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp v w y Z (1) θ mm 1.73 0.25 0.10 1.55 1.40 0.25 0.31 0.20 0.25 0.18 5.0 4.8 4.0 3.8 0.635 6.2 5.8 1 0.89 0.41 0.2 0.18 0.09 0.18 0.05 8o o 0 Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC JEITA ISSUE DATE 99-05-04 03-02-18 SOT519-1 Fig 9. EUROPEAN PROJECTION Package outline SOT519-1 (SSOP16) CBT3253A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 September 2013 © NXP B.V. 2013. All rights reserved. 10 of 15 CBT3253A NXP Semiconductors Dual 1-of-4 FET multiplexer/demultiplexer TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 E D A X c y HE v M A Z 9 16 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 8 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.40 0.06 8o o 0 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC JEITA MO-153 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 Fig 10. Package outline SOT403-1 (TSSOP16) CBT3253A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 September 2013 © NXP B.V. 2013. All rights reserved. 11 of 15 CBT3253A NXP Semiconductors Dual 1-of-4 FET multiplexer/demultiplexer 14. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes CBT3253A v.3 20130924 Product data sheet - CBT3253A v.2 Modifications: • Table 6 “Static characteristics” values for pass voltage modified. CBT3253A v.2 20070208 Product data sheet - CBT3253A v.1 CBT3253A v.1 20051024 Product data sheet - - CBT3253A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 September 2013 © NXP B.V. 2013. All rights reserved. 12 of 15 CBT3253A NXP Semiconductors Dual 1-of-4 FET multiplexer/demultiplexer 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 16.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. CBT3253A Product data sheet Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 September 2013 © NXP B.V. 2013. All rights reserved. 13 of 15 CBT3253A NXP Semiconductors Dual 1-of-4 FET multiplexer/demultiplexer Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] CBT3253A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 24 September 2013 © NXP B.V. 2013. All rights reserved. 14 of 15 CBT3253A NXP Semiconductors Dual 1-of-4 FET multiplexer/demultiplexer 18. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Contact information. . . . . . . . . . . . . . . . . . . . . 14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2013. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 24 September 2013 Document identifier: CBT3253A