AD ADG636YRUZ

1 pC Charge Injection, 100 pA Leakage,
CMOS, ±5 V/+5 V/+3 V Dual SPDT Switch
ADG636
FEATURES
FUNCTIONAL BLOCK DIAGRAM
1 pC charge injection
±2.7 V to ±5.5 V dual supply
+2.7 V to +5.5 V single supply
Automotive temperature range: −40°C to +125°C
100 pA (maximum at 25°C) leakage currents
85 Ω typical on resistance
Rail-to-rail operation
Fast switching times
Typical power consumption (<0.1 μW)
TTL-/CMOS-compatible inputs
14-lead TSSOP package
ADG636
S1A 4
S1B 5
6
D1
9
D2
S2A 11
S2B 10
1
14
2
A0
A1
EN
02754-001
LOGIC
Figure 1.
APPLICATIONS
Automatic test equipment
Data acquisition systems
Battery-powered instruments
Communication systems
Sample-and-hold systems
Remote-powered equipment
Audio and video signal routing
Relay replacement
Avionics
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG636 is a monolithic device, comprising two independently selectable CMOS single pole, double throw (SPDT)
switches. When on, each switch conducts equally well in both
directions.
1.
The ADG636 operates from a dual ±2.7 V to ±5.5 V supply, or
from a single supply of +2.7 V to +5.5 V.
2.
3.
4.
5.
Ultralow charge injection. QINJ: ±1.5 pC typical over the
full signal range.
Leakage current <0.25 nA maximum at 85°C.
Dual ±2.7 V to ±5 V or single +2.7 V to +5.5 V supply.
Automotive temperature range: −40°C to +125°C.
Small 14-lead TSSOP package.
This switch offers ultralow charge injection of ±1.5 pC over the
entire signal range and leakage current of 10 pA typical at 25°C.
In addition, it offers on resistance of 85 Ω typical, which is matched
to within 2 Ω between channels. The ADG636 also has low power
dissipation yet is capable of high switching speeds.
The ADG636 exhibits break-before-make switching action and
is available in a 14-lead TSSOP package.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2002–2009 Analog Devices, Inc. All rights reserved.
ADG636
TABLE OF CONTENTS
Features .............................................................................................. 1
Absolute Maximum Ratings ............................................................9
Applications ....................................................................................... 1
ESD Caution...................................................................................9
Functional Block Diagram .............................................................. 1
Pin Configuration and Function Descriptions........................... 10
General Description ......................................................................... 1
Typical Performance Characteristics ........................................... 11
Product Highlights ........................................................................... 1
Test Circuits ..................................................................................... 13
Revision History ............................................................................... 2
Terminology .................................................................................... 15
Specifications..................................................................................... 3
Outline Dimensions ....................................................................... 16
Dual Supply ................................................................................... 3
Ordering Guide .......................................................................... 16
Single Supply ................................................................................. 5
REVISION HISTORY
9/09—Rev. A to Rev. B
Changes to Table 6 .......................................................................... 10
8/08—Rev. 0 to Rev. A
Updated Format .................................................................. Universal
Changes to Analog Switch Parameter ............................................ 3
Changes to Analog Switch Parameter ............................................ 5
Changes to Analog Switch Parameter ............................................ 7
Change to IDD Parameter.................................................................. 8
Changes to Absolute Maximum Ratings ....................................... 9
Added Table 5; Renumbered Sequentially .................................. 10
Moved Truth Table ......................................................................... 10
Added Endnote to Table 6 ............................................................. 10
Changes to Figure 19 ...................................................................... 13
Updated Outline Dimensions ....................................................... 16
Changes to Ordering Guide .......................................................... 16
1/02—Revision 0: Initial Version
Rev. B | Page 2 of 16
ADG636
SPECIFICATIONS
DUAL SUPPLY
VDD = 5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V. All specifications −40°C to +125°C, unless otherwise noted.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, RON
On-Resistance Match Between
Channels, ΔRON
On-Resistance Flatness, RFLAT(ON)
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
Drain Off Leakage, ID (Off )
Channel On Leakage, ID (On), IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
+25°C
85
115
2
4
25
40
±0.01
±0.1
±0.01
±0.1
±0.01
±0.1
−40°C to +85°C
−40°C to +125°C
Unit
VSS to VDD
V
140
160
Ω typ
Ω max
Ω typ
5.5
6.5
55
60
±0.25
±2
±0.25
±2
±0.25
±6
2.4
0.8
2
70
ns typ
0.005
100
tON Enable
150
ns max
ns typ
170
190
55
80
Break-Before-Make Time Delay, tBBM
120
100
135
tOFF Enable
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
μA typ
μA max
pF typ
±0.1
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS 1
Transition Time
Ω max
Ω typ
Ω max
ns max
ns typ
90
100
20
ns max
ns typ
10
ns min
Charge Injection
−1.2
pC typ
Off Isolation
−65
dB typ
Channel-to-Channel Crosstalk
−65
dB typ
Bandwidth −3 dB
610
MHz typ
Rev. B | Page 3 of 16
Test Conditions/Comments
VDD = +4.5 V, VSS = −4.5 V
VS = ±3 V, IDS = −1 mA, Figure 14
VS = ±3 V, IDS = −1 mA, Figure 14
VS = ±3 V, IDS = −1 mA
VS = ±3 V, IDS = −1 mA
VS = ±3 V, IDS = −1 mA
VS = ±3 V, IDS = −1 mA
VDD = +5.5 V, VSS = −5.5 V
VS = ±4.5 V, VD = 4.5 V, Figure 15
VS = ±4.5 V, VD = 4.5 V, Figure 15
VS = ±4.5 V, VD = 4.5 V, Figure 15
VS = ±4.5 V, VD = 4.5 V, Figure 15
VS = VD = ±4.5 V, Figure 16
VS = VD = ±4.5 V, Figure 16
VIN = VINL or VINH
VIN = VINL or VINH
VS1A = +3 V, VS1B = −3 V, RL = 300 Ω,
CL = 35 pF, Figure 17
VS1A = +3 V, VS1B = −3 V, RL = 300 Ω,
CL = 35 pF, Figure 17
RL = 300 Ω, CL = 35 pF, VS = 3 V,
Figure 19
RL = 300 Ω, CL = 35 pF, VS = 3 V,
Figure 19
RL = 300 Ω, CL = 35 pF, VS = 3 V,
Figure 19
RL = 300 Ω, CL = 35 pF, VS = 3 V,
Figure 19
RL = 300 Ω, CL = 35 pF, VS = 3 V,
Figure 18
RL = 300 Ω, CL = 35 pF, VS = 3 V,
Figure 18
VS = 0 V, RS = 0 Ω, CL = 1 nF,
Figure 20
RL = 50 Ω, CL = 5 pF, f = 10 MHz,
Figure 21
RL = 50 Ω, CL = 5 pF, f = 10 MHz,
Figure 23
RL = 50 Ω, CL = 5 pF, Figure 22
ADG636
Parameter
CS (Off )
CD (Off )
CD (On), CS (On)
POWER REQUIREMENTS
IDD
+25°C
5
8
8
−40°C to +85°C
−40°C to +125°C
0.001
1.0
ISS
0.001
1.0
1
Guaranteed by design; not subject to production test.
Rev. B | Page 4 of 16
Unit
pF typ
pF typ
pF typ
μA typ
μA max
μA typ
μA max
Test Conditions/Comments
f = 1 MHz
f = 1 MHz
f = 1 MHz
VDD = +5.5 V, VSS = −5.5 V
Digital inputs = 0 V or 5.5 V
Digital inputs = 0 V or 5.5 V
Digital inputs = 0 V or 5.5 V
Digital inputs = 0 V or 5.5 V
ADG636
SINGLE SUPPLY
VDD = 5 V ± 10%, VSS = 0 V, GND = 0 V. All specifications −40°C to +125°C, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
+25°C
On Resistance, RON
210
290
3
On Resistance Match Between Channels, ΔRON
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
Channel On Leakage, ID (On), IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
−40°C to +125°C
0 V to VDD
350
380
12
13
±0.01
±0.1
Drain Off Leakage, ID (Off )
−40°C to +85°C
±0.25
±2
±0.01
±0.25
±2
nA max
±0.01
±0.1
±0.25
±6
nA typ
nA max
2
V min
V max
μA typ
μA max
pF typ
90
ns typ
0.005
210
ns max
ns typ
235
275
70
105
Break-Before-Make Time Delay, tBBM
185
135
180
tOFF Enable
nA max
±0.1
150
tON Enable
Ω typ
Ω max
Ω typ
Ω max
nA typ
2.4
0.8
ns max
ns typ
120
135
30
ns max
ns typ
10
ns min
Charge Injection
0.3
pC typ
Off Isolation
−60
dB typ
Channel-to-Channel Crosstalk
−65
dB typ
Bandwidth −3 dB
CS (Off )
CD (Off )
CD (On), CS (On)
530
5
8
8
MHz typ
pF typ
pF typ
pF typ
Rev. B | Page 5 of 16
Test Conditions/Comments
V
nA typ
±0.1
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS 1
Transition Time
Unit
VDD = 4.5 V, VSS = 0 V
VS = 3.5 V, IDS = −1 mA, Figure 14
VS = 3.5 V, IDS = −1 mA, Figure 14
VS = 3.5 V, IDS = −1 mA
VS = 3.5 V, IDS = −1 mA
VDD = 5.5 V
VS = 1 V/4.5 V, VD = 4.5 V/1 V,
Figure 15
VS = 1 V/4.5 V, VD = 4.5 V/1 V,
Figure 15
VS = 1 V/4.5 V, VD = 4.5 V/1 V,
Figure 15
VS = 1 V/4.5 V, VD = 4.5 V/1 V,
Figure 15
VS = VD = 4.5 V/1 V, Figure 16
VS = VD = 4.5 V/1 V, Figure 16
VIN = VINL or VINH
VIN = VINL or VINH
VS1A = 3 V, VS1B = 0 V, RL = 300 Ω,
CL = 35 pF, Figure 17
VS1A = 3 V, VS1B = 0 V, RL = 300 Ω,
CL = 35 pF, Figure 17
RL = 300 Ω, CL = 35 pF, VS = 3 V,
Figure 19
RL = 300 Ω, CL = 35 pF, VS = 3 V,
Figure 19
RL = 300 Ω, CL = 35 pF, VS = 3 V,
Figure 19
RL = 300 Ω, CL = 35 pF, VS = 3 V,
Figure 19
RL = 300 Ω, CL = 35 pF, VS = 3 V,
Figure 18
RL = 300 Ω, CL = 35 pF, VS = 3 V,
Figure 18
VS = 0 V, RS = 0 Ω, CL = 1 nF,
Figure 20
RL = 50 Ω, CL = 5 pF, f = 10 MHz,
Figure 21
RL = 50 Ω, CL = 5 pF, f = 10 MHz,
Figure 23
RL = 50 Ω, CL = 5 pF, Figure 22
f = 1 MHz
f = 1 MHz
f = 1 MHz
ADG636
Parameter
POWER REQUIREMENTS
IDD
+25°C
−40°C to +85°C
−40°C to +125°C
0.001
1.0
1
Guaranteed by design; not subject to production test.
Rev. B | Page 6 of 16
Unit
μA typ
μA max
Test Conditions/Comments
VDD = 5.5 V
Digital inputs = 0 V or 5.5 V
Digital inputs = 0 V or 5.5 V
ADG636
VDD = 3 V ± 10%, VSS = 0 V, GND = 0 V. All specifications −40°C to +125°C, unless otherwise noted.
Table 3.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, RON
On Resistance Match Between Channels, ΔRON
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
+25°C
Channel On Leakage, ID (On), IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
−40°C to +125°C
0 V to VDD
380
420
460
5
±0.01
±0.1
Drain Off Leakage, ID (Off )
−40°C to +85°C
±0.25
±2
±0.01
±0.25
±2
nA max
±0.01
±0.1
±0.25
±6
nA typ
nA max
0.005
2
170
Break-Before-Make Time Delay, tBBM
390
450
ns max
ns typ
460
530
110
175
V min
V max
μA typ
μA max
pF typ
ns typ
250
360
tOFF Enable
nA max
±0.1
320
tON Enable
Ω typ
Ω typ
nA typ
2.0
0.8
ns max
ns typ
205
230
80
ns max
ns typ
10
ns min
Charge Injection
0.6
pC typ
Off Isolation
−60
dB typ
Channel-to-Channel Crosstalk
−65
dB typ
Bandwidth −3 dB
CS (Off )
CD (Off )
CD (On), CS (On)
530
5
8
8
MHz typ
pF typ
pF typ
pF typ
Rev. B | Page 7 of 16
Test Conditions/Comments
V
nA typ
±0.1
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS 1
Transition Time
Unit
VDD = 2.7 V, VSS = 0 V
VS = 1.5 V, IDS = −1 mA, Figure 14
VS = 1.5 V, IDS = −1 mA
VDD = 3.3 V
VS = 1 V/3 V, VD = 3 V/1 V,
Figure 15
VS = 1 V/3 V, VD = 3 V/1 V,
Figure 15
VS = 1 V/3 V, VD = 3 V/1 V,
Figure 15
VS = 1 V/3 V, VD = 3 V/1 V,
Figure 15
VS = VD = 1 V/3 V, Figure 16
VS = VD = 1 V/3 V, Figure 16
VIN = VINL or VINH
VIN = VINL or VINH
VS1A = 2 V, VS1B = 0 V, RL = 300 Ω,
CL = 35 pF, Figure 17
VS1A = 2 V, VS1B = 0 V, RL = 300 Ω,
CL = 35 pF, Figure 17
RL = 300 Ω, CL = 35 pF, VS = 2 V,
Figure 19
RL = 300 Ω, CL = 35 pF, VS = 2 V,
Figure 19
RL = 300 Ω, CL = 35 pF, VS = 2 V,
Figure 19
RL = 300 Ω, CL = 35 pF, VS = 2 V,
Figure 19
RL = 300 Ω, CL = 35 pF, VS1 = 2 V,
Figure 18
RL = 300 Ω, CL = 35 pF, VS1 = 2 V,
Figure 18
VS = 0 V, RS = 0 Ω, CL = 1 nF,
Figure 20
RL = 50 Ω, CL = 5 pF, f = 10 MHz,
Figure 21
RL = 50 Ω, CL = 5 pF, f = 10 MHz,
Figure 23
RL = 50 Ω, CL = 5 pF, Figure 22
f = 1 MHz
f = 1 MHz
f = 1 MHz
ADG636
Parameter
POWER REQUIREMENTS
IDD
+25°C
−40°C to +85°C
−40°C to +125°C
0.001
1.0
1
Guaranteed by design; not subject to production test.
Rev. B | Page 8 of 16
Unit
μA typ
μA max
Test Conditions/Comments
VDD = 3.3 V
Digital inputs = 0 V or 3.3 V
Digital inputs = 0 V or 3.3 V
ADG636
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 4.
Parameter
VDD to VSS
VDD to GND
VSS to GND
Analog Inputs1
Digital Inputs1
Peak Current, S or D (Pulsed at 1 ms,
10% Duty Cycle Maximum)
Continuous Current, S or D
Operating Temperature Range
Storage Temperature Range
Junction Temperature
TSSOP Package
θJA Thermal Impedance
θJC Thermal Impedance
Lead Soldering
Lead Temperature, Soldering (10 sec)
IR Reflow, Peak Temperature (<20 sec)
Pb-Free Soldering
Reflow, Peak Temperature
Time at Peak Temperature
1
Rating
13 V
−0.3 V to +6.5 V
+0.3 V to −6.5 V
VSS − 0.3 V to VDD + 0.3 V
−0.3 V to VDD + 0.3 V or
30 mA, whichever
occurs first
20 mA
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Only one absolute maximum rating may be applied at any one
time.
ESD CAUTION
10 mA
−40°C to +125°C
−65°C to +150°C
150°C
150°C/W
27°C/W
300°C
220°C
260(+0/−5)°C
20 sec to 40 sec
Overvoltages at EN, A0, A1, S, or D are clamped by internal diodes. Current
should be limited to the maximum ratings given.
Rev. B | Page 9 of 16
ADG636
A0
1
14
A1
EN
2
13
GND
VSS
3
ADG636
12
4
TOP VIEW
(Not to Scale)
VDD
S1A
11
S2A
S1B
5
10
S2B
D1
6
9
D2
NC
7
8
NC
NC = NO CONNECT
02754-002
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Mnemonic
A0
EN
VSS
S1A
S1B
D1
NC
NC
D2
S2B
S2A
VDD
GND
A1
Description
Digital Input (LSB).
Active High Digital Input.
Negative Power Supply. For single-supply operation, connect this pin to GND.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Drain Terminal. Can be an input or output.
Not Electrically Connected.
Not Electrically Connected.
Drain Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Positive Power Supply.
Ground (0 V) Power Supply.
Digital Input (MSB).
Table 6. Truth Table
A1
X1
0
0
1
1
1
A0
X1
0
1
0
1
EN
0
1
1
1
1
On Switch
None
S1A, S2A
S1B, S2A
S1A, S2B
S1B, S2B
X = logic state doesn’t matter; it can be either 0 or 1.
Rev. B | Page 10 of 16
ADG636
TYPICAL PERFORMANCE CHARACTERISTICS
350
VDD, VSS = ±2.5V
ON RESISTANCE (Ω)
150
VDD, VSS = ±3.3V
100
VDD, VSS = ±5V
50
–3
–2
–1
0
1
2
3
4
5
VD, VS (V)
0
2.5
3.0
3.5
4.0
4.5
5.0
ID (OFF)
1
CURRENT (nA)
VDD = 4.5V
200
IS (OFF)
–3
–5
ID (ON), IS (ON)
–7
–9
VDD = 3.3V
–11
VDD = 5V
100
VDD = +5V
VSS = –5V
–13
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
–15
02754-004
0.5
VD, VS (V)
0
20
40
60
80
TEMPERATURE (°C)
100
120
Figure 7. Leakage Currents vs. Temperatures, Dual Supply
Figure 4. On Resistance vs. VD (VS), Single Supply
5
VDD = +5V
VSS = –5V
IS (OFF)
3
1
140
–1
120
TA = +125°C
100
CURRENT (nA)
ON RESISTANCE (Ω)
2.0
–1
300
TA = +85°C
80
60
ID (OFF)
–3
–5
ID (ON), IS (ON)
–7
–9
40
–4
–3
–2
–1
–11
TA = –40°C
0
1
VD, VS (V)
VDD = 5V
VSS = 0V
–13
2
3
4
5
02754-005
TA = +25°C
20
0
–5
1.5
3
VDD = 3V
160
1.0
5
TA = 25°C
VSS = 0V
400
180
0.5
Figure 6. On Resistance vs. VD (VS) for Different Temperatures, Single Supply
VDD = 2.7V
0
0
TA = –40°C
TA = +25°C
VD, VS (V)
600
ON RESISTANCE (Ω)
100
0
Figure 3. On Resistance vs. VD (VS), Dual Supply
500
TA = +125°C T = +85°C
A
150
02754-003
–4
200
50
VDD, VSS = ±4.5V
0
–5
250
02754-007
ON RESISTANCE (Ω)
300
VDD, VSS = ±3V
200
VDD = 5V
VSS = 0V
02754-006
TA = 25°C
Figure 5. On Resistance vs. VD (VS) for Different Temperatures, Dual Supply
Rev. B | Page 11 of 16
–15
0
20
40
60
80
TEMPERATURE (°C)
100
120
Figure 8. Leakage Currents vs. Temperature, Single Supply
02754-008
250
ADG636
1.0
0
TA = 25°C
0.5
0
–0.5
VDD = +5V
VSS = 0V
–1.0
TA = 25°C
–20
ATTENUATION (dB)
CHARGE INJECTION (pC)
–10
VDD = +3V
VSS = 0V
VDD = +5V
VSS = –5V
VDD = +5V
VSS = 0V
–30
–40
–50
VDD = +5V
VSS = –5V
–60
–70
–1.5
–4
–3
–2
–1
0
VS (V)
1
2
3
4
–90
0.3
02754-009
–2.0
–5
5
1
Figure 9. Charge Injection vs. Source Voltage
1000
0
TA = 25 C
–2
200
VDD = +5V
VSS = –5V
150
tON
tOFF
–20
0
20
40
60
TEMPERATURE (°C)
80
100
120
VDD = +5V
VSS = 0V
–10
–12
–18
0.3
TA = 25 C
–20
VDD = +5V
VSS = 0V
–40
VDD = +5V
VSS = –5V
–50
–60
–70
10
100
FREQUENCY (MHz)
1000
02754-011
–80
1
10
100
Figure 13. On Response vs. Frequency
0
–30
1
FREQUENCY (MHz)
Figure 10. tON/tOFF Enable Timing vs. Temperature
–90
0.3
–8
–16
VDD = +5V
VSS = –5V
02754-010
VDD = +5V
VSS = 0V
–10
–6
–14
50
0
–40
VDD = +5V
VSS = –5V
Figure 11. Off Isolation vs. Frequency
Rev. B | Page 12 of 16
1000
02754-013
100
TA = 25 C
–4
VDD = +5V
VSS = 0V
ATTENUATION (dB)
TIME (ns)
100
Figure 12. Crosstalk vs. Frequency
250
ATTENUATION (dB)
10
FREQUENCY (MHz)
02754-012
–80
ADG636
TEST CIRCUITS
IDS
V1
D
ID (OFF)
VD
VS
Figure 14. On Resistance
S
NC
A
NC = NO CONNECT
0.1µF
VDD
VS
A1
A0
50Ω
ADDRESS
DRIVE (VIN)
VSS
S1A
VS1A
S1B
VS1B
3V
90%
RL
300Ω
GND
90%
tTRANSITION
VOUT
D1
EN
50%
50%
0V
VOUT
2.4V
tTRANSITION
CL
35pF
Figure 17. Transition Time, tTRANSITION
VDD
VSS
0.1µF
0.1µF
VS
S1A
A0
A1
50Ω
ADDRESS
DRIVE (VIN)
VSS
VDD
VS
3V
0V
S1B
VOUT
GND
80%
tBBM
CL
35pF
02754-018
RL
300Ω
EN
80%
VOUT
D1
2.4V
Figure 18. Break-Before-Make Delay, tBBM
VDD
VSS
0.1µF
0.1µF
ENABLE
DRIVE (VIN)
VSS
S1A
A0
A1
VS
3V
50%
S1B
VOUT
OUTPUT
90%
90%
0V
EN
VS
50%
0V
VOUT
D1
50Ω
GND
RL
300Ω
CL
35pF
Figure 19. Enable Delay, tON (EN), tOFF (EN)
Rev. B | Page 13 of 16
tON (EN)
tOFF (EN)
02754-019
VDD
A
Figure 16. On Leakage
VSS
0.1µF
ID (ON)
VD
Figure 15. Off Leakage
VDD
D
02754-017
RON = V1/IDS
S
02754-016
A
02754-014
VS
D
02754-015
IS (OFF)
S
ADG636
VDD
VSS
VDD
VSS
S
D
VOUT
VOUT
CL
1nF
VS
VIN
SW OFF
SW OFF
SW ON
DECODER
GND
SW ON
SW OFF
SW OFF
CHARGE INJECTION = ΔVOUT × CL
EN
Figure 20. Charge Injection
VDD
VSS
0.1µF
0.1µF
VDD
NETWORK
ANALYZER
VSS
S
50Ω
50Ω
VS
D
RL
50Ω
OFF ISOLATION = 20 log
02754-021
GND
VOUT
VOUT
VS
Figure 21. Off Isolation
VDD
VSS
0.1µF
0.1µF
VDD
NETWORK
ANALYZER
VSS
S
50Ω
VS
D
GND
INSERTION LOSS = 20 log
VOUT
02754-022
RL
50Ω
VOUT WITH SWITCH
VOUT WITHOUT SWITCH
Figure 22. Bandwidth
VDD
VSS
0.1µF
NETWORK
ANALYZER
0.1µF
VDD
VSS
S1
VOUT
RL
50Ω
D
S2
RL
50Ω
50Ω
GND
VS
CHANNEL-TO-CHANNEL CROSSTALK = 20 log
VOUT
VS
Figure 23. Channel-to-Channel Crosstalk
Rev. B | Page 14 of 16
02754-020
VIN
A1 A2
02754-023
RS
ΔVOUT
QINJ = CL × ΔVOUT
ADG636
TERMINOLOGY
VDD
Most positive supply potential.
IINL(IINH)
Input current of the digital input.
VSS
Most negative power supply in a dual-supply application.
In single-supply applications, this should be tied to ground at
the device.
CS (Off)
Channel input capacitance for the off condition.
CD (Off)
Channel output capacitance for the off condition.
GND
Ground (0 V) reference.
CD (On), CS (On)
On switch capacitance.
IDD
Positive supply current.
CIN
Digital input capacitance.
ISS
Negative supply current.
tON (EN)
Delay time between the 50% and 90% points of the digital input
and the switch on condition.
S
Source terminal. May be an input or output.
tOFF (EN)
Delay time between the 50% and 90% points of the digital input
and the switch off condition.
D
Drain terminal. May be an input or output.
tTRANSITION
Delay time between the 50% and 90% points of the digital input
and the switch on condition when switching from one address
state to another.
RON
Ohmic resistance between Terminal D and Terminal S.
ΔRON
On resistance match between any two channels (that is,
RON max − RON min).
RFLAT(ON)
Flatness is defined as the difference between the maximum and
minimum values of on resistance as measured over the specified
analog signal range.
IS (Off)
Source leakage current with the switch off.
ID (Off)
Drain leakage current with the switch off.
ID (On), IS (On)
Channel leakage current with the switch on.
VD, VS
Analog voltage on Terminal D and Terminal S.
VINL
Maximum input voltage for Logic 0.
tBBM
Off time or on time measured between the 80% points of both
switches when switching from one address state to another.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
Crosstalk
A measure of unwanted signal that is coupled through from one
channel to another as a result of parasitic capacitance.
Off Isolation
A measure of unwanted signal coupling through an off switch.
Bandwidth
The frequency response of the on switch.
Insertion Loss
Loss due to the on resistance of the switch.
VINH
Minimum input voltage for Logic 1.
Rev. B | Page 15 of 16
ADG636
OUTLINE DIMENSIONS
5.10 (0.201)
5.00 (0.197)
4.90 (0.193)
14
8
4.50 (0.177)
4.40 (0.173)
4.30 (0.169)
6.40 (0.252)
BSC
1
7
PIN 1
1.05 (0.041)
1.00 (0.039)
0.80 (0.031)
0.65 (0.025)
BSC
0.15 (0.006)
0.05 (0.002)
COPLANARITY
0.10 (0.004)
0.30 (0.012)
0.19 (0.007)
1.20 (0.047)
MAX
0.20 (0.008)
0.09 (0.003)
SEATING
PLANE
8°
0°
0.75 (0.029)
0.60 (0.023)
0.45 (0.018)
061908-A
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 24. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model
ADG636YRU
ADG636YRU-REEL
ADG636YRUZ 1
ADG636YRUZ-REEL1
ADG636YRUZ-REEL71
1
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Package Description
14-Lead Thin Shrink Small Outline Package [TSSOP]
14-Lead Thin Shrink Small Outline Package [TSSOP]
14-Lead Thin Shrink Small Outline Package [TSSOP]
14-Lead Thin Shrink Small Outline Package [TSSOP]
14-Lead Thin Shrink Small Outline Package [TSSOP]
Z = RoHS Compliant Part.
©2002–2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D02754-0-9/09(B)
Rev. B | Page 16 of 16
Package Option
RU-14
RU-14
RU-14
RU-14
RU-14