5
4
3
2
1
Table of Contents
1
2
3
4
5
Revisions & Change Log
Title
Block Diagram
KL26Z MCU
OpenSDA INTERFACE
I/O Headers and Power Supply
Rev
Description
Date
X1
Initial Draft
Feb/12/13 Alistair
Approved
X2
* MCU Pin assignments changed for
Feb/18/13 Alistair
Pins 57-64
X3
* J1 & J4 Signal mapping changed
Feb/19/13 Alistair
* RGB led connections changed
D
D
X4
* SPI FLASH MEMORY deleted
Feb/19/13 Alistair
* CAD Notes added
A
* BACK ANNOTATION DONE
Mar/07/13 Alistair
* DNP Assy option removed for
some jumpers & tabluted in Page2
* A085 RELEASE
A1
* Some jumpers are commented
as DNP for production build
as tabulated in page 2
Apr/16/13 V J Ramon
* R36 Populated
Apr/26/13
V J Ramon
* C1 Made DNP
May/03/13
V J Ramon
* A085 Release
B
* Changing C13 from 1uF to 0.1uF
to fix yield issue
Jun/20/13 V J Ramon
C
C
FREEDOM KL26Z
B
B
A
A
Automotive, Industrial & MultiMarket Solutions Group
6501 William Cannon Drive West Austin, TX 78735-8598
ICAP Classification:
Designer:
Jones [LnT]
5
4
3
2
FCP: ____
FIUO: ____
PUBI: X
Drawing Title:
FRDM-KL26Z
Drawn by:
Jones [LnT]
Page Title:
Approved:
ALISTAIR
Size
C
Document Number
Date:
Thursday, June 20, 2013
TITLE PAGE
Rev
B
SCH-27833 | PDF: SPF-27833
Sheet
1
1
of
5
5
4
1. Unless Otherwise Specified:
All resistors are in ohms, 5%, 1/8 Watt
All capacitors are in uF, 20%, 50V
All voltages are DC
All polarized capacitors are aluminum electrolytic
D
3
S.No
REF DES
2
1
PROTOTYPE
BUILD (Rev A)
DESCRIPTION
PRODUCTION
BUILD (Rev A1)
2. Interrupted lines coded with the same letter or letter
combinations are electrically connected.
1.
J1,J3
CON 2X8 SKT TH 100MIL SP 335H AU 104L
LOAD
DNP
3. Device type number is for reference only. The number
varies with the manufacturer.
2.
J2
CON 2X10 SKT TH 100MIL CTR 340H AU 104L
LOAD
DNP
3.
J8,J5,J15,J13,J14,J9
HDR 1X2 TH 100MIL SP 339H AU 98L
LOAD
DNP
4.
J4
CON 2X6 SKT TH 100MIL CTR 340H AU 104L
LOAD
DNP
5.
J7,J12
HDR 2X5 TH 50MIL CTR 167H AU 91L
LOAD
DNP
6.
J11
HDR 1X3 TH 100MIL SP 330H AU 98L
LOAD
DNP
7.
BT1
HOLDER BATTERY 20MM DIA TH
LOAD
DNP
4. Special signal usage:
_B Denotes - Active-Low Signal
<> or [] Denotes - Vectored Signals
5. Interpret diagram in accordance with American
National Standards Institute specifications, current
revision, with the exception of logic block symbology.
D
C
C
B
B
A
A
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: ___
PUBI: X
FRDM-KL26Z
Page Title:
BLOCK DIAGRAM
5
4
3
2
Size
C
Document Number
Date:
Thursday, June 20, 2013
Rev
B
SCH-27833 | PDF: SPF-27833
Sheet
1
2
of
5
5
4
3
2
1
P3V3_KL26Z
R10
0
R11
R9
KL26Z Decoupling Caps
D
VREFH
C
1K
DNP
C4
C15
C14
1.0UF 1.0UF 1.0UF
C12
A
P3V3_KL26Z
C6
C10
0.1UF 0.1UF 0.1UF
AREF
0 DNP
D6
3.0V
DNP
C9
0.1UF
GND
{5}
CAD NOTE:
Please place these capacitors
near their respective CPU pin
(VREFH to VREFL
and VDDA to VSSA)
TP4
D
USB_VOUT33
GND
C8
0.1UF
C7
2.2UF
P3V3_KL26Z
GND
{3,4}
{5}
{5}
28
29
D3
D8
32
33
34
EXTAL_CLK_8MHZ
XTAL_CLK_8MHZ
1.0M
DNP
3
2
GND2
R17
{3,4,5}
RST_TGTMCU
4
1
{5}
{5}
GND1
C
Y1
8MHZ
C22
22PF
GND
GND
GND
GND
1
2
D14
D15
{5}
{5}
{5}
{5}
{5}
{5}
C18
22PF
PTE20
PTE21
PTE22
PTE23
I2C0_SCL
I2C0_SDA
{5}
22
23
24
25
26
27
PTE30
DIFF_ADC0_DP
DIFF_ADC0_DM
DIFF_ADC1_DP / LIGHT_SNS
DIFF_ADC1_DM
9
10
11
12
20
21
PTE29/LED_RED
DAC_OUT
PTE31/LED_GRN
17
18
19
CAD NOTE:
For routing Feasibility
We can swap between
PTE29 & PTE31
{5}
0
LIGHT_SNS
6
5
R36
S1
S3
5V
1
PTB0/LLWU_P5/ADC0_SE8/TSI0_CH0/I2C0_SCL/TPM1_CH0
PTB1/ADC0_SE9/TSI0_CH6/I2C0_SDA/TPM1_CH1
PTB2/ADC0_SE12/TSI0_CH7/I2C0_SCL/TPM2_CH0
PTB3/ADC0_SE13/TSI0_CH8/I2C0_SDA/TPM2_CH1
PTA12/TPM1_CH0/I2S0_TXD0
PTA13/TPM1_CH1/I2S0_TX_FS
PTB16/TSI0_CH9/SPI1_MOSI/UART0_RX/TPM_CLKIN0/SPI1_MISO
PTB17/TSI0_CH10/SPI1_MISO/UART0_TX/TPM_CLKIN1/SPI1_MOSI
PTB18/TSI0_CH11/TPM2_CH0/I2S0_TX_BCLK
PTB19/TSI0_CH12/TPM2_CH1/I2S0_TX_FS
PTA18/EXTAL0/UART1_RX/TPM_CLKIN0
PTA19/XTAL0/UART1_TX/TPM_CLKIN1/LPTMR0_ALT1
PTA20/RESET
PTC0/ADC0_SE14/TSI0_CH13/EXTRG_IN/CMP0_OUT/AUDIOUSB_SOF_OUT/I2S0_TXD0
PTC1/LLWU_P6/RTC_CLKIN/ADC0_SE15/TSI0_CH14/I2C1_SCL/TPM0_CH0/I2S0_TXD0
PTC2/ADC0_SE11/TSI0_CH15/I2C1_SDA/TPM0_CH1/I2S0_TX_FS
PTC3/LLWU_P7/UART1_RX/TPM0_CH2/CLKOUT/I2S0_TX_BCLK
PTC4/LLWU_P8/SPI0_PCS0/UART1_TX/TPM0_CH3/I2S0_MCLK
PTC5/LLWU_P9/SPI0_SCK/LPTMR0_ALT2/CMP0_OUT/I2S0_RXD0
PTC6/LLWU_P10/CMP0_IN0/SPI0_MOSI/EXTRG_IN/SPI0_MISO/I2S0_RX_BCLK/I2S0_MCLK
PTC7/CMP0_IN1/SPI0_MISO/SPI0_MOSI/AUDIOUSB_SOF_OUT/I2S0_RX_FS
PTC8/CMP0_IN2/I2C0_SCL/TPM0_CH4/I2S0_MCLK
PTC9/CMP0_IN3/I2C0_SDA/TPM0_CH5/I2S0_RX_BCLK
PTC10/I2C1_SCL/I2S0_RX_FS
PTC11/I2C1_SDA/I2S0_RXD0
PTE0/SPI1_MISO/UART1_TX/RTC_CLKOUT/CMP0_OUT/I2C1_SDA
PTE1/SPI1_MOSI/UART1_RX/SPI1_MISO/I2C1_SCL
PTE20/ADC0_DP0/ADC0_SE0/TPM1_CH0/UART0_TX
PTE21/ADC0_DM0/ADC0_SE4A/TPM1_CH1/UART0_RX
PTE22/ADC0_DP3/ADC0_SE3/TPM2_CH0/UART2_TX
PTE23/ADC0_DM3/ADC0_SE7A/TPM2_CH1/UART2_RX
PTE24/TPM0_CH0/I2C0_SCL
PTE25/TPM0_CH1/I2C0_SDA
PTE29/CMP0_IN5/ADC0_SE4B/TPM0_CH2/TPM_CLKIN0
PTE30/DAC0_OUT/ADC0_SE23/CMP0_IN4/TPM0_CH3/TPM_CLKIN1
PTE31/TPM0_CH4
PTD0/SPI0_PCS0/TPM0_CH0
PTD1/ADC0_SE5B/SPI0_SCK/TPM0_CH1
PTD2/SPI0_MOSI/UART2_RX/TPM0_CH2/SPI0_MISO
PTD3/SPI0_MISO/UART2_TX/TPM0_CH3/SPI0_MOSI
PTD4/LLWU_P14/SPI1_PCS0/UART2_RX/TPM0_CH4
PTD5/ADC0_SE6B/SPI1_SCK/UART2_TX/TPM0_CH5
PTD6/LLWU_P15/ADC0_SE7B/SPI1_MOSI/UART0_RX/SPI1_MISO
PTD7/SPI1_MISO/UART0_TX/SPI1_MOSI
USB0_DM
USB0_DP
2
E1
35
36
37
38
39
40
41
42
43
44
45
46
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
A0
A1
A2
A3
{5}
{5}
{5}
{5}
TSI0_CH9
TSI0_CH10
I2S_TX_BCLK
I2S_TX_FS
I2S_TXD
I2S_MCLK
CMP_OUT
I2S_RX_BCLK
SOF_OUT
I2S_RX_FS
I2S_RXD
D13/LED_BLUE
PTB18
PTB19
{5}
{5}
PTC0
A5
A4
{5}
{4,5}
{5}
PTC4
PTC5
PTC6
PTC7
D6
D7
PTC10
PTC11
{5}
{5}
Slider_4
C
{5}
{5}
{5}
{5}
2
1
SW1
TL1015AF160QG
SW1
C11
GND
0.1UF
{5}
{5}
INT1_ACCEL
INT2_ACCEL
D9
{5}
D2
{5}
D10
{5}
D13
{3,5}
D11
{5}
D12
{5}
GND
PB SWITCH
{5}
{5}
R7
0
PKL26Z128VLH4
C3
330 OHM
KINETIS KL26Z MCU
1.0UF
P5V0_USB_CONN_VBUS
GND
GND
USB_CONN_DN
USB_CONN_DP
ID
4
TC_USB_ID_TP
R6
R5
OPTIONAL USB HOST FUNCTIONALITY
2
5
G
USB_DN
USB_DP
33
33
TP3
P5V_SDA
U2
GSOT05C-GS08
GND
B
P5V_KL26Z
2
1
D+
3
1
D-
2
S2
S4
J9
DNP
3
SHIELD_K26USB
B
VREGIN
P5V_KL26Z
L1
1
J6
CONN USB MINI-B
7
14
15
PTA0/SWD_CLK/TSI0_CH1/TPM0_CH5
PTA1/TSI0_CH2/UART0_RX/TPM2_CH0
PTA2/TSI0_CH3/UART0_TX/TPM2_CH1
PTA3/SWD_DIO/TSI0_CH4/I2C1_SCL/TPM0_CH0
PTA4/NMI/TSI0_CH5/I2C1_SDA/TPM0_CH1
PTA5/USB_CLKIN/TPM0_CH2/i2S0_TX_BCLK
4
31
47
CAD NOTE:
place this resistor close to the main trace
running from the pin to J4 to minimize any stub
and mis-match of the differential pair.
VOUT33
KL25_SWD_CLK
8
VSSA
{3}
{5}
D0
{5}
D1
SWD_DIO_TGTMCU
{5}
D4
{5}
D5
TSI CAPACITIVE/TOUCH
INTERFACE
P5V_KL26Z
16
R13
VDDA
UART1_TX_TGTMCU
R14
1K
VREFH
VREFL
{4}
1K
VSS1
VSS2
VSS3
UART1_RX_TGTMCU
VDD1
VDD2
VDD3
U3
{4}
13
GND
3
30
48
GND
HDR 1X2 TH
L2
TC_USB_ID_TP
1
2
330 OHM
GND
POPULATE THESE
PARTS FOR
USB HOST FUNCTIONALITY
GND
KL26Z USB CONNECTOR
R8
0
DNP
ELECTRICAL PROTECTION
IS NOT PROVIDED.
USE IT AT YOUR OWN RISK GND
RGB LED FEATURE
SHORTING HEADER ON BOTTOM LAYER
SWD CONNECTOR
TP11
{3,4}
SWD_DIO_TGTMCU
D7
J7
P3V3_KL26Z
A
PTE29/LED_RED
R16
680
LEDRGB_RED
1
R
P3V3
Jumper is shorted by a cut-trace
on bottom layer. Cutting the trace
will effectively isolate the on-board
MCU from the OpenSDA
debug interface.
TP10
4
LEDRGB_GREEN
3
LEDRGB_BLUE
R15
330
PTE31/LED_GRN
330
D13/LED_BLUE
1
3
5
7
9
G
2
R20
B
TP13
D13
{3,5}
CAD NOTE:
place R11 close to the main trace
running from the pin to J2 to minimize any stub
CLV1A-FKB-CJ1M1F1BB7R4S3
2
4
6
8
10
J8
HDR 1X2 TH
DNP
1
2
KL25_SWD_CLK
SWD_CLK_TGTMCU
RST_TGTMCU
{3}
A
{4}
{3,4,5}
HDR 2X5
DNP
GND
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: ___
PUBI: X
FRDM-KL26Z
Page Title:
KL26Z MCU
5
4
3
2
Size
C
Document Number
Date:
Thursday, June 20, 2013
Rev
B
SCH-27833 | PDF: SPF-27833
Sheet
1
3
of
5
5
4
3
2
1
U5
P3V3_SDA
1
VDD1
C19
1.0UF
7
GND
VDDA
D
D
8
VSSA
JTAG_TCLK/SWD_CLK/EZP_CLK/TSI0_CH1/PTA0/UART0_CTS/UART0_COL/FTM0_CH5
JTAG_TDI/EZP_DI/TSI0_CH2/PTA1/UART0_RX/FTM0_CH6
JTAG_TDO/TRACE_SWO/EZP_DO/TSI0_CH3/PTA2/UART0_TX/FTM0_CH7
JTAG_TMS/SWD_DIO/TSI0_CH4/PTA3/UART0_RTS/FTM0_CH0
NMI/EZP_CS/TSI0_CH5/PTA4/FTM0_CH1/LLWU_P3
GND
P5V_SDA
L4
1
TP20
2
11
TC_VBAT_TP
330 OHM
SDA_SWD_EN
SDA_USB_CONN_DP
4
TC_SDA_USB_ID_TP
33
33
SDA_USB_DN
SDA_USB_DP
6
5
4
3
EXTAL0/PTA18/FTM0_FLT2/FTM_CLKIN0
XTAL0/PTA19/FTM1_FLT0/FTM_CLKIN1/LPTMR0_ALT1
17
18
SDA_EXTAL_CLK_8MHz
SDA_XTAL_CLK_8MHz
VREGIN
VOUT33
USB0_DM
USB0_DP
C26
2.2UF
10
9
GND
C29
22PF
DNP
GND
8MHZ
GND
GND
GND
DNP
GND
SDA_RST_TGTMCU
EXTAL32
XTAL32
RST_TGTMCU
{3,4,5}
P3V3_SDA
R25
UART1_TX_TGTMCU
RESET
{3}
UART1_RX_TGTMCU
P5V_SDA
{3}
P3V3_SDA
2
VSS1
R28
4.7K
GND
SDA_RST
ADC0_SE15/TSI0_CH14/PTC1/SPI0_PCS3/UART1_RTS/FTM0_CH0/I2S0_TXD0/LLWU_P6
ADC0_SE4B/CMP1_IN0/TSI0_CH15/PTC2/SPI0_PCS2/UART1_CTS/FTM0_CH1/I2S0_TX_FS
CMP1_IN1/PTC3/SPI0_PCS1/UART1_RX/FTM0_CH2/I2S0_TX_BCLK/LLWU_P7
PTC4/SPI0_PCS0/UART1_TX/FTM0_CH3/CMP1_OUT/LLWU_P8
PTC5/SPI0_SCK/LPTMR0_ALT2/I2S0_RXD0/CMP0_OUT/LLWU_P9
CMP0_IN0/PTC6/SPI0_SOUT/PDB0_EXTRG/I2S0_RX_BCLK/I2S0_MCLK/LLWU_P10
CMP0_IN1/PTC7/SPI0_SIN/USB_SOF_OUT/I2S0_RX_FS
22
23
24
25
26
27
28
SDA_SPI0_RST_B
SDA_SPI0_CS
UART1_TX_TGTMCU
UART1_RX_TGTMCU
SDA_SPI0_SCK
SDA_SPI0_SOUT
SDA_SPI0_SIN
TP19
TP16
C
VCC
2
3
SWD_DIO_TGTMCU
{3}
GND
7
P3V3_SDA
R33
10K
U4A
1
14
GND
C
TARGET MCU
INTERFACE
SIGNALS
10K
19
330 OHM
20
21
C32
22PF
DNP
SDA_SWD_OE_B
L3
2
ADC0_SE8/TSI0_CH0/PTB0/I2C0_SCL/FTM1_CH0/FTM1_QD_PHA/LLWU_P5
ADC0_SE9/TSI0_CH6/PTB1/I2C0_SDA/FTM1_CH1/FTM1_QD_PHB
TC_EXTAL_TP
TC_XTAL_TP
TP6
TP5
3
GND
3
2
GND2
GND1
TP18
U7
GSOT05C-GS08
Jumper is shorted by a cut-trace
on bottom layer. Cutting the trace
will effectively isolate the
OpenSDA RESET to MCU
J13
1
HDR 1X2 TH
2
Y2
4
1
74LVC125ADB
TP22
EPAD
A
33
R21
220
GND
GND
LED GREEN
PU/PD LOGIC:
SERIAL INTERFACE
IS ALWAYS RESET
WHEN USB PORT
IS DISCONNECTED
U4C
GND
SDA_LED_R
9
D8
74LVC125ADB
SDA_LED
C
SDA_PTD5
{5}
U4D
13
29
30
31
32
8
SDA_SPI0_SIN
TP15
PTD4/SPI0_PCS1/UART0_RTS/FTM0_CH4/EWM_IN/LLWU_P14
ADC0_SE6B/PTD5/SPI0_PCS2/UART0_CTS/UART0_COL/FTM0_CH5/EWM_OUT
ADC0_SE7B/PTD6/SPI0_PCS3/UART0_RX/FTM0_CH6/FTM0_FLT0/LLWU_P15
PTD7/CMT_IRO/UART0_TX/FTM0_CH7/FTM0_FLT1
10
3
SDA_USB_VOUT33
R24
R23
5
G
R35
10K
VBAT
GND
SDA_USB_CONN_DN
1
P3V3_SDA
P5V_SDA
1
ID
D+
D-
2
SDA_JTAG_TCLK
SDA_JTAG_TDI
SDA_JTAG_TDO
SDA_JTAG_TMS
SDA_SWD_EN
SHORTING HEADER J13 ON BOTTOM LAYER
P5V0_SDA_USB_CONN_VBUS
2
S1
S3
5V
1
S2
S4
SDA_USBSHIELD
C16
1.0UF
J10
CONN USB MINI-B
12
13
14
15
16
12
SDA_SPI0_SCK
R22
11
SWD_CLK_TGTMCU
{3}
74LVC125ADB
SDA_PTD6
A5
0
{3,5}
KL26Z Pin
PTC1/LLWU_P6/RTC_CLKIN
PK20DX128VFM5
P5V_SDA
OpenSDA INTERFACE
R19
4.7K
SDA_USB_P5V_SENSE
B
TP14
B
R18
10K
GND
SPARE 74HC125 buffer
P3V3_SDA
P3V3_KL26Z
4
P3V3_SDA
R12
10K
U4B
TP9
TP12
TC_74125_SPARE_I_TP 5
OpenSDA INTERFACE JTAG CONNECTOR
TARGET RESET AND BOOTLOADER
PUSH BUTTON
6
{3,4,5}
TC_74125_SPARE_O_TP
RST_TGTMCU
1
0.1UF
74LVC125ADB
1
3
5
7
9
2
C13
EVQ-PE105K
GND
GND
GND
R31
10K
J12
P3V3_SDA
SW2
2
4
6
8
10
SDA_JTAG_TMS
SDA_JTAG_TCLK
SDA_JTAG_TDO
SDA_JTAG_TDI
SDA_RST
HDR 2X5
DNP
A
A
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: ___
PUBI: X
FRDM-KL26Z
Page Title:
OpenSDA interface
5
4
3
2
Size
C
Document Number
Date:
Thursday, June 20, 2013
Rev
B
SCH-27833 | PDF: SPF-27833
Sheet
1
4
of
5
4
3
OPTIONAL
COIN CELL
HOLDER
TP7
3
2
1
D1
MBR120VLSFT1G
A
C
P3V3_BATT
-
C1
P5V_KL26Z
D4
P3V3
C21
0.1UF
P3V3
C20
0.1UF
C17
4.7uF
0
C2
10uF
P3V3_SDA
{3}
I2C0_SCL
{3}
I2C0_SDA
4
J14
20mOhm Resistor
in layout
GND
HDR 1X2 TH
DNP
6
1
2
GND
SHORTING HEADER
ON BOTTOM LAYER
R4
0
FXOS8700CQ_I2C_SA0
7
FXOS8700CQ_I2C_SA1
10
2
MMA8451_BYP
TP17
GND
15
GND
GND
U6
INT1
SDA/MOSI
INT2
SA0/MISO
CRST
SA1/CS
RST
BYP
RSVD1
NC_15
RSVD2
5
C27
0.1UF
SCL/SCLK
1
R30
4.7K
14
R27
4.7K
VDD
J15
HDR 1X2 TH
DNP
VDDIO
4
GND
10
GND2
NCP1117ST33T3G
TAB
R2
GND1
C5
10uF
VOUT
D2
MBR120VLSFT1G
A
C
P3V3_VREG
2
1
VIN
2
12
U1
3
P5-9V_VIN_VR
GND
C
MBR120VLSFT1G
C
C
P3V3
R3
1
D3
MBR120VLSFT1G
( ACCELEROMETER AND MAGNETOMETER )
P3V3_KL26Z
D
GND
A
A
A
D5
MBR120VLSFT1G
J5
HDR 1X2 TH
DNP
10uF
DNP
D
P5V_SDA
P3V3
DNP
+
3003
1
I2C INERTIAL SENSOR
BT1
DNP
GND
P5-9V_VIN
2
1
2
5
11
9
INT1_ACCEL
{3}
INT2_ACCEL
{3}
8
16
3
13
C31
0.1UF
FXOS8700CQ
P3V3
R32
10K
{3}
{3}
{3}
{3}
{3}
{3}
{3}
{3}
D0
D1
D2
D3
D4
D5
D6
D7
{3}
{3}
{3}
{3}
{3}
{3}
D8
D9
D10
D11
D12
D13
C
ARDUINO COMPATIBLE HEADERS
FXOS8700CQ_I2C_SA0
C
R34
10K
DNP
GND
P3V3
R26
10K
DNP
AREF
D14
D15
TP21
16
14
12
10
8
6
4
2
FXOS8700CQ_I2C_SA1
20
18
16
14
12
10
8
6
4
2
{3}
{3}
{3}
GND
TP24
J2
CON_2X10
J1
CON 2X8
DNP
GND
15
13
11
9
7
5
3
1
DNP
19
17
15
13
11
9
7
5
3
1
GND
R29
10K
VISIBLE LIGHT SENSOR
P3V3
PTC11
PTC10
PTC7
PTC6
PTC4
PTC0
PTB19
PTB18
{3}
{3}
{3}
{3}
{3}
{3}
PTE30
PTC5
PTE23
PTE22
PTE21
PTE20
I2S_RXD
I2S_RX_FS
SOF_OUT
I2S_RX_BCLK
I2S_MCLK
I2S_TXD
I2S_TX_FS
I2S_TX_BCLK
B
R1
10K
LIGHT_SNS
DAC_OUT
CMP_OUT
DIFF_ADC1_DM
DIFF_ADC1_DP
DIFF_ADC0_DM
DIFF_ADC0_DP
{3}
1
{3}
{3}
{3}
{3}
{3}
{3}
{3}
{3}
Q1
ALS-PT19-315C/L177/TR8
2
B
GND
CAD NOTE:
For routing Feasibility
We can swap between the
Diff pairs ADC0* & ADC1*
1
3
5
7
9
11
IN
P5V_KL26Z
1
2
3
P5V_SDA
1
3
5
7
9
11
13
15
J3
CON 2X8
DNP
5VDC VR
SUPPORT
J11
DNP
HDR_1X3
J4
OUT
CON 2X6 SKT
2
4
6
8
10
12
D10
{3,4}
C
MBR120VLSFT1G
C
MBR120VLSFT1G
2
4
6
8
10
12
14
16
D9
C30
2.2UF
RST_TGTMCU
P5V_USB
P3V3
P5-9V_VIN
TP2 DNP
C23 C24 C25
GND
10uF 10uF 10uF
DNP DNP DNP
P5V_USB
P5-9V_VIN
A
DEBUG GROUND HOOK
DNP
A
A
P3V3
A
P5V_USB
{4}
GND
GND
SDA_PTD5
GND
C28
10uF
DNP
IN CIRCUIT TEST
GND PROBING
TP1
TP8
GND
{3}
{3}
{3}
{3}
{3}
{3,4}
5
A0
A1
A2
A3
A4
A5
TP23
ICAP Classification:
Drawing Title:
FCP: ___
FIUO: ___
PUBI: X
FRDM-KL26Z
Page Title:
ARDUINO SHIELDS & PWR SUPPLY
GND
4
3
2
Size
C
Document Number
Date:
Thursday, June 20, 2013
Rev
B
SCH-27833 | PDF: SPF-27833
Sheet
1
5
of
5