ATMEL T0930-TJQ

Features
•
•
•
•
•
•
•
•
Up to 33 dBm Output Power in CW Mode
High Power Added Efficiency (PAE)
Single Supply Operation at 2.4 V (1 W) or 3.2 V (2 W)
Current Consumption in Power-down Mode £ 10 µA
No External Power Supply Switch Required
Power Ramp Control
Simple Input and Output Matching for Maximum Flexibility
SMD Package (PSSOP16 with Heat Slug)
SiGe Power
Amplifier for
CW
Applications
Electrostatic sensitive device.
Observe precautions for handling.
Description
The T0930 is a monolithic integrated power amplifier IC. The device is manufactured
with Atmel’s Silicon-Germanium (SiGe) technology and has been designed for use in
900-MHz two-way pagers, PDAs, meter readers and ISM phones.
T0930
With a single supply voltage of 2.4 V to 3.4 V and a neglectable leakage current in
power-down mode, the pager amplifier only needs few external components and thus
helps to reduce system costs. It is suited for operation in CW mode.
Figure 1. Block Diagram
VCC1
VCC2
5
1
2
GND
4 10
3
16
11
RFin
12
6
Match
(900 MHz)
Match
Match
13
RFout/VCC3
(900 MHz)
14
15
8
VCTL
VCC,CTL
GND
9
Harmonic
tuning
Control
7
4722A–SIGE–06/03
1
Pin Configuration
Figure 2. Pinning PSSOP16
VCC2
1
16
GND
VCC2
2
15
RFOUT/VCC3
VCC2
3
14
RFOUT/VCC3
GND
4
13
RFOUT/VCC3
VCC1
5
12
RFOUT/VCC3
RFIN
6
11
RFOUT/VCC3
GND
7
10
GND
VCTL
8
9
VCC,CTL
T0930
Pin Description
2
Pin
Symbol
Function
1
VCC2
Supply voltage 2
2
VCC2
Supply voltage 2
3
VCC2
Supply voltage 2
4
GND
Ground
5
VCC1
Supply voltage 1
6
RFIN
RF input
7
GND
Ground (control)
8
VCTL
Control input
9
VCC,CTL
10
GND
Supply voltage for control
11
RFOUT/VCC3
RF output/supply voltage 3
12
RFOUT/VCC3
RF output/supply voltage 3
13
RFOUT/VCC3
RF output/supply voltage 3
14
RFOUT/VCC3
RF output/supply voltage 3
15
RFOUT/VCC3
RF output/harmonic tuning
16
GND
Ground (optional)
Ground
T0930
4722A–SIGE–06/03
T0930
Absolute Maximum Ratings
All voltages refer to GND
Parameters
Symbol
Supply voltage VCC at VCTL = 1.7 V, Pin 5
Pin 1, 2, 3
Pins 11, 12, 13, 14 and 15
Pin 9
VCC1
VCC2
VCC3
VCC, CTL
Input power, Pin 6
Gain control voltage(1), Pin 8
Min.
Pin
VCTL
0
Duty cycle for operation
Junction temperature
Tj
Storage temperature
Tstg
Note:
-40
Max.
Unit
4
4
4
4
V
12
dBm
2
V
100
%
+150
°C
+150
°C
1. The gain control voltage should always be 0.2 V below the supply voltage. RF should be applied before ramp-up.
Operating Range
All voltages referred to GND
Parameters
Symbol
Min.
Typ.
Max.
Unit
Supply voltage VCC(1) 1 W application
VCC1, VCC2, VCC3,
VCC, CTL
1.8
2.4
3
V
Supply voltage VCC(1) 2 W application
VCC1, VCC2, VCC3,
VCC, CTL
2.6
3.2
3.6
V
Tamb
-25
Ambient temperature
Input frequency
Note:
fin
°C
+85
900
MHz
1. The gain control voltage should be always 0.2 V below the supply voltage. RF should be applied before ramp-up.
3
4722A–SIGE–06/03
Electrical Characteristics for 1 W Application
VCC = VCC1, ... , VCC3, VCC, CTL = +2.4 V, VCTL = 1.7 V, Tamb = +25°C, 50-W input and 50-W external output match
No. Parameters
Test Conditions
Pin
Symbol
Min.
Typ.
Max.
Unit
Type*
VCC
1.8
2.4
3.0
V
A
A
A
10
µA
A
935
MHz
A
W
C
dBm
C
1
Power Supply
1.1
Supply voltage
1.2
Current consumption in
active mode
Pout = 30 dBm
PAE = 47%
I
1.3
Current consumption
(leakage current)
in power-down mode
VCTL £ 0.2 V
I
2
0.9
RF Input
2.1
Frequency range
fin
2.2
Input impedance(1)
Zi
50
2.3
Input power
Pin
5
2.4
Input VSWR(1)
3
880
900
Pin = 0 to 12 dBm
Pout = 30 dBm
12
2:1
C
RF Output
Zo
50
W
Pout
Pout
30
27
dBm
dBm
- 20
dBm
A
40
47
%
%
A
3.1
Output impedance(1)
3.2
Output power in normal
conditions
Pin = 5 dBm
RL = RG = 50 W
VCC = 2.4 V, Tamb = +25°C
VCC = 1.8 V, Tamb = +25°C
3.3
Minimum output power
VCTL = 0.3 V
3.4
Power-added efficiency
VCC = 2.4 V, Pout = 27 dBm
VCC = 2.4 V, Pout = 30 dBm
3.5
Stability
Temp = -25 to +85°C
no spurious ³ -60 dBc
VSWR
10:1
C
3.6
Load mismatch (stable,
no damage)
Pout = 30 dBm, all phases
VSWR
10:1
C
3.7
Second harmonic
distortion
2fo
-35
dBc
A
3.8
Third harmonic distortion
3fo
-35
dBc
A
3.9
Noise power
f = 925 to 935 MHz
f ³ 935 MHz
-70
-82
dBm
dBm
C
0.5
ms
A
dB
C
dB/V
C
PAE
PAE
Pout = 30 dBm
RBW = 100 kHz
-73
-85
3.10 Rise and fall time
Isolation between input
3.11
and output
4
Pin = 0 to 10 dBm
VCTL £ 0.2 V (power down)
50
C
A
Power Control
4.1
Control curve
Pout ³ 25 dBm
4.2
Power control range
VCTL = 0.3 to 2.0 V
4.3
Control voltage range
4.4
Control current
150
50
VCTL
Pin = 0 to 10 dBm, VCTL = 0 to 2.0 V
ICTL
0.3
dB
C
2.0
V
A
200
µA
A
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Notes: 1. With external matching (see “Application Circuit”).
4
T0930
4722A–SIGE–06/03
T0930
Electrical Characteristics for 2 W Application
VCC = VCC1, ... , VCC3, VCC, CTL = +3.2 V, VCTL = 1.9 V, Tamb = +25°C, 50-W input and 50-W external output match
No. Parameters
Test Conditions
Pin
Symbol
Min.
Typ.
Max.
Unit
Type*
VCC
2.6
3.2
3.6
V
A
A
A
10
µA
A
935
MHz
A
W
C
dBm
C
5
Power Supply
5.1
Supply voltage
5.2
Current consumption in
active mode
Pout = 33 dBm
PAE = 47%
I
5.3
Current consumption
(leakage current)
in power-down mode
VCTL £ 0.2 V
I
6
1.33
RF Input
6.1
Frequency range
fin
6.2
Input impedance(1)
Zi
50
6.3
Input power
Pin
5
6.4
Input VSWR(1)
7
880
900
Pin = 0 to 12 dBm
Pout = 30 dBm
12
2:1
C
RF Output
Zo
50
W
C
Pout
Pout
33
30
dBm
dBm
A
- 20
dBm
A
47
%
A
7.1
Output impedance(1)
7.2
Output power in normal
conditions
Pin = 5 dBm, RL = RG = 50 W
VCC = 3.2 V, Tamb = +25°C
VCC = 2.2 V, Tamb = +25°C
7.3
Minimum output power
VCTL = 0.3 V
7.4
Power-added efficiency
VCC = 3.2 V, Pout = 27 dBm
7.5
Stability
Temp = -25 to + 85°C
no spurious ³ -60 dBc
VSWR
10:1
C
7.6
Load mismatch
(stable, no damage)
Pout = 33 dBm, all phases
VSWR
10:1
C
7.7
Second harmonic
distortion
2fo
-35
dBc
A
7.8
Third harmonic distortion
3fo
-35
dBc
A
7.9
Noise power
f = 925 to 935 MHz
f ³ 935 MHz
-70
-82
dBm
dBm
C
0.5
µs
A
dB
C
dB/V
C
dB
C
2.0
V
A
200
µA
A
PAE
Pout = 33 dBm
RBW = 100 kHz
-73
-85
7.10 Rise and fall time
7.11
8
Isolation between input
and output
Pin = 0 to 10 dBm
VCTL £ 0.2 V (power down)
50
Power Control
8.1
Control curve
Pout ³ 25 dBm
8.2
Power control range
VCTL = 0.3 to 2.0 V
8.3
Control voltage range
8.4
Control current
150
50
VCTL
Pin = 0 to 10 dBm, VCTL = 0 to 2.0 V
ICTL
0.3
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Notes: 1. With external matching (see “Application Circuit”).
5
4722A–SIGE–06/03
Figure 3. Pout and PAE versus VCC (1 W Application)
50
PAE
45
Pout [dBm], PAE [%]
40
35
Pout
30
25
20
15
10
5
0
1.8
2.0
2.2
2.4
2.6
2.8
3.8
3.2
3.4
3.6
VCC [V]
Figure 4. Pout and PAE versus Vramp (1 W Application)
50
PAE
40
Pout [dBm], PAE [%]
Pout
30
20
10
0
-10
-20
1.00
6
1.25
1.50
Vramp [V]
1.75
2.00
T0930
4722A–SIGE–06/03
T0930
Figure 5. Pout and PAE versus VCC (2 W Application)
50
PAE
45
40
Pout [dBm], PAE [%]
35
Pout
30
25
20
15
10
5
0
1.8
2.0
2.2
2.4
2.6
2.8
3.0
3.2
3.4
3.6
3.8
4.0
VCC [V]
Figure 6. Pout and PAE versus Vramp (2 W Application)
50
PAE
40
Pout
30
Pout [dBm], PAE [%]
20
10
0
-10
-20
-30
-40
0.50
0.60
0.70
0.80
0.90
1.00
1.10
1.20
1.30
Vramp [V]
1.40
1.50
1.60
1.70
1.80
1.90
2.00
7
4722A–SIGE–06/03
Application Circuit
Figure 7. Application Circuit GSM Pager (900 MHz)
V CC
C1
C2
220 nF
220 nF
C3
39 pF
AVX
C13
220 nF
T1
1
16
2
15
3
14
4
13
5
12
6
11
C12
220 nF
C11
100 pF
T2
T6
T3
15 pF
AVX
C4
12 pF
L1
3.3 nH
T7
T8
T9
C10
RFOUT
56 pF
C9
8.2 pF
AVX
T5
7
10
Control
V CTL
C6
22 pF
8
Microstrip line : FR4 ; Epsilon(r) : 4.3 ; metal Cu : 35 mm
distance 1. layer -rf ground : 0.5 mm
l/mm
l/mm
w/mm
T1
20.5
x
1.0
T6
43.1
T2
1.3
x
1.0
T7
6.0
T3
14.8
x
0.5
T8
10.0
T4
14.2
x
0.5
T9
4.0
T5
2.5
x
1.0
8
1/4
wavelength
line
T4
C5
RFIN
900 MHz
harmonic tuning
9
V CC,CTL
C7
22 pF
C8
1 nF
w/mm
x
x
x
x
0.5
1.25
0.5
1.25
T0930
4722A–SIGE–06/03
T0930
Ordering Information
Extended Type Number
Package
Remarks
T0930-TJT
PSSOP16
Tube
T0930-TJQ
PSSOP16
Taped and reeled
Package Information
Package PSSOP16
4.98
4.80
Dimensions in mm
6.02
1.60
1.45
0.25
0.64
4.48
16
0.2
0.10
0.00
3.91
9
2.21
1.80
technical drawings
according to DIN
specifications
1
3.12
2.72
8
9
4722A–SIGE–06/03
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4722A–SIGE–06/03
xM