ATMEL T7023-PEQ

Features
•
•
•
•
•
•
Single 3-V Supply Voltage
High Power-added Efficient Power Amplifier (Pout Typically 23 dBm)
Ramp-controlled Output Power
Current-saving Standby Mode
Few External Components
HP-VFQFP-N16 Package
Bluetooth™
2.4-GHz Power
Amplifier
Electrostatic sensitive device.
Observe precautions for handling.
Description
The T7023 is a monolithic SiGe power amplifier. It is especially designed for operation
in TDMA systems like Bluetooth and WDCT.
T7023
Due to the ramp-control feature and a very low quiescent current, an external switch
transistor for VS is not required.
V2_PA
V2_PA
GND
V1_PA
Figure 1. Block Diagram
GND
GND
Ramp
PA_IN
GND
GND
GND
V3_PA_OUT
V3_PA_OUT
GND
V3_PA_OUT
SiGe PA
T7023
GND
Rev. 4532B–BLURF–01/03
1
Pin Configuration
V3_PA_OUT
V3_PA_OUT
V3_PA_OUT
GND
Figure 2. Pinning HP-VFQFP-N16
8 7 6 5
9
10
11
12
13 14 15 16
4
3
2
1
GND
GND
PA_IN
GND
V2_PA
V2_PA
GND
V1_PA
GND
GND
Ramp
GND
Pin Description
2
Pin
Symbol
1
GND
Ground
Function
2
PA_IN
Power amplifier input
3
GND
Ground
4
GND
Ground
5
GND
Ground
6
V3_PA_OUT
Inductor to power supply and matching network for power amplifier output
7
V3_PA_OUT
Inductor to power supply and matching network for power amplifier output
8
V3_PA_OUT
Inductor to power supply and matching network for power amplifier output
9
GND
Ground
10
GND
Ground
11
RAMP
Power ramping control input
12
GND
13
V2_PA
Ground
Inductor to power supply for power amplifier
14
V2_PA
Inductor to power supply for power amplifier
15
GND
16
V1_PA
Slug
GND
Ground
Supply voltage for power amplifier
Ground
T7023
4532B–BLURF–01/03
T7023
Absolute Maximum Ratings
All voltages are referred to ground (Pins GND and slug), no RF
Parameters
Symbol
Value
Unit
Supply voltage
Pins V1_PA, V2_PA and V3_PA_OUT
VS
6
V
Junction temperature
Tj
150
°C
Storage temperature
Tstg
-40 to +125
°C
RF input power PA
PinPA
10 dBm
dBm
Symbol
Value
Unit
RthJA
40
K/W
Thermal Resistance
Parameters
Junction ambient HP-VFQFP-N16, Slug
soldered on pcb
Operating Range
All voltages are referred to ground (Pins GND and slug). Power supply points are V1_PA, V2_PA, V3_PA_OUT.
The following table represents the sum of all supply currents depending on the TX mode.
Parameters
Supply voltage
Pins V1_PA, V2_PA and
V3_PA_OUT
Symbol
Min.
Typ.
Max.
Unit
VS
2.7
3.0
4.6
V
Supply current
IS
Standby current
IS_standby
Ambient temperature
Tamb
165
mA
10
-25
+25
µA
+70
°C
3
4532B–BLURF–01/03
Electrical Characteristics
Test conditions (unless otherwise specified): VS = 3.0 V, Tamb = 25°C
Parameters
Test Conditions
Symbol
Min.
Typ.
Max.
Unit
VS
2.7
3.0
4.6
V
(1)
Power Amplifier
Supply voltage
Pins V1_PA, V2_PA and
V3_PA_OUT
Supply current
TX
Standby
IS_TX
165
IS_standby
Frequency range
TX
f
2.4
Gain-control range
TX
DGp
60
42
Power gain maximum
TX
Pin PA_IN to V3_PA_OUT
Gp
28
30
Power gain minimum
TX
Pin PA_IN to V3_PA_OUT
Gp
-40
Ramping voltage maximum
TX, power gain (maximum)
Pin RAMP
VRAMP max
1.7
Ramping voltage minimum
TX, power gain (minimum)
Pin RAMP
VRAMP min
Ramping current maximum
V = 1.75 V
Power-added efficiency
TX
PAE
35
42
Saturated output power
TX, input power = 0 dBm
referred to Pins V3_PA_OUT
Psat
22
23
Input matching (2)
TX, Pin PA_IN
Load VSWR
<1.5:1
TX, Pin V3_PA_OUT
Load VSWR
<1.5:1
Output matching
(2)
Harmonics
at Psat = 23 dBm
TX, Pin V3_PA_OUT
Harmonics
at Psat = 23 dBm
TX, Pin V3_PA_OUT
Notes:
4
1.75
mA
10
µA
2.5
GHz
dB
33
dB
-17
dB
1.83
V
0.1
V
0.5
mA
%
24
dBm
2 fo
-30
dBc
3 fo
-30
dBc
1. Power amplifier shall be unconditionally stable, maximum duty cycle 100%, true CW operation, maximum load mismatch
and duration: VSWR 10:1 (all phases) 10 s, ZG = 50 W.
2. With external matching network, load impedance 50 W
T7023
4532B–BLURF–01/03
T7023
Typical Operating Characteristics
Figure 3. Output Power and PAE versus Supply Voltage
250
40
220
PAE
I_S_TX
30
190
Pout
20
f = 2.4 GHz
Vramp = 1.8 V
PinPA = 0 dBm
10
130
0
2.7
3.1
3.5
3.9
160
IS_TX (mA)
Pout (dBm), PAE (%)
50
4.3
100
4.7
Supply Voltage (V)
Figure 4. Output Power and PAE versus Frequency
50
250
200
I_S_TX
30
150
Pout
20
100
VS = 3 V
Vramp = 1.8 V
PinPA = 0 dBm
10
0
2400
IS_TX (mA)
Pout (dBm), PAE (%)
PAE
40
50
2420
2440
2460
2480
0
2500
Frequency (MHz)
Figure 5. Output Power and PAE versus Ramp Voltage
50
250
Pout
30
200
10
150
-10
IS_TX (mA)
Pout (dBm), PAE (%)
PAE
100
f = 2.4 GHz
VS = 3 V
PinPA = 0 dBm
I_S_TX
-30
50
-50
0
1.2
1.4
1.6
1.8
2.0
V ramp (V)
5
4532B–BLURF–01/03
40
250
PAE
Gain
30
200
20
150
I_S
10
IS_TX (mA)
Pout (dBm), PAE (%), gain (dB)
Figure 6. Output Power and PAE versus Input Power
100
VS = 3 V
Vramp = 1.7 V
PinPA = 0 dBm
0
50
Pout
-10
-40.0
-30.0
-20.0
-10.0
0.0
0
10.0
Input Power (dBm)
Figure 7. Pout versus Vramp and Temperature
30
f = 2.4 GHz
VS = 3 V
Pin = 0 dBm
20
Pout (dBm)
5
10
25
0
-15
80
-10
-40°C
-20
1.0
1.2
1.4
1.6
1.8
Vramp (V)
6
T7023
4532B–BLURF–01/03
T7023
Figure 8. Output Power versus IRamp Current
30
25
20
Pout (dBM)
15
10
-40°C
40°C
5
0
80°C
0°C
-5
-10
-15
-20
0.1
1.0
10.0
100.0
1000.0
Iramp (mA)
Figure 9. IS_TX versus VRamp Current
200
IS_TX (mA)
180
160
-40°C
140
120
40°C
100
0°C
80
60
40
80°C
20
0
0.1
1.0
10.0
100.0
1000.0
Iramp (mA)
7
4532B–BLURF–01/03
Input/Output Circuits
Figure 10. Input Circuit PA_IN/V1_PA
V1_PA
PA_IN
GND
Figure 11. Input Circuit RAMP/V1_PA
V1_PA
RAMP
Figure 12. Input Circuit V2_PA
V2_PA
GND
8
T7023
4532B–BLURF–01/03
T7023
Figure 13. Input/Output Circuit V3_PA_OUT
V3_PA_OUT
GND
Figure 14. Application Board Schematic
PA IN
V1_PA
1p5
V2_PA
3p3
5p6
16 15 14 13
12
1
11
2
T7023 10
3
9
4
5 6 7 8
Ramp
5p6
harm. termination
1p5
15n
H
blocking capacitors
depending on application
V3_PA
PA OUT
9
4532B–BLURF–01/03
Ordering Information
Extended Type Number
Package
Remarks
T7023-PES
HP-VFQFP-N16
Tube
T7023-PEQ
HP-VFQFP-N16
Taped and reeled
Package Information
10
T7023
4532B–BLURF–01/03
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© Atmel Corporation 2003.
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4532B–BLURF–01/03
xM