ATMEL AT90SC12036RU

Features
General
• High-performance, Low-power AVR® Enhanced RISC Architecture
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•
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– 120 Powerful Instructions (Most Executed in a Single Clock Cycle)
Low Power Idle and Power-down Modes
Bond Pad Locations Conforming to ISO 7816-2
ESD Protection to ± 4000V
Operating Ranges: 2.7V to 5.50V
Compliant with GSM, 3GPP and EMV 2000 Specifications
Available in Wafers, Modules, and Industry-standard Packages
Memory
• 120K Bytes of ROM Program Memory
• 36K Bytes of EEPROM, Including 64 OTP Bytes and 64-byte Bit-addressable Bytes
– 1 to 128-byte Program / Erase
– 1ms Program / 1ms Erase
– Typically 500,000 Write/Erase Cycles at a Temperature of 25oC
– 10 Years Data Retention
• 3K bytes RAM Memory
Secure
Microcontroller
for Smart Cards
AT90SC12036RU
Summary
Peripherals
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•
•
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One I/O Port
16-bit Timer
Random Number Generator (RNG)
2-level, 4-vector Interrupt Controller
Security
•
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Protection Against Physical Attack,
Environmental Protection Systems
Voltage Monitor
Frequency Monitor
Secure Memory Management/Access Protection (Supervisor Mode)
Development Tools
• Voyager Emulation Platform (ATV2 & ATV4) to Support Software Development
• IAR Embedded Workbench® V4.21 Debugger or Above
• Software Libraries and Application Notes
6547AS–SPD–29Mar07
Note: This is a summary document. A complete document will be
available under NDA. For more information, please contact your
local Atmel sales office.
Description
The AT90SC12036RU is a low-power, high-performance, 8-bit microcontroller with ROM and EEPROM memory, based on
the AVR enhanced RISC architecture.
By executing powerful instructions in a single clock cycle, the AT90SC12036RU achieves throughputs close to 1 MIPS per
MHz. Its Harvard architecture includes 32 general-purpose working registers directly connected to the ALU, allowing two
independent registers to be accessed in one single instruction executed in one clock cycle.
In addition to the 120K bytes of embedded ROM, the AT90SC12036RU includes 36K bytes of Atmel’s high density
EEPROM. The ability to map the EEPROM in the code space allows parts of the program memory to be reprogrammed insystem. This technology combined with the versatile 8-bit CPU on a monolithic chip provides a highly flexible and costeffective solution to many smart card applications.
The AT90SC12036RU can also be configured to offer compatibility with the AT90SC6436RT.
Figure 1 shows a block diagram of the AT90SC12036RU
Figure 1. AT90SC12036RU AVR Enhanced RISC Architecture
Data Bus
8-bit
OTP
EEPROM
User Memory
PC
Access
Control
ROM
Program
Memory
Random
Number
Generator
General
Purpose
Registers
x
16
y
z
Instruction
Register
8
8
ALU
Instruction
Decoder
8
16
2
RAM
Data Memory
VCC
16
Control
Lines
Access
Control
Status
Register
Interrupt
Unit
ISO 7816
I/O Port
Secure
Control
GND
CLK
IN/OUT
Timer
AT90SC12036RU
6547AS–SPD–29Mar07
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