ATMEL TH7815ACC

Features
•
•
•
•
•
•
•
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Data Rate up to 50 MHz (2 Outputs at 25 MHz Each)
Pixel Size: 10 µm x 10 µm (10 µm Pitch)
300 to 1100 nm Spectral Range
High Sensitivity and Lag Free Photodiodes
Very Low Noise (30 pJ/cm2 Noise Equivalent Illumination)
Antiblooming
Exposure Control
20-lead 0.4" DIL Package
Description
TH7815 linear arrays are based on Atmel’s most recent technology in terms of design
and performance. The flexibility and performance of these devices provide the opportunity to use them in most vision systems for industrial applications (web inspection,
process control, sorting and inspection of various parts), document scanning up to
200 dpi and metrology.
50 MHz 4096
Linear CCDs
TH7815ACC
Pin Identification
All pins must be connected.
Pin Number
Symbol
Function
4, 17
VDD1,2
Output Amplifiers Drain Supply
3, 18
VOS1,2
Video Outputs
5
VS
20
VDR
Reset Drain Supply
2
VGS
Output Gate Bias
14
ΦL1
13
ΦL2
15
ΦR
Reset Clock
10
ΦA
Antiblooming Gate Bias/Clock
7
VA
Antiblooming Drain Bias
8
VST
Storage Gate Bias
11
ΦP
Transfer Gate Clock
1, 6, 9, 12, 16, 19
VSS
Ground, Optical Grounding (Internally Connected)
VSS
VGS
VOS1
VDD1
VS
VSS
VA
VST
VSS
ΦA
Output Amplifiers Substate Bias
Readout Register Clocks
1
20
2
19
3
18
4
17
5
16
TH7815ACC
6
15
7
14
8
13
9
12
10
11
VDR
VSS
VOS2
VDDR
VSS
ΦR
ΦL1
ΦL2
VSSP
Φ
Rev. 1995A–IMAGE–04/02
1
Absolute Maximum Ratings*
Storage Temperature Range ......................... -55°C to +150°C
Note:
Operating Temperature Range........................ -40°C to +85°C
Thermal Cycling........................................................ 15°C/min
Maximum Applied Voltages:
• Pins 2, 8, 10, 11, 13, 14, 15 ................................. -0.3 to 15V
Stresses above those listed under absolute maximum
ratings may cause permanent device failure. Functionally at or above these limits is not implied.
Exposure to absolute maximum ratings for extended
periods may affect device reliability.
–
Operating range defines the limits within
which the functionality is guaranteed.
–
Electrical limits of applied signals are given
in operating conditions section.
• Pins 4, 5, 7, 17, 20 .............................................. -0.3 to 16V
• Pins 1, 6, 9, 12, 16, 19 ........................................0V (ground)
Operating
Precautions
2
Shorting the video outputs to any other pin, even temporarily, can permanently damage
the on-chip output amplifier.
TH7815ACC
1995A–IMAGE–04/02
TH7815ACC
Operating Conditions
Table 1. DC Characteristics
Value
Parameter
Symbol
Min.
Typ.
Max.
Unit
VDD1, VDD2
14.5
15
15.5
V
Storage Gate Bias
VST
2.2
2.4
2.6
V
Antiblooming Gate (See Pixel
Saturation Adjustment)
ΦA
2
4
7
V
VDR
13.5
14
14.5
V
VA
14.5
15
15.5
V
VGS
2.2
2.4
2.6
V
Output Amplifier Drain Supply
Reset Bias
Antiblooming Diode Bias
Register Output Gate Bias
Output Amplifier Source Supply
Ground
VS
0
V
VSS
0
V
Table 2. Drive Clocks Characteristics
Value
Parameter
Symbol
Min.
Typ.
Max.
Unit
8.5
-0.1
9
0
9.5
0.4
V
V
8.5
-0.1
9
0
9.5
0.4
V
V
8.5
-0.1
9
0
9.5
0.4
V
V
ΦR
Reset Gate
High Level
Low Level
Clock Capacitance < 50 pF
ΦP
Transfer Gate
High Level
Low Level
Remarks
Clock Capacitance < 200 pF
ΦL1, 2
Readout Register Clocks
High Level
Low Level
Maximum Readout Register
Frequency
ΦL1
460 pF
FH
10
25
200 pF
ΦL2
500 pF
MHz
3
1995A–IMAGE–04/02
Timing Diagrams
The following diagram shows the general clocking scheme for TH7815ACC.
The line is composed as follows:
Synopsis
TH7815ACC
Number of Prescan
Pixels Per Output
Number of Useful
Pixels Per Output
Total Number of Pixels
Per Output
4
2048
2052
Postscan elements may be added in order to either increase the exposure time, or to
provide a voltage reference level.
Figure 1. Line Timing Diagram
Line Period
ΦA
ΦP
Φ L1
Φ L2
ΦR
Transfer Period
The following diagram shows the timing for the transfer period:
Figure 2. Line Transfer Period
> 300 ns
> 10 ns
ΦA
(700 ns typ.) > 10 ns
ΦP
Φ L1
Φ L2
ΦR
first prescan pixel
ΦR clock may also be held in high state during line transfer period.
4
TH7815ACC
1995A–IMAGE–04/02
TH7815ACC
The following diagram shows the detailed timing for the pixel readout:
Figure 3. Pixel Readout Timing Diagram
Tpixel
90%
tr
Φ L1
Duty cycle: 50% ± 10%
Crossover at 50% ± 10%
Rise and fall time ≤ 10 ns
10%
90%
tf
Φ L2
10%
±
≥ 0 ns
Rise and fall time ≤ 8 ns
50%
ΦR
≥10 ns
floating diode level
Reset Feedthrough
Video outputs are synchronous
Video signal occurs on ΦL2 falling edge
Offset in darkness
First useful pixel occurs on 5th
falling edge of ΦL2 after ΦP
Video signal
VIDEO OUTPUTS
Exposure Time
Reduction
Antiblooming Gate
The TH7815ACC antiblooming structure provides an electronic shutter capability by
clocking phase ΦA during the line period. The timing diagram is described below:
ΦA
Min.
Typ.
Max.
Unit
Clock Capacitance < 200 pF
High Level
8.5
9
9.5
V
Low Level Sets Saturation Level
Low Level
2
4
7
V
See Pixel Saturation Adjustment
Pulse Min.
200 ns
5
1995A–IMAGE–04/02
Figure 4. Exposure Time Reduction
Line Period
High l eve l
ΦA
exposure time
≥100 ns
Low level
ΦP
Φ L1
Φ L2
ΦR
Transfer Period
Electro-optical
Performance
General test conditions
TCASE = 25°C
Light source: 2854K with 2 mm BG38 filter (unless specified) + F/11 optical aperture.
Typical operating conditions: 2 x 10 MHz.
All values are referred to prescan pixels level.
Value
Parameter
Saturation Output Voltage
Responsivity
Symbol
Min.
Typ.
Max.
Unit
VSAT
1.3
1.6
3
V
R
7.5
8.5
Responsivity Unbalance
Photo Response Non-uniformity
Peak-to-peak
Dark Signal
Dark Signal Non-uniformity (1σ)
V/µJ/cm2
2
5
%
PRNU
±5
±10
% VOS
DS
0.1
0.4
mV/ms
0.1
mV/ms
DSNU
Temporal RMS Noise in Darkness
VN
Dynamic Range
DR
CTF
CTF
LAG
LAG
1
Charge Transfer Inefficiency (Per
Stage)
HCTI
8.10-5
6
300
4,300
Remarks
VOS = 50 mV
to 1.2V
µV
5,300
65
%
%
TH7815ACC
1995A–IMAGE–04/02
TH7815ACC
Static and Dynamic Electrical Characteristics
Value
Parameter
Symbol
Output Amplifier Supply Current
IDD
Output Impedance
ZS
Min.
Typ.
Max
10
200
225
Unit
Remarks
mA
per amplifier
Ω
250
DC Output Level
VREF
10
V
Output Conversion Factor
CVF
5
µV/e-
Offset In Darkness
DC off
30
mV
Reset Feedthrough
Vft
400
mV
Electro-optical
Performances
Without Infrared Cutoff Filter
The TH7815ACC special semiconductor process enables to exploit the silicon’s high
near infrared sensitivity while maintaining good imaging performances in terms of
response uniformity and resolution. Typical changes in performance with and without
OR filtering are summarized below:
Parameter
With IR Cut-off Filter
Without IR Cut-off Filter
Average Video Signal Due to a Given
Scene Illumination
VOS
6 x VOS
PRNU (Single Defects Excluded)
±5%
±5%
CTF at Nyquist Frequency
65%
40%
Pixel Saturation
Adjustment
TH7815ACC antiblooming structure can be used to adjust the maximum saturation voltage, by adjusting the ΦA bias voltage. The following curve shows the relationship
between VSAT and VΦA.
Figure 5. Pixel Saturation Antiblooming Bias (Typical conditions)
!
7
1995A–IMAGE–04/02
Spectral
Responsivity
The following curve shows the typical spectral responsivity for TH7815ACC:
12
Responsivity
(V/µJ/cm²)
10
8
6
4
2
0
200
300
400
500
600
700
800
900
1000
1100
Wavelength (nm)
Packaging Drawing
49.0±0.1
9.5±0.1
1st pixel
5.1 ± 0.1
Ztop
Zbot
4.5 ± 0.1
Dimensions in mm
Ordering Code
8
mechanical
optical
Ztop
1.9 2±0.32
1 .61±0.25
Zbot
2 .72±0.25
3.03±0.28
TH7815ACC
TH7815ACC
1995A–IMAGE–04/02
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© Atmel Corporation 2002.
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Printed on recycled paper.
1995A–IMAGE–04/02
0M