STMICROELECTRONICS STP3NA50FI

STP3NA50
STP3NA50FI
N - CHANNEL ENHANCEMENT MODE
FAST POWER MOS TRANSISTOR
TYPE
STP3NA50
STP3NA50FI
■
■
■
■
■
■
■
V DSS
R DS( on)
ID
500 V
500 V
< 3Ω
< 3Ω
3.3 A
2.3 A
TYPICAL RDS(on) = 2.4 Ω
± 30V GATE TO SOURCE VOLTAGE RATING
100% AVALANCHE TESTED
REPETITIVE AVALANCHE DATA AT 100oC
LOW INTRINSIC CAPACITANCES
GATE GHARGE MINIMIZED
REDUCED THRESHOLD VOLTAGE SPREAD
DESCRIPTION
This series of POWER MOSFETS represents the
most advanced high voltage technology. The
optimized cell layout coupled with a new
proprietary edge termination concur to give the
device low RDS(on) and gate charge, unequalled
ruggedness and superior switching performance.
3
1
3
2
2
1
TO-220
ISOWATT220
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
HIGH CURRENT, HIGH SPEED SWITCHING
■
SWITCH MODE POWER SUPPLIES (SMPS)
■
DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
■
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
STP3NA50
VD S
V DG R
V GS
Unit
STP3NA50FI
Drain-source Voltage (V GS = 0)
500
V
Drain-gate Voltage (RG S = 20 kΩ)
500
V
± 30
V
Gate-source Voltage
o
ID
Drain Current (continuous) at T c = 25 C
3.3
2.3
A
ID
Drain Current (continuous) at T c = 100 oC
2.1
1.5
A
Drain Current (pulsed)
13.2
13.2
A
80
40
W
0.64
0.32
W/o C

2000
ID M(•)
P tot
o
Total Dissipation at Tc = 25 C
Derating Factor
V ISO
T stg
Tj
Insulation Withstand Voltage (DC)
Storage Temperature
Max. Operating Junction Temperature
V
-65 to 150
o
C
150
o
C
(•) Pulse width limited by safe operating area
November 1996
1/10
STP3NA50/FI
THERMAL DATA
R thj-cas e
Rthj- amb
Rt hc- sin k
Tl
Thermal Resistance Junction-case
Max
TO-220
ISOWATT220
1.56
3.12
Thermal Resistance Junction-ambient
Max
Thermal Resistance Case-sink
Typ
Maximum Lead Temperature For Soldering Purpose
o
C/W
62.5
0.5
300
o
C/W
C/W
o
C
Max Value
Unit
o
AVALANCHE CHARACTERISTICS
Symbol
Parameter
IA R
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T j max, δ < 1%)
3.3
A
E AS
Single Pulse Avalanche Energy
(starting T j = 25 o C, ID = I AR, VD D = 50 V)
55
mJ
E AR
Repetitive Avalanche Energy
(pulse width limited by T j max, δ < 1%)
2.2
mJ
IA R
Avalanche Current, Repetitive or Not-Repetitive
(T c = 100 o C, pulse width limited by T j max, δ < 1%)
2.1
A
o
ELECTRICAL CHARACTERISTICS (Tcase = 25 C unless otherwise specified)
OFF
Symbol
V( BR)DSS
Parameter
Drain-source
Breakdown Voltage
Test Conditions
I D = 250 µA
VG S = 0
I DS S
Zero Gate Voltage
V DS = Max Rating
Drain Current (V GS = 0) V DS = Max Rating x 0.8
IG SS
Gate-body Leakage
Current (V D S = 0)
Min.
Typ.
Max.
500
Unit
V
T c = 125 oC
V GS = ± 30 V
25
250
µA
µA
± 100
nA
ON (∗)
Symbol
Parameter
Test Conditions
V G S(th)
Gate Threshold Voltage V DS = V GS
ID = 250 µA
R DS( on)
Static Drain-source On
Resistance
V GS = 10V
ID = 1.5 A
I D( on)
On State Drain Current
V DS > ID( on) x RD S(on) max
V GS = 10 V
Min.
Typ.
Max.
Unit
2.25
3
3.75
V
2.4
3
Ω
3.3
A
DYNAMIC
Symbol
gfs (∗)
C iss
C oss
C rss
2/10
Parameter
Test Conditions
Forward
Transconductance
V DS > ID( on) x RD S(on) max
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V DS = 25 V
f = 1 MHz
ID = 1.5 A
VG S = 0
Min.
Typ.
1.2
2.2
370
62
20
Max.
Unit
S
485
81
27
pF
pF
pF
STP3NA50/FI
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol
t d(on)
tr
(di/dt) on
Qg
Q gs
Q gd
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
20
30
ns
ns
Turn-on Time
Rise Time
V DD = 250 V I D = 1.5 A
VGS = 10 V
R G = 18 Ω
(see test circuit, figure 3)
14
23
Turn-on Current Slope
V DD = 400 V I D = 3 A
VGS = 10 V
R G = 18 Ω
(see test circuit, figure 5)
340
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V DD = 400 V
ID = 3 A
V GS = 10 V
A/µs
21
6
9
28
nC
nC
nC
Typ.
Max.
Unit
13
11
26
18
16
35
ns
ns
ns
Typ.
Max.
Unit
3.3
13.2
A
A
1.6
V
SWITCHING OFF
Symbol
t r(Vof f)
tf
tc
Parameter
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Conditions
Min.
V DD = 400 V I D = 3 A
R G = 18 Ω VGS = 10 V
(see test circuit, figure 5)
SOURCE DRAIN DIODE
Symbol
Parameter
Test Conditions
IS D
I SDM(•)
Source-drain Current
Source-drain Current
(pulsed)
V S D (∗)
Forward On Voltage
I SD = 3.3 A
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
I SD = 3 A di/dt = 100 A/µs
V DD = 100 V
T j = 150 o C
(see test circuit, figure 5)
t rr
Q rr
I RRM
Min.
V GS = 0
350
ns
4.2
µC
24
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Areas for TO-220
Safe Operating Areas for ISOWATT220
3/10
STP3NA50/FI
Thermal Impedeance For TO-220
Thermal Impedance For ISOWATT220
Derating Curve For TO-220
Derating Curve For ISOWATT220
Output Characteristics
Transfer Characteristics
4/10
STP3NA50/FI
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
Normalized Gate Threshold Voltage vs
Temperature
Normalized On Resistance vs Temperature
5/10
STP3NA50/FI
Turn-on Current Slope
Turn-off Drain-source Voltage Slope
Cross-over Time
Switching Safe Operating Area
Accidental Overload Area
Source-drain Diode Forward Characteristics
6/10
STP3NA50/FI
Fig. 1: Unclamped Inductive Load Test Circuits
Fig. 2: Unclamped Inductive Waveforms
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 4: Gate Charge Test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Reverse Recovery Time
7/10
STP3NA50/FI
TO-220 MECHANICAL DATA
mm
DIM.
MIN.
inch
MAX.
MIN.
A
4.40
TYP.
4.60
0.173
0.181
C
1.23
1.32
0.048
0.051
D
2.40
2.72
0.094
0.107
D1
TYP.
1.27
MAX.
0.050
E
0.49
0.70
0.019
0.027
F
0.61
0.88
0.024
0.034
F1
1.14
1.70
0.044
0.067
F2
1.14
1.70
0.044
0.067
G
4.95
5.15
0.194
0.203
G1
2.4
2.7
0.094
0.106
H2
10.0
10.40
0.393
0.409
L2
16.4
0.645
L4
13.0
14.0
0.511
0.551
L5
2.65
2.95
0.104
0.116
L6
15.25
15.75
0.600
0.620
L7
6.2
6.6
0.244
0.260
3.5
3.93
0.137
0.154
3.75
3.85
0.147
0.151
D1
C
D
A
E
L9
DIA.
H2
G
G1
F1
L2
F2
F
Dia.
L5
L9
L7
L6
L4
P011C
8/10
STP3NA50/FI
ISOWATT220 MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
4.4
4.6
0.173
0.181
B
2.5
2.7
0.098
0.106
D
2.5
2.75
0.098
0.108
E
0.4
0.7
0.015
0.027
F
0.75
1
0.030
0.039
F1
1.15
1.7
0.045
0.067
F2
1.15
1.7
0.045
0.067
G
4.95
5.2
0.195
0.204
G1
2.4
2.7
0.094
0.106
H
10
10.4
0.393
0.409
L2
16
0.630
28.6
30.6
1.126
1.204
L4
9.8
10.6
0.385
0.417
L6
15.9
16.4
0.626
0.645
L7
9
9.3
0.354
0.366
Ø
3
3.2
0.118
0.126
B
D
A
E
L3
L3
L6
F
F1
L7
F2
H
G
G1
Ø
1 2 3
L2
L4
P011G
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STP3NA50/FI
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express
written approval of SGS-THOMSON Microelectonics.
 1996 SGS-THOMSON Microelectronics - Printed in Italy - All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
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