072401:GENERAL PURPOSE LOW POWER 4PLL W/PROGRAMMABLE SPREAD SPECTRUM CLOCK GENERATOR, L8C-3R TECHNOLOGY, FAB 4

Document No. 001-72502 Rev. *C
ECN #: 4518042
Cypress Semiconductor
Product Qualification Report
QTP# 072401 VERSION*C
September, 2014
General Purpose Low Power 4PLL w/Programmable Spread Spectrum
Clock Generator, L8C-3R Technology, Fab 4
CY2544Cxxx / CY2544Ixxx
CY2545Cxxx /CY2545Ixxx
CY2548Cxxx / CY2548Ixxx
M60xxLFXI / M80xxLFXI
CY2546Cxxx/CY2546Ixxx
CY2547Cxxx/CY2547Ixxx
CY25404ZXC-xxx/
CY25404ZXI-xxx
9xxLFXI / M7xxLFXI
M6xxLFXI /M3xxLFXI
M2xxLFXI
CY25403SXCxxx/CY25423SXCxxx
CY25483SXCxxx/CY25403SXIxxx
CY25423SXIxxx, CY25483SXIxxx
CY25402SXCxxx/CY25422SXCxxx
CY25412SXCxxx/CY25432SXCxxx
CY25482SXCxxx/CY25402SXIxxx
CY25422SXIxxx/CY25412SXIxxx
CY25432SXIxxx/CY25482SXIxxx
3.3/3.0/2.5V
Programmable Clock Generator4x4mm 24Lead QFN Package
1.8V
Programmable Clock Generator4x4mm 24Lead QFN Package
3.3/3.0/2.5V
Programmable Clock Generator20Lead TSSOP Package
3.3/3.0/2.5/1.8V
Programmable Clock Generator –
3x3mm 16Lead QFN Package
Three PLL Programmable Clock Generator with
Spread Spectrum – 8L SOIC
Two PLL Programmable Clock Generator with Spread
Spectrum – 8L SOIC
Four-PLL Programmable Clock Generator
for Portable Applications
1.8V Input, 2.5/3.0/3.3V Quad PLL Programmable
Spread Spectrum Clock Generator with 2 Wire Serial
Interface and Frequency Select
M4000
CY2542
FOR ANY QUESTIONS ON THIS REPORT, PLEASE CONTACT
[email protected] or via a CYLINK CRM CASE
Prepared By:
Josephine Pineda
Reliability Engineer
Reviewed By:
Zhaomin Ji
Reliability Manager
Approved By:
Richard Oshiro
Reliability Director
Company Confidential
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Page 1 of 16
Document No. 001-72502 Rev. *C
ECN #: 4518042
PRODUCT QUALIFICATION HISTORY
QTP
Number
Description of Qualification Purpose
Date
Comp
053301
Qualify L8C-3R Technology Derivative of the C8 Technology at Fab4 using CY5077 Device
Sep 06
053408
Qualify 7C84400A Device in L8C-3R Technology, Fab4
Jul 06
072401
Qualify 7C84501B Device in L8C-3R Technology, Fab4
Sep 07
073705
Qualify 7C84502BC, Metal option of 7C84501B
Nov 07
120102
Qualification of Bond Device Options M4000 / CY2542 on 24 QFN Package, L8C-3R
Technology in CMI Fab 4
Feb 12
Company Confidential
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Page 2 of 16
Document No. 001-72502 Rev. *C
ECN #: 4518042
PRODUCT DESCRIPTION (for qualification)
Qualification Purpose: Qualify CY2546C Device on L8C-3R Technology at Fab4
Marketing Part #:
CY2544/45C/Ixxx, CY2546/47C/Ixxx, CY25404ZXI-xxx, CY25403SXC/I-xxx ,
CY25402SXC/I-xxx , M600xLFXI, M800xLFXI, M60x, M30x, M20x, M40x, CY2542
Device Description:
1.8V, 2.5V, 3.3V PLL Programmable Clock Generator (Commercial & Industrial)
Cypress Division:
Cypress Semiconductor Corporation – Memory Product Division
TECHNOLOGY/FAB PROCESS DESCRIPTION
Number of Metal
Layers:
4
Metal Composition: Metal 1: 100A Ti/3,200A Al 0.5% Cu /300A TiW
Metal 2: 150A Ti/4,230A Al 0.5% Cu/300A TiW
Metal 3: 150A Ti/4,230A Al 0.5% Cu/300A TiW
Metal 4: 150A Ti/8,000A Al 0.5% Cu/300A TiW
Passivation Type and Materials:
1,000A TeOs / 7,000A Si3N4
Generic Process Technology/Design Rule (µ-drawn): CMOS, 0.13µm
Gate Oxide Material/Thickness (MOS):
SiO2 DGOX 32/55A
Name/Location of Die Fab (prime) Facility:
CMI / Bloomington MN
Die Fab Line ID/Wafer Process ID:
Fab4, L8C-3R
PACKAGE AVAILABILITY
PACKAGE
ASSEMBLY SITE FACILITY
24-Pin QFN
Amkor- SEOUL (L)
16-Pin QFN
Amkor- PHILIPPINES (M)
20-Lead TSSOP
OSE- TAIWAN (T)
8-Lead SOIC
CML - PHILIPPINES (RA)
Company Confidential
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Page 3 of 16
Document No. 001-72502 Rev. *C
ECN #: 4518042
MAJOR PACKAGE INFORMATION USED IN THIS QUALIFICATION
Package Designation:
Package Outline, Type, or Name:
Mold Compound Name/Manufacturer:
Mold Compound Flammability Rating:
LY24
24-Pin Quad Flat No-Lead (QFN)
Sumitomo EME G700
UL-94 V-0
Oxygen Rating Index:
N/A
Lead Frame Material:
Copper
Lead Finish, Composition / Thickness:
Pure Sn
Die Backside Preparation Method/Metallization:
Backgrind
Die Separation Method:
Wafer Saw
Die Attach Supplier:
Ablestik
Die Attach Material:
8290
Die Attach Method:
Epoxy
Bond Diagram Designation:
001-15874
Wire Bond Method:
Thermosonic
Wire Material/Size:
Au, 1.0mil
Thermal Resistance Theta JA °C/W:
23°C/W
Package Cross Section Yes/No:
N/A
Assembly Process Flow:
49-10994
Name/Location of Assembly (prime) facility:
SEOUL-L
MSL Level
3
Reflow Profile
260C
ELECTRICAL TEST / FINISH DESCRIPTION
Test Location:
CML-R
Company Confidential
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Page 4 of 16
Document No. 001-72502 Rev. *C
ECN #: 4518042
RELIABILITY TESTS PERFORMED PER SPECIFICATION REQUIREMENT
Stress/Test
High Temperature Operating Life
Test Condition
(Temp/Bias)
Dynamic Operating Condition, Vcc Max=2.07V, 150°C
Result
P/F
P
Dynamic Operating Condition, Vcc Max=2.35V, 150°C
Early Failure Rate
Dynamic Operating Condition, Vcc Max=3.8V, 150°C
JESD22-A108
High Temperature Operating Life
Latent Failure Rate
Dynamic Operating Condition, Vcc Max=2.07V, 150°C
Dynamic Operating Condition, Vcc Max=2.35V, 150°C
P
Dynamic Operating Condition, Vcc Max=3.8V, 150°C
JESD22-A108
Long Life Verification
Dynamic Operating Condition, Vcc Max=2.35V, 150°C
P
JESD22-A108
High Temperature Steady State
Life
150°C, 2.35V, Vcc Max
High Accelerated Saturation Test
(HAST)
JEDEC STD 22-A110: 130°C, 2.35V, 85%RH
Precondition: JESD22 Moisture Sensitivity Level 3
P
JESD22-A108
P
192 Hrs, 30C/60%RH+ Reflow, 260°C +0, -5°C
Temperature Cycle
MIL-STD-883, Method 1010, Condition C, -65°C to 150°C
Precondition: JESD22 Moisture Sensitivity Level 3
Pressure Cooker
JESD22-A102: 121°C, 100%RH, 15 Psig
Precondition: JESD22 Moisture Sensitivity Level 3
P
192 Hrs, 30C/60%RH+ Reflow, 260°C +0, -5°C
P
192 Hrs, 30C/60%RH+ Reflow, 260°C +0, -5°C
Electrostatic Discharge
Human Body Model (ESD-HBM)
2100V/2200V
JEDEC EIA/JESD22-A114
P
Electrostatic Discharge
Charge Device Model (ESD-CDM)
500V
JESD22-C101
P
Acoustic Microscopy
J-STD-020
P
Precondition: JESD22 Moisture Sensitivity Level 3
192 Hrs, 30C/60%RH+ Reflow, 260°C +0, -5°C
Dynamic Latch-up
6.25V
P
JESD78
High Temperature Storage
JESD22-A103: 150°C, no bias
P
Latch up Sensitivity
125°C, ± 50mA
P
JESD78
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Page 5 of 16
Document No. 001-72502 Rev. *C
ECN #: 4518042
RELIABILITY FAILURE RATE SUMMARY
Stress/Test
3
Device Tested/
Device Hours
#
Fails
Activation
Energy
Thermal
A.F
Failure
Rate
High Temperature Operating
1
Life Early Failure Rate
3,261 Devices
0
N/A
N/A
0 PPM
High Temperature Operating
1,2
Life Long Term Failure Rate
489,100 DHRs
0
0 .7
170
11 FIT
1
2
3
Assuming an ambient temperature of 55°C and a junction temperature rise of 15°C.
Chi-squared 60% estimations used to calculate the failure rate.
Thermal Acceleration Factor is calculated from the Arrhenius equation
E  1 1  
AF = exp  A  -  
 k  T 2 T1  
where:
EA =The Activation Energy of the defect mechanism.
-5
k = Boltzmann's constant = 8.62x10 eV/Kelvin.
T1 is the junction temperature of the device under stress and T2 is the junction temperature of the device at use
conditions.
Company Confidential
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Page 6 of 16
Document No. 001-72502 Rev. *C
ECN #: 4518042
Reliability Test Data
QTP #: 053301
Device
Fab Lot #
Assy Lot #
Assy Loc
Duration
Samp
Rej
CML-RA
COMP
16
0
Failure Mechanism
STRESS: ACOUSTIC-MSL3
CY5077 (7C850003A)
4538565
610555083
CY5077 (7C850003A)
4550443
61033232/3/915 PHIL-M
COMP
15
0
CY5077 (7C850003A)
4615715
610637084
COMP
15
0
COMP
2
0
COMP
2
0
COMP
9
0
PHIL-M
STRESS: DYNAMIC LATCH-UP, 5.0V
CY5077 (7C850003A)
STRESS: DYNAMIC LATCH-UP, 6.25V
CY5077 (7C850003A)
STRESS: ESD-CHARGE DEVICE MODEL (500V)
CY5077 (7C850003A)
4538565
610555083
CY5077 (7C850003A)
4550443
61033232/3/915 PHIL-M
COMP
9
0
CY5077 (7C850003A)
4615715
610637084
COMP
9
0
CML-RA
PHIL-M
STRESS: ESD-HUMAN BODY CIRCUIT PER JESD22, METHOD A114, 2200V
CY5077 (7C850003A)
4538565
610555083
CML-RA
COMP
9
0
CY5077 (7C850003A)
4550443
61033232/3/915 PHIL-M
COMP
9
0
CY5077 (7C850003A)
4615715
610637084
COMP
3
0
PHIL-M
STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2200V
CY5077 (7C850003A)
4538565
610555083
CML-RA
COMP
3
0
CY5077 (7C850003A)
4550443
61033232/3/915 PHIL-M
COMP
3
0
CY5077 (7C850003A)
4615715
610637084
3
0
PHIL-M
COMP
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE (150C, 2.35V, Vcc Max)
CY5077 (7C850003A)
4538565
610555083
CML-RA
48
519
0
CY5077 (7C850003A)
4550443
61033232/3/915 PHIL-M
48
1061
0
CY5077 (7C850003A)
4615715
610637084
PHIL-M
48
500
0
STRESS: HIGH TEMP STEADY STATE LIFE TEST (150C, 2.35V)
CY5077 (7C850003A)
4538565
610555083
CML-RA
80
79
0
CY5077 (7C850003A)
4538565
610555083
CML-RA
168
79
0
Company Confidential
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Page 7 of 16
Document No. 001-72502 Rev. *C
ECN #: 4518042
Reliability Test Data
QTP #: 053301
Device
Fab Lot #
Assy Lot #
Assy Loc
Duration
Samp
Rej
Failure Mechanism
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE (150C, 2.35V, Vcc Max)
CY5077 (7C850003A)
4538565
610555083
CML-RA
80
120
0
CY5077 (7C850003A)
4538565
610555083
CML-RA
500
120
0
CY5077 (7C850003A)
4550443
61033232/3/915 PHIL-M
80
120
0
CY5077 (7C850003A)
4550443
61033232/3/915 PHIL-M
500
120
0
CY5077 (7C850003A)
4615715
610637084
PHIL-M
80
120
0
CY5077 (7C850003A)
4615715
610637084
PHIL-M
500
120
0
1000
119
0
STRESS: LONG LIFE VERIFICATION TEST (150C, 2.35V, Vcc Max)
CY5077 (7C850003A)
4538565
610555083
CML-RA
STRESS: HI-ACCEL SATURATION TEST (130C, 85%RH, 2.35V), PRE COND 192 HR, 30C/60%RH, MSL3
CY5077 (7C850003A)
4538565
610555083
CML-RA
128
48
0
CY5077 (7C850003A)
4550443
61033232/3/915 PHIL-M
128
48
0
CY5077 (7C850003A)
4550443
61033232/3/915 PHIL-M
256
47
0
STRESS: HIGH TEMPERATURE STORAGE, 150C, no bias
CY5077 (7C850003A)
4550443
61033232/3/915 PHIL-M
500
50
0
CY5077 (7C850003A)
4550443
61033232/3/915 PHIL-M
1000
50
0
STRESS: STATIC LATCH-UP TESTING (125C, 3.0V, ±200mA), 1.8V Option
CY5077 (7C850003A)
4538565
610555083
CML-RA
COMP
3
0
CY5077 (7C850003A)
4550443
61033232/3/915 PHIL-M
COMP
3
0
CY5077 (7C850003A)
4615715
610637084
COMP
3
0
COMP
3
0
PHIL-M
STRESS: STATIC LATCH-UP TESTING (125C, 6.5V, ±200mA), 3.3V Option
CY5077 (7C850003A)
4538565
610555083
CML-RA
STRESS: STATIC LATCH-UP TESTING (125C, 5.4V, ±200mA), 3.3V Option
CY5077 (7C850003A)
4550443
61033232/3/915 PHIL-M
COMP
3
0
CY5077 (7C850003A)
4615715
610637084
COMP
3
0
PHIL-M
Company Confidential
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Page 8 of 16
Document No. 001-72502 Rev. *C
ECN #: 4518042
Reliability Test Data
QTP #: 053301
Device
Fab Lot #
Assy Lot #
Assy Loc
Duration
Samp
Rej
Failure Mechanism
STRESS: TC COND. C -65C TO 150C, PRE COND 192 HRS, 30C/60%RH, MSL3
CY5077 (7C850003A)
4538565
610555083
CML-RA
300
50
0
CY5077 (7C850003A)
4538565
610555083
CML-RA
500
50
0
CY5077 (7C850003A)
4538565
610555083
CML-RA
1000
50
0
CY5077 (7C850003A)
4550443
61033232/3/915 PHIL-M
300
50
0
CY5077 (7C850003A)
4550443
61033232/3/915 PHIL-M
500
50
0
CY5077 (7C850003A)
4550443
61033232/3/915 PHIL-M
1000
50
0
CY5077 (7C850003A)
4615715
610637084
PHIL-M
300
49
0
CY5077 (7C850003A)
4615715
610637084
PHIL-M
500
49
0
CY5077 (7C850003A)
4615715
610637084
PHIL-M
1000
48
0
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Page 9 of 16
Document No. 001-72502 Rev. *C
ECN #: 4518042
Reliability Test Data
QTP #: 053408
Device
Fab Lot #
Assy Lot #
Assy Loc
Duration
Samp
Rej
Failure Mechanism
STRESS: ACOUSTIC-MSL3
CY27044 (7C870442A)
4547637
610615630
KOREA-L
COMP
15
0
CY27044 (7C870442A)
4549015
610621941
KOREA-L
COMP
15
0
CY27044 (7C870442A)
4614301
610628571
KOREA-L
COMP
15
0
STRESS: ESD-CHARGE DEVICE MODEL (500V)
CY27044 (7C870442A)
4547637
610615630
KOREA-L
COMP
9
0
CY27044 (7C870442A)
4614301
610628571
KOREA-L
COM P
9
0
STRESS: ESD-HUMAN BODY CIRCUIT PER JESD22, METHOD A114, 2200V
CY27044 (7C870442A)
4547637
610615630
KOREA-L
COMP
9
0
CY27044 (7C870442A)
4614301
610628571
KOREA-L
COMP
9
0
STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2,200V
CY27044 (7C870442A)
4547637
610615630
KOREA-L
COMP
3
0
CY27044 (7C870442A)
4614301
610628571
KOREA-L
COMP
3
0
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE (150C, 2.35V, Vcc Max)
CY27044 (7C870442A)
4547637
610615630
KOREA-L
48
339
0
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE (150C, 2.07V, Vcc Max)
CY27044 (7C870442A)
4549015
610621941
KOREA-L
48
355
0
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE (150C, 2.35V, Vcc Max)
CY27044 (7C870442A)
4547637
610615630
KOREA-L
80
120
0
CY27044 (7C870442A)
4547637
610615630
KOREA-L
500
120
0
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE (150C, 2.07V, Vcc Max)
CY27044 (7C870442A)
4549015
610621941
KOREA-L
80
120
0
CY27044 (7C870442A)
4549015
610621941
KOREA-L
500
120
0
STRESS: HI-ACCEL SATURATION TEST (130C, 85%RH, 2.35V), PRE COND 192 HR, 30C/60%RH, MSL3
CY27044 (7C870442A)
4547637
610615630
KOREA-L
128
48
0
STRESS: STATIC LATCH-UP TESTING (125C, 3.0V, ±200mA)
CY27044 (7C870442A)
4547637
610615630
KOREA-L
COMP
3
0
CY27044 (7C870442A)
4614301
610628571
KOREA-L
COMP
3
0
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Page 10 of 16
Document No. 001-72502 Rev. *C
ECN #: 4518042
Reliability Test Data
QTP #: 053408
Device
Fab Lot #
Assy Lot #
Assy Loc
Duration
Samp
Rej
Failure Mechanism
STRESS: TC COND. C -65C TO 150C, PRE COND 192 HRS, 30C/60%RH, MSL3
CY27044 (7C870442A)
4547637
610615630
KOREA-L
300
50
0
CY27044 (7C870442A)
4547637
610615630
KOREA-L
500
50
0
CY27044 (7C870442A)
4547637
610615630
KOREA-L
1000
50
0
CY27044 (7C870442A)
4549015
610621941
KOREA-L
300
50
0
CY27044 (7C870442A)
4549015
610621941
KOREA-L
500
50
0
CY27044 (7C870442A)
4549015
610621941
KOREA-L
1000
50
0
CY27044 (7C870442A)
4614301
610628571
KOREA-L
300
50
0
CY27044 (7C870442A)
4614301
610628571
KOREA-L
500
50
0
CY27044 (7C870442A)
4614301
610628571
KOREA-L
1000
50
0
Company Confidential
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Page 11 of 16
Document No. 001-72502 Rev. *C
ECN #: 4518042
Reliability Test Data
QTP #: 072401
Device
Fab Lot #
Assy Lot #
Assy Loc
4716297
610737565
KOREA-L
Duration
Samp
Rej
COMP
15
0
Failure Mechanism
STRESS: ACOUSTIC-MSL3
CY2546C (7C8B5401B)
STRESS: ESD-CHARGE DEVICE MODEL (500V)
CY2546C (7C8B5401B)
4716297
610737565
KOREA-L
COMP
9
0
CY2544C (7C8A5401B)
4716297
610737566
KOREA-L
COMP
9
0
M202 (7C825416B)
4716297
610733912
PHIL-M
COMP
9
0
STRESS: ESD-HUMAN BODY CIRCUIT PER JESD22, METHOD A114, 2200V
CY2546C (7C8B5401B)
4716297
610737565
KOREA-L
COMP
8
0
CY2544C (7C8A5401B)
4716297
610737566
KOREA-L
COMP
8
0
M202 (7C825416B)
4716297
610733912
PHIL-M
COMP
8
0
CY25404 (7C8A5423B)
4716297
610731870
TAIWAN-T
COMP
8
0
COMP
8
0
STRESS: ESD-HUMAN BODY CIRCUIT PER JESD22, METHOD A114, 2100V
CY25404 (7C8A5423B)
4716297
610731870
TAIWAN-T
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE (150C, 2.07V, Vcc Max)
CY2546C (7C8B5401B)
4649571
CY2546C (7C8B5401B)
4716297
610737565
KOREA-L
48
1080
0
KOREA-L
48
1078
0
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE (150C, 3.8V, Vcc Max)
CY2544C (7C8A5401B)
4716297
610737566
KOREA-L
48
1103
0
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE (150C, 2.07V, Vcc Max)
CY2546C (7C8B5401B)
4649571
KOREA-L
80
120
0
CY2546C (7C8B5401B)
4649571
KOREA-L
500
120
0
CY2546C (7C8B5401B)
4716297
610737565
KOREA-L
80
120
0
CY2546C (7C8B5401B)
4716297
610737565
KOREA-L
500
120
0
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE--LATENT FAILURE RATE (150C, 3.8V, Vcc Max)
CY2544C (7C8A5401B)
4716297
610737566
KOREA-L
80
120
0
KOREA-L
COMP
6
0
KOREA-L
COMP
6
0
STRESS: STATIC LATCH-UP TESTING (125C, 3.0V, ±200mA)
CY2546C (7C8B5401B)
4716297
610737565
STRESS: STATIC LATCH-UP TESTING (125C, 5.4V, ±200mA)
CY2544C (7C8A5401B)
4716297
610737566
Company Confidential
A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision.
Page 12 of 16
Document No. 001-72502 Rev. *C
ECN #: 4518042
Reliability Test Data
QTP #: 072401
Device
Fab Lot #
Assy Lot #
Assy Loc
Duration
Samp
Rej
6
0
Failure Mechanism
STRESS: STATIC LATCH-UP TESTING (125C, 5.4V/3.0V, ±200mA)
M202 (7C825416B)
4716297
610733912
PHIL-M
COMP
STRESS: PRESSURE COOKER TEST (121C, 100%RH), 15 psig, PRE COND 192HR, 30C/60%RH, MSL3
CY2546C (7C8B5401B)
4716297
610737565
KOREA-L
168
80
0
STRESS: TC COND. C -65C TO 150C, PRE COND 192 HRS, 30C/60%RH, MSL3
CY2546C (7C8B5401B)
4649571
KOREA-L
500
84
0
CY2546C (7C8B5401B)
4649571
KOREA-L
1000
84
0
CY2546C (7C8B5401B)
4716297
KOREA-L
500
80
0
610737565
Company Confidential
A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision.
Page 13 of 16
Document No. 001-72502 Rev. *C
ECN #: 4518042
Reliability Test Data
QTP #: 073705
Device
Fab Lot #
Assy Lot #
Assy Loc
Duration
Samp
Rej
Failure Mechanism
STRESS: ESD-CHARGE DEVICE MODEL (500V)
CY25403S (7C8A5402B)
4723974
610757075
CML-RA
COMP
9
0
CY25482S (7C8A5404B)
4723974
610757087
CML-RA
COMP
9
0
CY25422S (7C8B5402B)
4723974
610757088
CML-RA
COMP
9
0
STRESS: ESD-HUMAN BODY CIRCUIT PER JESD22, METHOD A114, 2200V
CY25403S (7C8A5402B)
4723974
610757075
CML-RA
COMP
8
0
CY25482S (7C8A5404B)
4723974
610757087
CML-RA
COMP
8
0
CY25422S (7C8B5402B)
4723974
610757088
CML-RA
COMP
8
0
STRESS: STATIC LATCH-UP TESTING (125C, 5.4V, ±200mA)
CY25403S (7C8A5402B)
4723974
610757075
CML-RA
COMP
6
0
CY25482S (7C8A5404B)
4723974
610757087
CML-RA
COMP
6
0
CML-RA
COMP
6
0
COMP
COMPARABLE
STRESS: STATIC LATCH-UP TESTING (125C, 2.7V, ±200mA)
CY25422S (7C8B5402B)
4723974
610757088
STRESS: SORT YIELD
CY25403S (7C8A5402B)
4723974
Company Confidential
A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision.
Page 14 of 16
Document No. 001-72502 Rev. *C
ECN #: 4518042
Reliability Test Data
QTP #: 120102
Device
Fab Lot #
Assy Lot #
Assy Loc
Duration
Samp
Rej
Failure Mechanism
STRESS: ESD-HUMAN BODY CIRCUIT PER JESD22, METHOD A114 , 2200V
M4000LFXI (7C8C5401B)
4803133
610913282
L-KOREA
COMP
8
0
CY2542FCI (7C8C5405B)
4843704
610938584
L-KOREA
COMP
8
0
STRESS: STATIC LATCH-UP TESTING (125C, 1.9V, ± 50mA)
M4000LFXI (7C8C5401B)
4803133
610913282
L-KOREA
COMP
8
0
CY2542FCI (7C8C5405B)
4843704
610938584
L-KOREA
COMP
8
0
Company Confidential
A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision.
Page 15 of 16
Document No. 001-72502 Rev. *C
ECN #: 4518042
Document History Page
Document Title:
072401: GENERAL PURPOSE LOW POWER 4PLL W/PROGRAMMABLE SPREAD
SPECTRUM CLOCK GENERATOR, L8C-3R TECHNOLOGY, FAB 4
001-72502
Document Number:
Rev. ECN
No.
**
3360918
*A
3530371
Orig. of
Change
HGA
NSR
*B
4131677 JYF
*C
4518042 JYF
Description of Change
Initial spec release
Added QTP 120102 in the history page and QTP data.
Added CY2542 and M4000 devices in the title page.
Remove QTP version 2.1 in the title page
Sunset Spec Review:
Complete re-write of Reliability Tests Performed table to align with
current spec template.
Sunset review:
- Updated QTP title page for template alignment;
- Updated device division from DCD to MPD.
Distribution: WEB
Posting:
None
Company Confidential
A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision.
Page 16 of 16
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