Cypress Semiconductor Product Qualification Report QTP# 021506 VERSION 2.0 September, 2003 200MHz Programmable Zero Delay Buffer Family S4AD-5 Technology, Fab 2 CY2308A* 200-MHz, Eight-Output Zero Delay Buffer CY2309A* 200-MHz, Nine Output Zero Delay Buffer CY23FP12* 200-MHz, 12-Output Zero Delay Buffer CYPRESS TECHNICAL CONTACT FOR QUALIFICATION DATA: Ed Russell Reliability Director (408) 432–7069 Bill Stevenson Reliability Engineering (408) 456-1926 Cypress Semiconductor 200MHz Programmable Zero Delay Buffer Family, S4AD-5, Fab 2 Device: CY2308A* QTP# 021506, V, 2.0 Page 2 of 9 September, 2003 PRODUCT QUALIFICATION HISTORY Qual Report Description of Qualification Purpose Date Comp 010702 New Technology S4AD-5 / New Product, Programmable Clock Generator, CY2414ZC, and its product family. April 01 021506 New product CY2308A*, CY2309A*, CY23FP12* Programmable Zero Delay Buffer Sept 02 Cypress Semiconductor 200MHz Programmable Zero Delay Buffer Family, S4AD-5, Fab 2 Device: CY2308A* QTP# 021506, V, 2.0 Page 3 of 9 September, 2003 PRODUCT DESCRIPTION (for qualification) Qualification Purpose: Qualify new products CY2308A*, CY23FP12* using Technology S4AD-5, Fab 2 Marketing Part #: CY2308A*, CY2309A*, CY23FP12* Device Description: 3.3V, Commercial, available in 16-lead TSSOP and 28-lead SSOP package respectively Cypress Division: Cypress Semiconductor Corporation – Timing Technology Division (TTD) WA Overall Die (or Mask) REV Level (pre-requisite for qualification): Rev. A What ID markings on Die: 7C80500A TECHNOLOGY/FAB PROCESS DESCRIPTION S4AD-5 Number of Metal Layers: 2 Metal Composition: Metal 1: 500Å Ti/6,000Å Al 0.5% Cu /1,200Å TiW Metal 2: 500Å Ti/8,000Å Al 0.5% Cu/300Å TiW Passivation Type and Materials: 3,000Å TEOS / 6,000Å Si3N4 Free Phosphorus contents in top glass layer(%): 0% Number of Transistors in Device: 93,000 Number of Gates in Device 23,000 Generic Process Technology/Design Rule (µ-drawn): Single Poly, Double Metal, 0.35 µm Gate Oxide Material/Thickness (MOS): SiO2 / 110Å Name/Location of Die Fab (prime) Facility: Cypress Semiconductor - Round Rock, TX (CTI) Die Fab Line ID/Wafer Process ID: Fab2, S4AD-5 PACKAGE AVAILABILITY PACKAGE ASSEMBLY SITE FACILITY 28-lead SSOP OSE Taiwan (TAIWN-T) 16-lead TSSOP OSE Taiwan (TAIWN-T) ELECTRICAL TEST / FINISH DESCRIPTION Test Location: OSE Taiwan (TAIWN-T) Fault Coverage: 100% Note: Please contact a Cypress Representative for other packages availability . Cypress Semiconductor 200MHz Programmable Zero Delay Buffer Family, S4AD-5, Fab 2 Device: CY2308A* QTP# 021506, V, 2.0 Page 4 of 9 September, 2003 RELIABILITY TESTS PERFORMED PER SPECIFICATION REQUIREMENT Stress/Test High Temperature Operating Life Test Condition (Temp/Bias) Result P/F Dynamic Operating Condition, Vcc Max=3.8V, 150°C P Dynamic Operating Condition, Vcc Max=3.8V, 150°C P 130°C, 3.63V,85%RH Precondition: JESD22 Moisture Sensitivity MSL 1 P Early Failure Rate High Temperature Operating Life Latent Failure Rate High Accelerated Saturation Test (HAST) 168 Hrs, 85°C/85%RH+3IR-Reflow, 235°C+5, 0°C Temperature Cycle MIL-STD-883C, Method 1010, Condition C, -65°C to 150°C Precondition: JESD22 Moisture Sensitivity MSL 1 P 168 Hrs, 85°C/85%RH+3IR-Reflow, 235°C+5, 0°C Pressure Cooker 121°C, 100%RH Precondition: JESD22 Moisture Sensitivity MSL 1 P 168 Hrs, 85°C/85%RH+3IR-Reflow, 235°C+5, 0°C Data Retention 150°C ± 5°C no bias P High Temperature Steady State life 150°C, 3.63V, Vcc Max P Electrostatic Discharge Human Body Model (ESD-HBM) 2,200V 2,000V P MIL-STD-883, Method 3015.7 Electrostatic Discharge Charge Device Model (ESD-CDM) 500V Age Bond Strength 200°C, 4hrs P Cypress Spec. 25-00020 P MIL-STD-883, Method 883-2011 Low Temperature Operating Life -30°C, 4.3V, 8MHZ P Current Density Cypress Spec 22-00029 P Endurance Test MIL-STD-883, Method 883-1033 P SEM Analysis MIL-STD-883, Method 883-2018-2 P Acoustic Microscopy, MSL 1 Cypress Spec. 25-00104 P Latchup Sensitivity 125°C, 10V, ± 300mA P In accordance with JEDEC 17. Cypress Spec. 01-00081 Cypress Semiconductor 200MHz Programmable Zero Delay Buffer Family, S4AD-5, Fab 2 Device: CY2308A* QTP# 021506, V, 2.0 Page 5 of 9 September, 2003 RELIABILITY FAILURE RATE SUMMARY Stress/Test High Temperature Operating Life Early Failure Rate High Temperature Operating Life1,2 Long Term Failure Rate 1 2 3 Device Tested/ Device Hours # Fails Activation Energy Thermal3 A.F Failure Rate4 2,011 1 N/A N/A 497 PPM 3,014 1 250,500 DHRs 0 332 PPM 0 .7 170 22 FIT Assuming an ambient temperature of 55°C and a junction temperature rise of 15°C. Chi-squared 60% estimations used to calculate the failure rate. Thermal Acceleration Factor is calculated from the Arrhenius equation E 1 1 AF = exp A - k T 2 T1 where: EA =The Activation Energy of the defect mechanism. k = Boltzmann's constant = 8.62x10-5 eV/Kelvin. T1 is the junction temperature of the device under stress and T2 is the junction temperature of the device at use conditions. 4 FIT Rate based on QTP #021506 and QTP #010702. Cypress Semiconductor 200MHz Programmable Zero Delay Buffer Family, S4AD-5, Fab 2 Device: CY2308A* QTP# 021506, V, 2.0 Page 6 of 9 September, 2003 Reliability Test Data QTP #: Device Fab Lot # 010702 Assy Lot # Assy Loc Duration Samp Rej Failure Mechanism STRESS: ACOUSTIC-MSL1 CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T COMP 15 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T COMP 15 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T COMP 15 0 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 150C, 3.8V, Vcc Max CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 48 1005 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T 48 1004 1 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T 48 1005 0 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 150C, 3.8V, Vcc Max CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 80 120 0 CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 500 120 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T 80 120 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T 500 120 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T 80 120 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T 500 120 0 STRESS: HIGH TEMP STEADY STATE LIFE TEST, 150C, 3.63V CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 80 80 0 CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 168 80 0 STRESS: AGE BOND STRENGTH CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T COMP 15 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T COMP 15 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T COMP 15 0 610106170/1/2 TAIWN-T COMP 3 0 610106170/1/2 TAIWN-T COMP 45 0 500 48 0 STRESS: DYNAMIC LATCH-UP TESTING, 11.5V CY2414ZC (7C841400A) 2101502 STRESS: ENDURANCE TEST CY2414ZC (7C841400A) 2101502 STRESS: LOW TEMPERATURE OPERATING LIFE, -30C, 4.3V CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T NON VISUAL Cypress Semiconductor 200MHz Programmable Zero Delay Buffer Family, S4AD-5, Fab 2 Device: CY2308A* QTP# 021506, V, 2.0 Page 7 of 9 September, 2003 Reliability Test Data QTP #: Device Fab Lot # Assy Lot # 010702 Assy Loc Duration Samp Rej Failure Mechanism STRESS: ESD-CHARGE DEVICE MODEL, 500V CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T COMP 9 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T COMP 9 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T COMP 9 0 STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2,000V CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T COMP 9 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T COMP 9 0 CY2414ZC (7C841400A) 2103764 610106177 TAIWN-T COMP 10 0 STRESS: STATIC LATCH-UP TESTING, 125C, 10V, ±300mA CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T COMP 3 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T COMP 3 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T COMP 3 0 STRESS: HI-ACCEL SATURATION TEST, 130C, 85%RH, 3.63V, PRE COND 168 HR 85C/85%RH, MSL1 CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 128 50 0 CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 256 50 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T 128 48 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T 128 48 0 STRESS: DATA RETENTION, PLASTIC, 150C CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 168 80 0 CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 552 80 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T 168 80 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T 552 80 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T 168 80 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T 552 80 0 STRESS: PRESSURE COOKER TEST (121C, 100%RH), PRE COND 168 HR 85C/85%RH, MSL1 CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 168 50 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T 168 49 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T 168 51 0 Cypress Semiconductor 200MHz Programmable Zero Delay Buffer Family, S4AD-5, Fab 2 Device: CY2308A* QTP# 021506, V, 2.0 Page 8 of 9 September, 2003 Reliability Test Data QTP #: Device Fab Lot # Assy Lot # 010702 Assy Loc Duration Samp Rej STRESS: TC COND. C -65C TO 150C, PRECONDITION 168 HRS 85C/85%RH, MSL1 CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 300 50 0 CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 500 50 0 CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 1000 50 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T 300 50 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T 500 50 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T 1000 50 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T 300 50 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T 500 50 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T 1000 49 0 Failure Mechanism Cypress Semiconductor 200MHz Programmable Zero Delay Buffer Family, S4AD-5, Fab 2 Device: CY2308A* QTP# 021506, V, 2.0 Page 9 of 9 September, 2003 Reliability Test Data QTP #: Device Fab Lot # Assy Lot # 021506 Assy Loc Duration Samp Rej Failure Mechanism STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 150C, 3.8V, Vcc Max CY23FP12* (7C80504A) 2219256 610226430 TAIWN-T 48 2013 1 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 150C, 3.8V, Vcc Max CY23FP12* (7C80504A) 2219256 610226430 TAIWN-T 80 141 0 CY23FP12* (7C80504A) 2219256 610226430 TAIWN-T 500 141 0 TAIWN-T COMP 9 0 COMP 9 0 COMP 3 0 STRESS: ESD-CHARGE DEVICE MODEL, 500V CY2308A* (7C80502A) 2219256 610223702 STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2,200V CY23FP12* (7C80504A) 2219256 610229615 TAIWN-T STRESS: STATIC LATCH-UP TESTING, 125C, 10V, ±300mA CY2308A* (7C80502A) 2219256 610228189 TAIWN-T STRESS: PRESSURE COOKER TEST, 121C, 100%RH, PRE COND 168 HR 85C/85%RH, MSL1 CY23FP12* (7C80504A) 2219256 610226430 TAIWN-T 168 48 0 STRESS: TC COND. C -65C TO 150C, PRECONDITION 168 HRS 85C/85%RH, MSL1 CY23FP12* (7C80504A) 2219256 610226430 TAIWN-T 300 48 0 CY23FP12* (7C80504A) 2219256 610226430 TAIWN-T 500 48 0 CY23FP12* (7C80504A) 2219256 610226430 TAIWN-T 1000 48 0 UNKNOWN