Cypress Semiconductor Product Qualification Report QTP# 021405 VERSION 1.1 May, 2003 CY23020* Twenty Output Zero-Delay Buffer R42LDHA, Fab 4 CYPRESS TECHNICAL CONTACT FOR QUALIFICATION DATA: Ed Russell Reliability Director (408) 432-7069 William Stevenson Reliability Engineering (408) 456-1926 Cypress Semiconductor Twenty Output Zero-Delay Buffer, R42LDHA, Fab4 Device: CY23020* QTP# 021405, V, 1.1 Page 2 of 10 May , 2003 PRODUCT QUALIFICATION HISTORY Qual Report Description of Qualification Purpose Date Comp 98357 R42 with Hot Aluminum / 4 Meg, 128K x 36 Pipelined SRAM CY1350 Sep 98 021011 Twenty Output Zero-Delay Buffer CY23020* Apr 02 021405 Functionality Enhacement May 02 Cypress products are manufactured using qualified processes. The technology qualification for this product is referenced above and must be considered to get a complete and thorough evaluation of the reliability of the product. Cypress Semiconductor Twenty Output Zero-Delay Buffer, R42LDHA, Fab4 Device: CY23020* QTP# 021405, V, 1.1 Page 3 of 10 May , 2003 PRODUCT DESCRIPTION (for qualification) Qualification Purpose: Qualify CY23020* in R42LDHA, Fab 4 Marketing Part #: CY23020* Device Description: 3.3V, Commercial, available in 48-lead TSSOP/QFN package Cypress Division: Cypress Semiconductor Corporation – Timing Technology Division (TTD) WA Overall Die (or Mask) REV Level (pre-requisite for qualification): Rev. A What ID markings on Die: 7C80200A TECHNOLOGY/FAB PROCESS DESCRIPTION - R42LDHA Number of Metal Layers: 2 Metal Composition: Metal 1: 500Å TiW/6000Å Al/.5%Cu/1200Å TiW Metal 2: 500Å TiW/8000Å Al/.5%Cu/300Å TiW Passivation Type and Materials: 3,000 TEOS + 6,000Å Si3N4 Free Phosphorus contents in top glass layer(%): 0% Number of Transistors in Device: 20,000 Number of Gates in Device 5,000 Generic Process Technology/Design Rule (µ-drawn): CMOS, Double Metal /0.35 µm Gate Oxide Material/Thickness (MOS): SiO2 / 70Å Name/Location of Die Fab (prime) Facility: Cypress Semiconductor - Bloomington, MN Die Fab Line ID/Wafer Process ID: Fab4/R42LDHA PACKAGE AVAILABILITY PACKAGE ASSEMBLY SITE FACILITY 48-lead QFN Seoul Korea (SEOL-L) 48-lead TSSOP Cypress Philippines (CML-R) Cypress Semiconductor Twenty Output Zero-Delay Buffer, R42LDHA, Fab4 Device: CY23020* QTP# 021405, V, 1.1 Page 4 of 10 May , 2003 MAJOR PACKAGE INFORMATION USED IN THIS QUALIFICATION Package Designation: Package Outline, Type, or Name: Mold Compound Name/Manufacturer: Mold Compound Flammability Rating: Z4824 48-lead TSSOP Hitachi CEL 9200 V-O per UL94 Oxygen Rating Index: >28% Lead Frame Material: Copper Lead Finish, Composition / Thickness: Solder Plated 85%Pb / 15Sn Die Backside Preparation Method/Metallization: Backgrind Die Separation Method: Wafer Saw Die Attach Supplier: Dexter Die Attach Material: QMI 509 Die Attach Method: Epoxy Bond Diagram Designation: 10-04073 Wire Bond Method: Thermosonic Wire Material/Size: Au, 1.0mil Thermal Resistance Theta JA °C/W: 91°C/W Package Cross Section Yes/No: N/A Assembly Process Flow: 11-20007 Name/Location of Assembly (prime) facility: Cypress Philippines (CML) ELECTRICAL TEST / FINISH DESCRIPTION Test Location: Cypress Philippines (CML) Fault Coverage: 100% Cypress Semiconductor Twenty Output Zero-Delay Buffer, R42LDHA, Fab4 Device: CY23020* QTP# 021405, V, 1.1 Page 5 of 10 May , 2003 RELIABILITY TESTS PERFORMED PER SPECIFICATION REQUIREMENT Stress/Test High Temperature Operating Life Test Condition (Temp/Bias) Result P/F Dynamic Operating Condition, Vcc Max=3.8V, 150°C P Dynamic Operating Condition, Vcc Max=3.8V, 150°C P 130°C, 3.63V,85%RH Precondition: JESD22 Moisture Sensitivity MSL 1 P Early Failure Rate High Temperature Operating Life Latent Failure Rate High Accelerated Saturation Test (HAST) 168 Hrs, 85C/85%RH+3IR-Reflow, 235°C+5, 0°C Precondition: JESD22 Moisture Sensitivity MSL 3 192 Hrs., 30°C/60%RH+3IR-Reflow, 220°C+5, -0°C Temperature Cycle Precondition: JESD22 Moisture Sensitivity MSL 1 P 168 Hrs, 85C/85%RH+3IR-Reflow, 235°C+5, 0°C Precondition: JESD22 Moisture Sensitivity MSL 3 192 Hrs., 30°C/60%RH+3IR-Reflow, 220°C+5, -0°C MIL-STD-883C, Method 1010, Condition C, -65°C to 150°C Pressure Cooker Precondition: JESD22 Moisture Sensitivity MSL 1 168 Hrs, 85C/85%RH+3IR-Reflow, 235°C+5, 0°C Precondition: P JESD22 Moisture Sensitivity MSL 3 192 Hrs., 30°C/60%RH+3IR-Reflow, 220°C+5, -0°C 121°C, 100%RH Electrostatic Discharge 500V Charge Device Model (ESD-CDM) Cypress Spec. 25-00020 Electrostatic Discharge Human Body Model (ESD-HBM) 2,200V 2,000V P P MIL-STD-883, Method 3015.7 Acoustic Microscopy MSL3 P Cypress Spec. 25-00104 Latchup Sensitivity 125C, 10V, ± 300mA In accordance with JEDEC 17. Cypress Spec. 01-00081 P Cypress Semiconductor Twenty Output Zero-Delay Buffer, R42LDHA, Fab4 Device: CY23020* QTP# 021405, V, 1.1 Page 6 of 10 May , 2003 RELIABILITY FAILURE RATE SUMMARY Stress/Test High Temperature Operating Life Early Failure Rate1 High Temperature Operating Life1,2 Long Term Failure Rate 1 2 3 Device Tested/ Device Hours # Fails Activation Energy Thermal3 A.F Failure Rate4 4,498 0 N/A N/A 0 PPM 517,435 DHRs @150C 1 0.7 170 23 FIT Assuming an ambient temperature of 55°C and a junction temperature rise of 15°C. Chi-squared 60% estimations used to calculate the failure rate. Thermal Acceleration Factor is calculated from the Arrhenius equation E 1 1 AF = exp A - k T 2 T1 where: EA =The Activation Energy of the defect mechanism. k = Boltzmann's constant = 8.62x10-5 eV/Kelvin. T1 is the junction temperature of the device under stress and T2 is the junction temperature of the device at use conditions. 4 4 EFR failure rate based on QTP# 021405, QTP# 021011, QTP #98357. LFR failure rate based on QTP# 021011 and QTP #98357. Cypress Semiconductor Twenty Output Zero-Delay Buffer, R42LDHA, Fab4 Device: CY23020* QTP# 021405, V, 1.1 Page 7 of 10 May , 2003 RELIABILITY TEST DATA QTP#: 98357 DEVICE ==================== STRESS: ASSY-LOC ======== FABLOT# ======== ASSYLOT# ============== DURATION ======== 4815594 619807192 COMP S/S ==== REJ === FAIL MODE ================================ ACOUSTIC, MSL3 CY7C1350-AC CSPI-R 15 0 CY7C1352-AC CSPI-R 4812385 619805289 COMP 15 0 --------------------------------------------------------------------------------------------------------------STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 150C, 3.8V CY7C1350-AC CSPI-R 4812418 619805770 48 750 0 CY7C1350-AC CSPI-R 4815594 619807192 48 684 0 CY7C1352-AC CSPI-R 4824383 619809153 48 66 0 --------------------------------------------------------------------------------------------------------------STRESS: ESD-CHARGE DEVICE MODEL, 500V CY7C1352-AC CSPI-R 4824383 619809153 COMP 3 0 --------------------------------------------------------------------------------------------------------------STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 4,400V CY7C1352-AC CSPI-R 4824383 619809153 COMP 3 0 --------------------------------------------------------------------------------------------------------------STRESS: STATIC LATCH-UP TESTING, 125C, 10V, +/-300mA CY7C1352-AC CSPI-R 4824383 619809153 COMP 3 0 --------------------------------------------------------------------------------------------------------------STRESS: HI-ACCEL SATURATION TEST (130C, 3.63V), PRECOND. 192 HRS 30C/60%RH, MSL3 CY7C1350-AC CSPI-R 4816713 619808643 128 48 0 --------------------------------------------------------------------------------------------------------------STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 150C, 3.8V CY7C1350-AC CY7C1350-AC CSPI-R CSPI-R 4812418 4812418 619805770 619805770 80 500 392 390 1 0 1 UNKNOWN CAUSE CY7C1350-AC CSPI-R 4815594 619807192 80 396 0 CY7C1350-AC CSPI-R 4815594 619807192 548 396 0 --------------------------------------------------------------------------------------------------------------STRESS: PRESSURE COOKER TEST, 121C, 100%RH, MSl3 CY7C1352-AC CSPI-R 4816713 619808642 168 45 0 CY7C1352-AC CSPI-R 4816713 619808642 288 45 0 --------------------------------------------------------------------------------------------------------------STRESS: TC COND. C, -65 TO 150C, PRECOND. 192 HRS 30C/60%RH, MSL3 CY7C1350-AC CSPI-R 4812418 619805769 300 45 0 CY7C1350-AC CSPI-R 4812418 619805770 300 45 0 CY7C1350-AC CSPI-R 4815594 619807192 300 45 0 --------------------------------------------------------------------------------------------------------------- Cypress Semiconductor Twenty Output Zero-Delay Buffer, R42LDHA, Fab4 Device: CY23020* QTP# 021405, V, 1.1 Page 8 of 10 May , 2003 Reliability Test Data QTP #: Device Fab Lot # 021011 Assy Lot # Assy Loc Duration Samp Rej Failure Mechanism STRESS: ACOUSTIC,-MSL1 CY23020ZC (7C80200A) 4143167 61042994 CSPI-R COMP 15 0 CY23020ZC (7C80200A) 4145640 610208291/2/3 CSPI-R COMP 15 0 CY23020ZC (7C80200A) 4145640 610211800/01/02 CSPI-R COMP 15 0 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 125C, 3.8V, Vcc Max CY23020ZC (7C80200A) 4143167 61042994 CSPI-R 96 998 0 CY23020ZC (7C80200A) 4145640 610208291/2/3 CSPI-R 96 999 0 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 125C, 3.8V, Vcc Max CY23020ZC (7C80200A) 4143167 61042994 CSPI-R 168 235 0 CY23020ZC (7C80200A) 4143167 61042994 CSPI-R 1000 231 0 CY23020ZC (7C80200A) 4145640 610208291/2/3 CSPI-R 396 239 0 CSPI-R COMP 9 0 COMP 9 0 COMP 3 0 STRESS: ESD-CHARGE DEVICE MODEL, 500V CY23020ZC (7C80200A) 4145640 610208291/2/3 STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2,200 CY23020ZC (7C80200A) 4145640 610208291/2/3 CSPI-R STRESS: STATIC LATCH-UP TESTING, 125C, 10V, ±300mA CY23020ZC (7C80200A) 4145640 610208291/2/3 CSPI-R STRESS: HI-ACCEL SATURATION TEST, 130C, 85%RH, 3.63V, PRE COND 168 HR 85C/85%RH, MSL1 CY23020ZC (7C80200A) 4143167 61042994 CSPI-R 128 100 0 STRESS: PRESSURE COOKER TEST, 121C, 100%RH), PRE COND 168 HR 85C/85%RH, MSL1 CY23020ZC (7C80200A) 4143167 61042994 CSPI-R 168 50 0 Cypress Semiconductor Twenty Output Zero-Delay Buffer, R42LDHA, Fab4 Device: CY23020* QTP# 021405, V, 1.1 Page 9 of 10 May , 2003 Reliability Test Data QTP #: Device Fab Lot # Assy Lot # 021011 Assy Loc Duration Samp Rej STRESS: TC COND. C -65C TO 150C, PRECONDITION 168 HRS 85C/85%RH, MSL1 CY23020ZC (7C80200A) 4143167 61042994 CSPI-R 300 48 0 CY23020ZC (7C80200A) 4143167 61042994 CSPI-R 500 48 0 CY23020ZC (7C80200A) 4143167 61042994 CSPI-R 1000 48 0 CY23020ZC (7C80200A) 4145640 610208291/2/3 CSPI-R 300 47 0 CY23020ZC (7C80200A) 4145640 610208291/2/3 CSPI-R 500 47 0 CY23020ZC (7C80200A) 4145640 610208291/2/3 CSPI-R 1000 47 0 CY23020ZC (7C80200A) 4145640 610208291/2/3 CSPI-R 300 45 0 CY23020ZC (7C80200A) 4145640 610208291/2/3 CSPI-R 500 45 0 Failure Mechanism Cypress Semiconductor Twenty Output Zero-Delay Buffer, R42LDHA, Fab4 Device: CY23020* QTP# 021405, V, 1.1 Page 10 of 10 May , 2003 Reliability Test Data QTP #: Device Fab Lot # Assy Lot # 021405 Assy Loc Duration Samp Rej STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 125C, 3.8V, Vcc Max CY23020ZC-1 (7C80200A) 4215642 610217468/9/70 CSPI-R 96 1001 0 CSPI-R COMP 9 0 COMP 9 0 COMP 3 0 STRESS: ESD-CHARGE DEVICE MODEL, 500V CY23020ZC-1 (7C80200A) 4215642 610217468/9/70 STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2,200V CY23020ZC-1 (7C80200A) 4215642 610217468/9/70 CSPI-R STRESS: STATIC LATCH-UP TESTING, 125C, 10V, ±300mA CY23020ZC-1 (7C80200A) 4215642 610217468/9/70 CSPI-R STRESS: PRESSURE COOKER TEST, 121C, 100%RH), PRE COND 168 HR 85C/85%RH, MSL1 CY23020ZC-1 (7C80200A) 4143167 61042994 CSPI-R 168 50 0 STRESS: TC COND. C -65C TO 150C, PRECONDITION 168 HRS 85C/85%RH, MSL1 CY23020ZC-1 (7C80200A) 4145640 610208291/2/3 CSPI-R 300 47 0 CY23020ZC-1 (7C80200A) 4145640 610208291/2/3 CSPI-R 500 47 0 CY23020ZC-1 (7C80200A) 4145640 610208291/2/3 CSPI-R 1000 47 0 Failure Mechanism