Cypress Semiconductor Product Qualification Report QTP# 98204 VERSION 2.0 August, 2003 Zero Delay Buffer, 3.3V L28 Technology, Fab 2 CY2305/CY2309 10-MHz to 100/133-MHZ CY2304/CY2308 10-MHz to 133-MHZ CYPRESS TECHNICAL CONTACT FOR QUALIFICATION DATA: Ed Russell Reliability Director (408) 432–7069 Rene Rodgers Staff Reliability Engineer (408) 943–2732 Cypress Semiconductor 3.3V Zero Delay Buffer – Fab 2 – L28 Technology Device: CY2304*/CY2305*/CY2308*/CY2309* QTP# 98204, V. 2.0 Page 2 of 10 August, 2003 PRODUCT QUALIFICATION HISTORY Qual Report Description of Qualification Purpose Date Comp 95197 New L28, Technology Qualification / CY2291SC Feb 96 96303 New CY2308* Product , L28, Technology May 97 98204 CY2308* Product Transfer from Fab 3 to Fab 2 , L28, Technology Jul 98 Cypress Semiconductor 3.3V Zero Delay Buffer – Fab 2 – L28 Technology Device: CY2304*/CY2305*/CY2308*/CY2309* QTP# 98204, V. 2.0 Page 3 of 10 August, 2003 PRODUCT DESCRIPTION (for qualification) Qualification Purpose: Qualify CY2308* and its product family fabricated at CTI fab 2 using L28 Technology. Marketing Part #: CY2304*/CY2305*/ CY2308*/CY2309* Device Description: 3.3V, Commercial and Industrial available in 8-ld SOIC, 16-ld, SOIC and 16-ld TSSOP package Cypress Division: Cypress Semiconductor Corporation - Clock Product Division, WA Division Overall Die (or Mask) REV Level (pre-requisite for qualification): What ID markings on Die: Rev. A 7C80720A TECHNOLOGY/FAB PROCESS DESCRIPTION - L28-CTI Number of Metal Layers: 2 Metal Composition: Metal 1: 500ATi/1,200A TiW/6.000A Al/1,200A TiW Metal 2: 1,500A TiW/10,000A Al/150A Ti Passivation Type and Materials: 3,000A TEOS + 15.000A Si2N4 Generic Process Technology/Design Rule (µ-drawn): CMOS, Single Poly, Double Metal /0.65 µm Gate Oxide Material/Thickness (MOS): SiO2 / 145 A Name/Location of Die Fab (prime) Facility: Cypress Semiconductor – Round Rock, TX Die Fab Line ID/Wafer Process ID: Fab2/L28 PACKAGE TYPE ASSEMBLY FACILITY SITE 16-lead SOIC (extended qual to 8ld) OMEDATA (INDNS-O), OSE (PHIL-OP), ANAM (PHIL-M) 16-lead TSSOP ANAM (PHIL-M), OSE (TAIWN-T) Note: Package Qualification details upon request Cypress Semiconductor 3.3V Zero Delay Buffer – Fab 2 – L28 Technology Device: CY2304*/CY2305*/CY2308*/CY2309* QTP# 98204, V. 2.0 Page 4 of 10 August, 2003 MAJOR PACKAGE INFORMATION USED IN THIS QUALIFICATION Package Designation: Package Outline, Type, or Name: Mold Compound Name/Manufacturer: S1615 16-lead SOIC Sumitomo EME6300HR Mold Compound Flammability Rating: V-O per UL94 Oxygen Rating Index: >28% Lead Frame Material: Copper Lead Finish, Composition / Thickness: 85%Tin- 15%Lead min. 250 micro inches Die Backside Preparation Method/Metallization: N/A Die Separation Method: Wafer Saw Die Attach Supplier: Ablestik Die Attach Material: 84-1lMISR4 Bond Diagram Designation 10-03065 Wire Bond Method: Thermosonic Wire Material/Size: Gold, 1.0mil Thermal Resistance Theta JA °C/W: 98.4 Package Cross Section Yes/No: N/A Assembly Process Flow: 49-24004M Name/Location of Assembly (prime) facility: ANAM (PHIL-M) ELECTRICAL TEST / FINISH DESCRIPTION Test Location: OMEDATA (INDN-O), OSE (PHIL-OP) Fault Coverage: 100% Cypress Semiconductor 3.3V Zero Delay Buffer – Fab 2 – L28 Technology Device: CY2304*/CY2305*/CY2308*/CY2309* QTP# 98204, V. 2.0 Page 5 of 10 August, 2003 RELIABILITY TESTS PERFORMED PER SPECIFICATION REQUIREMENTS Stress/Test Test Condition (Temp/Bias) Result P/F High Temperature Operating Life Early Failure Rate Dynamic Operating Condition, Vcc = 5.50V, 150°C P High Temperature Operating Life Latent Failure Rate Dynamic Operating Condition, Vcc = 5.50V, 150°C P High Temperature Steady State Life Static Operating Condition, Vcc = 5.5V, 150°C P High Accelerated Saturation Test (HAST) 140°C, 85%RH, 5.5V Precondition: JESD22 Moisture Sensitivity Level 1 P 168 Hrs., 85°C/85%RH+3IR-Reflow, 220°C+5, -0°C Temperature Cycle (Plastic device) MIL-STD-883C, Method 1010, Condition C, -65°C to 150°C Precondition: JESD22 Moisture Sensitivity Level 1 168 Hrs., 85°C/85%RH+3IR-Reflow, 220°C+5, -0°C P Pressure Cooker 121°C, 100%RH Precondition: JESD22 Moisture Sensitivity Level 1 P 168 Hrs., 85°C/85%RH+3IR-Reflow, 220°C+5, -0°C Cold Life Test -30°C, 6.5V P Long Life Verification Dynamic Operating Condition, Vcc = 5.50V, 150°C P SEM Analysis MIL-STD-883, Method 2018 P Age Bond Strength MIL-STD-883, Method 2011 P Data Retention Plastic 165°C, no bias P Electrostatic Discharge MIL-STD-883, Method 3015.7 (2,200V) P Electrostatic Discharge Charge Device Model (ESD-CDM) Cypress Spec. 25-00020 (500V) P Latchup Sensitivity In accordance with JEDEC 17. Cypress Spec. 01-00081 (±200mA) P Human Body Model (ESD-HBM) Cypress Semiconductor 3.3V Zero Delay Buffer – Fab 2 – L28 Technology Device: CY2304*/CY2305*/CY2308*/CY2309* QTP# 98204, V. 2.0 Page 6 of 10 August, 2003 RELIABILITY FAILURE RATE SUMMARY Stress/Test High Temperature Operating Life Early Failure Rate High Temperature Operating Life1,2 Long Term Failure Rate 1 2 3 Device Tested/ Device Hours # Fails Activation Energy Thermal3 A.F Failure Rate4 2065 0 N/A N/A 0 PPM 341,508 DHRs 0 0.7 170 16 FITs Assuming an ambient temperature of 55°C and a junction temperature rise of 15°C. Chi-squared 60% estimations used to calculate the failure rate. Thermal Acceleration Factor is calculated from the Arrhenius equation E 1 1 AF = exp A - k T 2 T1 where: EA =The Activation Energy of the defect mechanism. k = Boltzmann's constant = 8.62x10-5 eV/Kelvin. T1 is the junction temperature of the device under stress and T2 is the junction temperature of the device at use conditions. 4 4 EFR is based on QTP 95197 and 95501 LFR is based on L28 Technology qualification QTP 95197 Cypress Semiconductor 3.3V Zero Delay Buffer – Fab 2 – L28 Technology Device: CY2304*/CY2305*/CY2308*/CY2309* QTP# 98204, V. 2.0 Page 7 of 10 August, 2003 RELIABILITY TEST DATA QTP#: 955011 DEVICE ASSY-LOC FABLOT# ASSYLOT# ==================== ======== ======== ============== STRESS: DATA RETENTION PLASTIC (165C, NO BIAS) DURATION ======== S/S ==== REJ === FAIL MODE ================================ CY2907-SC PHIL-M 3601147 3601147 168 76 0 CY2907-SC PHIL-M 3601147 3601147 552 76 0 --------------------------------------------------------------------------------------------------------------STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE (150C, 5.50V) CY2907-SC PHIL-M 3601147 3601147 48 1003 0 --------------------------------------------------------------------------------------------------------------STRESS: HI-ACCEL SATURATION TEST (140C,85%RH, 5.5V), PRECOND. 168 HRS 85C/85%RH CY2907-SC PHIL-M 3601147 3601147 128 48 0 --------------------------------------------------------------------------------------------------------------STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE (150C, 5.50V) CY2907-SC PHIL-M 3601147 3601147 500 120 0 --------------------------------------------------------------------------------------------------------------STRESS: TC COND. C, -65 TO 150C, PRECOND. 168 HRS 85C/85%RH CY2907-SC PHIL-M 3601147 3601147 300 48 0 CY2907-SC PHIL-M 3601147 3601147 1000 48 0 --------------------------------------------------------------------------------------------------------------- 1 7C80700 die qualification which QTP 96303 was based on with 4 layer mask changed implementation. Cypress Semiconductor 3.3V Zero Delay Buffer – Fab 2 – L28 Technology Device: CY2304*/CY2305*/CY2308*/CY2309* QTP# 98204, V. 2.0 Page 8 of 10 August, 2003 RELIABILITY TEST DATA QTP#: DEVICE ASSY-LOC FABLOT# ASSYLOT# ==================== ======== ======== ============== STRESS: DATA RETENTION PLASTIC (165C, NO BIAS) CY2291SC CY2291SC PHIL-M PHIL-M 3519671 3519671 13040(SWR) 13040(SWR) 951972 DURATION ======== 168 552 S/S ==== REJ === 76 78 0 0 FAIL MODE ================================ CY2291SC PHIL-M 3520751 13109(SWR) 168 80 0 CY2291SC PHIL-M 3520751 13109(SWR) 552 80 0 ---------------------------------------------------------------------------------------------------------------STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE (150C, 5.50V) CY2291SC PHIL-M 3519671 13040(SWR) 48 354 0 CY2291SC PHIL-M 3518546 13041(SWR) 48 354 0 CY2291SC PHIL-M 3520751 13109(SWR) 48 354 0 ---------------------------------------------------------------------------------------------------------------STRESS: HI-ACCEL SATURATION TEST (140C, 85%RH, 5.5V), PRECONDITION 48 HRS PCT CY2291SC PHIL-M 3518546 13041(SWR) 128 49 0 CY2291SC PHIL-M 3520751 13109(SWR) 128 50 0 ---------------------------------------------------------------------------------------------------------------STRESS: HIGH TEMP STEADY STATE LIFE TEST (150C, 5.5V) CY2291SC CY2291SC PHIL-M PHIL-M 3519671 3519671 13040(SWR) 13040(SWR) 80 168 76 76 0 0 CY2291SC CY2291SC PHIL-M PHIL-M 3518546 3518546 13041(SWR) 13041(SWR) 80 168 76 76 0 0 CY2291SC PHIL-M 3520751 13109(SWR) 80 76 0 CY2291SC PHIL-M 3520751 13109(SWR) 168 76 0 ---------------------------------------------------------------------------------------------------------------STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE (150C, 5.5V) CY2291SC CY2291SC PHIL-M PHIL-M 3519671 3519671 13040(SWR) 13040(SWR) 80 500 116 116 0 0 CY2291SC CY2291SC CY2291SC PHIL-M PHIL-M PHIL-M 3518546 3518546 3518546 13041(SWR) 13041(SWR) 13041(SWR) 80 197 500 120 120 116 0 0 0 CY2291SC PHIL-M 3520751 13109(SWR) 80 116 0 CY2291SC PHIL-M 3520751 13109(SWR) 500 116 0 ---------------------------------------------------------------------------------------------------------------STRESS: LONG LIFE VERIFICATION (150C, 5.5V) CY2291SC PHIL-M 3518546 13041(SWR) 1000 116 0 CY2291SC PHIL-M 3518546 13041(SWR) 2000 116 0 ---------------------------------------------------------------------------------------------------------------STRESS: COLD LIFE TEST (-30C, 6.5V) CY2291SC PHIL-M 3519671 13040(SWR) 500 47 0 CY2291SC PHIL-M 3519671 13040(SWR) 1000 47 0 ---------------------------------------------------------------------------------------------------------------- 2 L28 technology qualification. Cypress Semiconductor 3.3V Zero Delay Buffer – Fab 2 – L28 Technology Device: CY2304*/CY2305*/CY2308*/CY2309* QTP# 98204, V. 2.0 Page 9 of 10 August, 2003 RELIABILITY TEST DATA QTP#: DEVICE ASSY-LOC FABLOT# ASSYLOT# ==================== ======== ======== ============== STRESS: PRESSURE COOKER TEST (121C, 100%RH) CY2291SC PHIL-M 3518546 13041(SWR) 95197 DURATION ======== 168 S/S ==== REJ === 45 0 FAIL MODE ================================ CY2291SC PHIL-M 3520751 13109(SWR) 168 50 0 ---------------------------------------------------------------------------------------------------------------STRESS: TEMP CYCLE, COND. C, -65 TO 150C, PRECONDITION 48 HRS PCT CY2291SC CY2291SC PHIL-M PHIL-M 3519671 3519671 13040(SWR) 13040(SWR) 300 1000 46 46 0 0 CY2291SC CY2291SC PHIL-M PHIL-M 3518546 3518546 13041(SWR) 13041(SWR) 300 1000 49 49 0 0 CY2291SC PHIL-M 3520751 13109(SWR) 300 50 0 CY2291SC PHIL-M 3520751 13109(SWR) 1000 50 0 ---------------------------------------------------------------------------------------------------------------- Cypress Semiconductor 3.3V Zero Delay Buffer – Fab 2 – L28 Technology Device: CY2304*/CY2305*/CY2308*/CY2309* QTP# 98204, V. 2.0 Page 10 of 10 August, 2003 RELIABILITY TEST DATA QTP 982043 DEVICE ASSY-LOC FABLOT# ASSYLOT# ==================== ======== ======== ============== STRESS: ESD-CHARGE DEVICE MODEL (1000V) DURATION ======== S/S ==== REJ === FAIL MODE ================================ CY2308SC CSPI-R 2817684 519806314 COMP 3 0 --------------------------------------------------------------------------------------------------------------STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015 (4400V) CY2308SC CSPI-R 2817684 519806314 COMP 3 0 --------------------------------------------------------------------------------------------------------------STRESS: LATCH-UP SENSITIVITY (10V, 200mA) CY2308SC 3 CSPI-R 2817684 Fab Transfer from Fab3 to Fab2. 519806314 COMP 3 0