5
4
3
2
1
D
D
CYUSBS236 USB TO SERIAL DVK BOARD
PAGE NO
TITLE
01
TITLE PAGE
02
POWER SUPPLIES
C
C
03
CYUSBS236 DEVICE CONNECTION
04
PMIC, MICRO USB CKT
05
UART,EEPROM FOR SCB0 & SCB1
06
GPIO HDR,JUMPERS FOR SCB0 & SCB1
B
B
PCBA NUMBER : 121-60095-01
PCB NUMBER : 600-60113-01
FAB DRAWING NUMBER : 610-60112-01
ASSEMBLY DRAWING NUMBER : 620-60113-01
CYPRESS SEMICONDUCTOR © 2013
Title
A
A
CYUSBS236 USB TO SERIAL DVK BOARD
Size
A
Document Number
630-60113-01
Rev
02
TITLE PAGE
Date:
5
4
3
Tuesday, June 25, 2013
2
Sheet
1
of
1
6
5
4
3
TP17
1
5V DC INPUT
D
TP19
VIN
SW1
1
R48
0R
SK44BL-TP
C1
+
C2
TP18
+ C3
+
1
PJ-102AH
330uF_25V
22uF_25V
1
VSYS
3
10UF_16V
3
SPDT SWITCH
1
3
2
1
EXTERNAL DC - 5V
V5p0_JACK
D1
J1
2
2
1
D
2
C4
+ C5
+
SPDT_SWITCH
1101M2S3CQE2
C&K Components
C6
+
R1
+ C7
100uF_10V
330uF_10V_NL
100uF_10V_NL
330uF_10V
180R
D2
LTST-C190KG
TP12
TP13
TP14
1
1
TP10
V3p3
TP11
1
TP9
VIN
GND TEST POINTS
1
3.3V@1A LDO REGULATOR
C
C
1
U2
TP15
4
R49
0R
VIN
5
VOUT
R50
0R
C8
C9
3
CE
4.7UF_16V
C43
2.2UF_NL
C44
0.1UF_NL
C45
R2
68R
0.01UF_NL
4.7UF_16V
2
GND
1
ADJ/NC
D4
LTST-C190KG
NCP694H33HT1G
NCP694H33HT1G
ON Semiconductor
Place the GND test points
across 4 corners of the board
B
B
GENERAL LAYOUT NOTE
1.Label all the Jumpers with prompt net names.
2.Provide 3X spacing between digital traces.
3.Power Trace minimum width should be 40 mil.
4.Add Four #4-40 mounting holes at board corner.
A
A
CYPRESS SEMICONDUCTOR © 2013
Title
CYUSBS236 USB TO SERIAL DVK BOARD
Size
B
Document Number
630-60113-01
Rev
02
POWER SUPPLIES
Date:
5
4
3
2
Tuesday, June 25, 2013
Sheet
1
2
of
6
5
4
3
2
1
CYUSBS236 DEVICE CONNECTION
VBUS
U1
16
VCCD
VSSD1
VSSD2
VSSD3
VSSA
EPAD
C10
D
1UF_16V
4
17
20
24
33
R63
0R
D
J29
1
V3p3
VBUS
VDDD
L2
1
23
BUSDETECT_GPIO_17
BLM21PG221SN1D
VBUS
R10
+ C16
C14
10UF_16V
2.2UF_16V
C15
C17
0.1UF_16V
0.01UF_16V
USBDP
VDDD1
VDDD2
USBDM
19
R7
14
USB_DP {4}
15
COUT0
LTST-C190KG
1
R11
2
B1
R13
270R
1
2
2PIN JUMPER
J8
{4} BCD1_EN
1
R43
270R
CMOD
BCD0_GPIO_18
J4
9
SCB1_4_GPIO_14
GPIO_6
10
SCB1_5_GPIO_15
GPIO_7
25
31
R14
560R
CAPSENSE0 1
560R
CAPSENSE BUTTON 10MM ROUND
B2
CAPSENSE1 1 Sensor
Shield
32
R15
Sensor
Shield
GPIO_0
NOTE FOR J28:
SHORT 1 & 2 - WATERSHIELD OPERATION
SHORT 2 & 3 - NORMAL OPERATION
C
J28
C41
GPIO_1
26
1
WATERSHIELD
2.2nF
C47
2
10pF_NL
SHIELD
V3p3
3
BUSDETECT_GPIO_17
21
BCD0_GPIO_18
22
13
BCD1_GPIO_16
{6} SCB0_0
{6} SCB0_1
{6} SCB0_2
{6} SCB0_3
2
{6} SCB0_4
B
0.1UF_16V
100K_NL
CAPSENSE BUTTON 10MM ROUND
2PIN JUMPER
19.6K_1%
{4} BCD0_EN
COUT1
LTST-C190KG
D12
BCD1_GPIO_16 {6}
C
C46
USB_DM {4}
{6} SCB1_5_GPIO_15
J7
10K_1%
3
R64
{6} SCB1_4_GPIO_14
D7
VSYS
2
0R
2PIN JUMPER
{6} SCB0_5
2
27
28
29
30
3
GPIO_17
SUSPEND
GPIO_18
WAKEUP
GPIO_16
XRES
11
SUSPEND {6}
TP6
12
18
WAKEUP {6}
R12
100R
1
SCB1_0_GPIO_10
SCB0_2_GPIO_3
SCB1_1_GPIO_11
SCB0_3_GPIO_4
SCB1_2_GPIO_12
SCB0_4_GPIO_5
SCB1_3_GPIO_13
B1
B2
RESET#
C26
SCB0_0_GPIO_8
SCB0_1_GPIO_2
SW3
EVQ-PAC07K
5
6
7
8
0.01UF_16V
SCB1_0 {6}
A1
A2
PART_NUMBER = EVQPAC07K
Manufacturer = Panasonic
SCB1_1 {6}
SCB1_2 {6}
SCB1_3 {6}
B
SCB0_5_GPIO_9
CY7C65215-32LTXI
LAYOUT NOTES
1. Capsense pin should be 10mm dia.
2. No plane or trace under capsense button
in any layer.
3. Hatching around capsense button is needed.
A
4. Capsense button to ground spacing should be 20mil.
A
CYPRESS SEMICONDUCTOR © 2013
5. Hatching Details: Typical hatching for the
ground fill is 25 percent on the top layer (7 mil
line, 45 mil spacing) and 17 percent on the bottom
layer (7 mil line, 70 mil spacing).
Title
CYUSBS236 USB TO SERIAL DVK BOARD
Size
B
Document Number
630-60113-01
Rev
02
CYUSBS236 DEVICE CONNECTION
Date:
5
4
3
2
Tuesday, June 25, 2013
Sheet
1
3
of
6
5
4
3
2
1
PMIC CIRCUIT
D
D
USB TO UART
VBAT
V3p3
U3
R65
0R
3
1
C19
BLM21PG221SN1D
R3
6
68R
C
DP
GND
SHIELD1
SHIELD2
USB_VBUS
LTST-C190KG
TP2
4
5
6
D+
1
IO1A
IO1B
6
R67
0R
USB_DP {3}
R5
100K
C22
BCD0_EN {3}
R54
POK
VSYS
4.7K
14
SYS2
R51
R9
L4
BLM21PG221SN1D
2
USB - MICRO B
DX4R005J91R1500
JAE Electronics
G
V
SETI
IO2A
IO2B
USBLC6-2
USBLC6-2SC6
ST Micro.
SETI
C42
+
+
4.7uF / 25V
180R
4.7uF / 25V_NL
5
R8
3
12
C
0R
C21
0.1UF_16V
D6
LTST-C190KG
13
SYS1
7
3
4.7K
4.7K_NL
CHG
U4
D-
R53
10
EN1
D5
1
2
R29
VL
L3
J2
VBUS
DM
0.1UF_16V
J3
2PIN JUMPER
BCD1_EN {3}
V3p3
4
C20
V3p3
4.7uF / 25V
USB MICRO-B
9
EN2
TP1
4.7UF_16V
+
4.7K_NL
4
R66
0R
8
GATE
1
BAT1
TP3
BATTERY CIRCUIT
VBAT
SW2
3
USB_DM {3}
23.58K
11
GND
BAT2
EPAD
THM
2
R52
2
0R
1
C25
+ C23
15
0.1UF_16V
5
V3p3
22uF
+ C24
1
C18
IN
R33
2
VBUS
TP16
1
VBUS
SPDT_SWITCH
22uF
BH1
0530470210
MAX8856ETD+T
MAX8856ETD+T
Maxim Integrated
2
Low ESR
R26
91K
B
B
R46
Battery part no:
0R
LAYOUT NOTES
R47
0R_NL
R25
47K_1%
1. Place U4 closer to J2.
30011-02
Tenergy Li-Ion 18650 3.7V 2600mAh
Rechargeable Battery w/ PCB & Molex
Connector
NOTE:
2. USB 90 ohm differential pairs should be
routed with ground reference.
1.Load the resistor R46 by default, if temperature sensing
is not required remove R46 and load R47.
3. Add ground vias near the USB differential
vias for Z-Axis reference.
2.Place NTC Thermistor R25 in close proximity to
Battery to monitor the Battery Temperature
4. VBUS trace width should be minimum 20mil.
A
A
CYPRESS SEMICONDUCTOR © 2013
Title
CYUSBS236 USB TO SERIAL DVK BOARD
Size
B
Document Number
630-60113-01
Rev
02
PMIC, MICRO USB CKT
Date:
5
4
3
2
Tuesday, June 25, 2013
Sheet
1
4
of
6
5
4
3
2
V3p3
UART PORT FOR SCB0
UART PORT FOR SCB1
V3p3
R55
V3p3
R59
V3p3
4.7K
4.7K
R56
R60
27
28
C31
0.1UF_16V
0.1UF_16V
24
C1-
V-
3
1
0.1UF_16V
2
D8
R16
270R
C21
{6} TxD_0_OUT
13
{6} DTR#_0_OUT
12
{6} RTS#_0_OUT
V3p3
D10
R18
T1IN
T1OUT
T2IN
T2OUT
T3IN
T3OUT
9
TxD_0 {5}
10
11
{5} DSR#_0
DTR#_0 {5}
{5} RxD_0
RTS#_0 {5}
{5} RTS#_0
270R
20
LTST-C193KGKT-5A
19
{6} RxD_0_OUT
{5} TxD_0
R1IN
{5} CTS#_0
4
18
R2OUT
R2IN
6
16
R3OUT
R3IN
270R
14
{6} TxD_1_OUT
13
RTS
3
12
{6} RTS#_1_OUT
V3p3
D11
TX
R19
8
20
CTS
{5} DTR#_0
4
R4OUT
R4IN
CTS#_0 {5}
V3p3
R5IN
18
G1
8
17
16
T1OUT
T2IN
T2OUT
T3IN
T3OUT
TxD_1 {5}
10
{5} RxD_1
11
RTS#_1 {5}
{5} TxD_1
R1OUT
R1IN
R2OUT
R2IN
R3OUT
R3IN
R4OUT
R4IN
15
R5OUT
R5IN
21
TP8
INVALID
R58
25
MAX3245EEUI+
4
RTS
3
TX
{5} CTS#_1
8
CTS
RxD_1 {5}
6
CTS#_1 {5}
V3p3
RI
5
G1
7
8
C
DTR
5
FORCEON
DB9M
182-009-113R531
Norcomp Inc
23
R62
MAX3245EEUI+
4.7K_NL
I2C EEPROM FOR SCB 0 & SCB1
RX
7
4.7K
23
GND
FORCEON
25
GND
INVALID
DSR
2
R2OUTB
4.7K
21
TP7
{5} RTS#_1
R61
DB9M
182-009-113R531
Norcomp Inc
J16
DCD
6
9
{6} CTS#_1_OUT
7
T1IN
9
4
RI
10
R5OUT
19
DTR
5
C2-
270R
{6} RxD_1_OUT
R57
15
R17
DSR#_0 {5}
6
3
C36
RX
7
G2
17
V-
LTST-C193KGKT-5A
DSR
2
9
{6} CTS#_0_OUT
C2+
1
RxD_0 {5}
5
C1-
0.1UF_16V
LTST-C193KGKT-5A
C
{6} DSR#_0_OUT
D9
R2OUTB
R1OUT
C32
0.1UF_16V
0.1UF_16V
2
DCD
LTST-C193KGKT-5A
14
V3p3
J15
G3
0.1UF_16V
27
C35
11
V3p3
C34
V+
G3
C2+
C33
C1+
11
C30
G2
1
V+
D
4.7K_NL
22
22
0.1UF_16V
24
U6
10
C1+
C29
0.1UF_16V
FORCEOFF
28
4.7K_NL
FORCEOFF
U5
VCC
26
0.1UF_16V
26
C28
VCC
C27
D
1
4.7K_NL
SPI EEPROM FOR SCB 0 & SCB1
V3p3
V3p3
B
B
V3p3
V3p3
C37
V3p3
0.1UF_16V
R22
R20
10K
10K
R24
A2
24LC128
4
3
A1
SDA
SCL
WP
R23
2.2K
5
SDA_0 {6}
6
SCL_IN_OUT_0 {6}
7
R44
U8
{6} SSEL_IN_OUT_0
1
{6} MISO_IN_OUT_0
2
{6} MOSI_IN_OUT_0
5
{6} SCLK_IN_OUT_0
6
S
W
3
Q
D
C
4
2
A0
GND
1
2.2K
VCC
U7
8
V3p3
10K
VCC
R21
VSS
0.1UF_16V
8
C38
0R
HOLD
7
M95M02-DRMN6TP
M95M02-DRMN6TP
STMicroelectronics
24LC128-I/SM
V3p3
V3p3
V3p3
V3p3
C40
2.2K
R32
A2
8
24LC128
4
3
A1
SDA
SCL
WP
U10
1
{6} MISO_IN_OUT_1
2
5
SDA_1 {6}
{6} MOSI_IN_OUT_1
5
6
SCL_IN_OUT_1 {6}
{6} SCLK_IN_OUT_1
6
7
R45
0R
S
24LC128-I/SM
R30
R31
W
10K
10K
A
3
Q
D
C
4
2
A0
GND
1
VCC
U9
10K
{6} SSEL_IN_OUT_1
0.1UF_16V
8
2.2K
VCC
R27
VSS
R28
V3p3
A
C39
V3p3
0.1UF_16V
HOLD
7
CYPRESS SEMICONDUCTOR © 2013
M95M02-DRMN6TP
M95M02-DRMN6TP
STMicroelectronics
Title
CYUSBS236 USB TO SERIAL DVK BOARD
Size
C
Document Number
630-60113-01
Rev
02
UART,EEPROM FOR SCB0&1
Date:
5
4
3
2
Tuesday, June 25, 2013
Sheet
1
5
of
6
5
4
3
2
1
JUMPER CONFIG FOR SCB0
J17
1
J18
1
D
1
RxD_0_OUT {5}
2
{3} SCB0_0
2
{3} SCB0_1
3
{3} SCB0_2
4
SCL_IN_OUT_0 {5}
2
4
DSR#_0_OUT {5}
3
SCB0_0_GPIO_8
3
SCB0_1_GPIO_2
D
RTS#_0_OUT {5}
5
SSEL_IN_OUT_0 {5}
4PIN JUMPER
MISO_IN_OUT_0 {5}
5PIN JUMPER
J20
J22
1
SCB0_3_GPIO_4
1
J21
1
3
{3} SCB0_3
SCB0_2_GPIO_3
J19
SDA_0 {5}
2
2
{3} SCB0_4
4
{3} SCB0_5
4
CTS#_0_OUT {5}
5
2
TxD_0_OUT {5}
3
MOSI_IN_OUT_0 {5}
DTR#_0_OUT {5}
SCB0_4_GPIO_5
3
SCB0_5_GPIO_9
SCLK_IN_OUT_0 {5}
4PIN JUMPER
5PIN JUMPER
32-QFN
DEFAULT
UART
PIN
NAME
CONFIGURATION
2
P1.0
SCB0_0
SPI
CONFIGURATION1
CONFIGURATION2
I2C
EXTERNAL HEADER
CONFIGURATION3
GPIO HEADER
J23
CONFIGURATION4
RxD_0
GPIO_8
27
P0.2
SCB0_1
DSR#_0
SSEL_OUT_0
28
P0.3
SCB0_2
RTS#_0
MISO_IN_0
SCL_OUT_0
GPIO_2
GPIO_3
29
P0.4
SCB0_3
CTS#_0
MOSI_OUT_0
SDA_0
GPIO_4
30
P0.5
SCB0_4
TxD_0
SCLK_OUT_0
3
P1.1
SCB0_5
DTR#_0
C
P1.0
SCB0_0_GPIO_8
1
2
SCB1_0_GPIO_10
P0.2
SCB0_1_GPIO_2
3
4
SCB1_1_GPIO_11
P1.3
P0.3
SCB0_2_GPIO_3
5
6
SCB1_2_GPIO_12
P1.4
P0.4
P0.5
SCB0_3_GPIO_4
7
8
SCB1_3_GPIO_13
P1.5
SCB0_4_GPIO_5
9
10
P1.1
SCB0_5_GPIO_9
11
12
13
14
15
16
{3} SUSPEND
GPIO_5
{3} WAKEUP
P1.2
SCB1_4_GPIO_14 {3}
P1.6
C
SCB1_5_GPIO_15 {3} P1.7
BCD1_GPIO_16 {3}
P2.2
HEADER 8X2
GPIO_9
JUMPER CONFIG FOR SCB1
J24
J25
1
3
{3} SCB1_0
3
SCL_IN_OUT_1 {5}
2
{3} SCB1_1
4
2
4
RxD_1_OUT {5}
5
J26
1
SCB1_0_GPIO_10
5
MISO_IN_OUT_1 {5}
5PIN JUMPER
1
SCB1_1_GPIO_11
SDA_1 {5}
{3} SCB1_2
2
SCB1_2_GPIO_12
4
3
TxD_1_OUT {5}
RTS#_1_OUT {5}
SSEL_IN_OUT_1 {5}
4PIN JUMPER
MOSI_IN_OUT_1 {5}
5PIN JUMPER
J27
1
{3} SCB1_3
2
SCB1_3_GPIO_13
4
3
B
CTS#_1_OUT {5}
SCLK_IN_OUT_1 {5}
B
4PIN JUMPER
32-QFN
DEFAULT
UART
CONFIGURATION1
SPI
CONFIGURATION2
I2C
CONFIGURATION3
EXTERNAL HEADER
PIN
NAME
CONFIGURATION
5
P1.2
SCB1_0
RxD_1
MISO_IN_1
SCL_OUT_1
GPIO_10
6
P1.3
SCB1_1
TxD_1
MOSI_OUT_1
SDA_1
GPIO_11
7
P1.4
SCB1_2
RTS#_1
SSEL_OUT_1
GPIO_12
8
P1.5
SCB1_3
CTS#_1
SCLK_OUT_1
GPIO_13
NOTE:
CONFIGURATION4
The pins of 5 pin Header J17, J20, J24, J25
should be placed as shown in the below figure
4
1
2
3
5
A
A
CYPRESS SEMICONDUCTOR © 2013
Title
CYUSBS236 USB TO SERIAL DVK BOARD
Size
C
Document Number
630-60113-01
Rev
02
GPIO HDR,JUMPER FOR SCB
Date:
5
4
3
2
Tuesday, June 25, 2013
Sheet
1
6
of
6