023302A%20rev1.0.CY7C67200.R52T3.pdf

Cypress Semiconductor
Product Qualification Report
QTP# 023302A VERSION 1.0
May 2004
CY7C67200
EZ-OTG™ Programmable USB On-The-Go
Host/Peripheral Controller
R52T-3 Technology, Fab4
CYPRESS TECHNICAL CONTACT FOR QUALIFICATION DATA:
Mira Ben-Tzur
Principal Reliability Engineer
(408) 943-2675
Cypress Semiconductor
EZ-OTGt™ Programmable USB On-The-Go Host/Peripheral Controller
Device: CY7C67200
QTP# 023302A V, 1.0
Page 2 of 8
May 2004
TECHNOLOGY QUALIFICATION HISTORY
Qual
Report
023302A
Description of Qualification Purpose
New Device EZ-OTGt™ Programmable USB On-The-Go Host/Peripheral Controller
(CY7C67200) Base Die in R52T-3 Technology
Date
Comp
Feb 04
Cypress Semiconductor
QTP# 023302A V, 1.0
Page 3 of 8
May 2004
EZ-OTGt™ Programmable USB On-The-Go Host/Peripheral Controller
Device: CY7C67200
PRODUCT DESCRIPTION (for qualification)
Qualification Purpose: New Device of CY7C67200 Base Die in R52T-3 Technology
Marketing Part #:
CY7C67200
Device Description:
EZ-OTGt™ Programmable USB On-The-Go Host/Peripheral Controller
3.3V available 100-lead TQFP and 48-ball FBGA
Cypress Division:
Cypress Semiconductor Corporation – Personal Communications Division (PCD) WA
Overall Die (or Mask) REV Level (pre-requisite for qualification):
Rev. A
What ID markings on Die: 7C67300A
TECHNOLOGY/FAB PROCESS DESCRIPTION – R52T-3
Number of Metal Layers:
3
Metal
Metal 1: 500Å TiW / 6000Å AL / 300Å TiW
Composition: Metal 2: 500Å TiW / 6000Å AL / 300Å TiW
Metal 3: 500Å TiW / 8000Å AL / 300Å TiW
Passivation Type and Materials:
TEOS 1K Å, Sin 9k Å
Free Phosphorus contents in top glass layer(%):
0%
Number of Transistors in Device
2,805,388
Number of Gates in Device
76K
Generic Process Technology/Design Rule (µ-drawn):
0.25µm
Gate Oxide Material/Thickness (MOS):
SiO2, 55Å
Name/Location of Die Fab (prime) Facility:
Cypress Semiconductor -- Bloomington, MN
Die Fab Line ID/Wafer Process ID:
Fab4/R52T-3
PACKAGE AVAILABILITY
PACKAGE
48-ball FBGA
ASSEMBLY SITE FACILITY
Cypress Philippines (CML-R)
Cypress Semiconductor
EZ-OTGt™ Programmable USB On-The-Go Host/Peripheral Controller
Device: CY7C67200
MAJOR PACKAGE INFORMATION USED IN THIS QUALIFICATION
Package Designation:
Package Outline, Type, or Name:
Mold Compound Name/Manufacturer:
Mold Compound Flammability Rating:
A100
100-LD Thin Quad Falt Packs
Hitachi Cel9200CY
V-O per UL94
Oxygen Rating Index:
>28%
Lead Frame Material:
Copper
Lead Finish, Composition / Thickness:
Sn 90%- Pb 10% 400u inch
Die Backside Preparation Method/Metallization:
Backgrinding
Die Separation Method:
100% Wafer Saw
Die Attach Supplier:
Dexter
Die Attach Material:
QMI 509
Die Attach Method:
Epoxy
Bond Diagram Designation:
10-04885
Wire Bond Method:
Ultrasonic
Wire Material/Size:
Au, 1.0mil
Thermal Resistance Theta JA °C/W:
60.28°C/W
Package Cross Section Yes/No:
N/A
Assembly Process Flow:
11-20005
Name/Location of Assembly (prime) facility:
Cypress Philippines (CML-R)
ELECTRICAL TEST / FINISH DESCRIPTION
Test Location:
Cypress Philippines (CML-R)
Fault Coverage:
N/A
QTP# 023302A V, 1.0
Page 4 of 8
May 2004
Cypress Semiconductor
QTP# 023302A V, 1.0
Page 5 of 8
May 2004
EZ-OTGt™ Programmable USB On-The-Go Host/Peripheral Controller
Device: CY7C67200
RELIABILITY TESTS PERFORMED PER SPECIFICATION REQUIREMENT
Stress/Test
High Temperature Operating Life
Early Failure Rate
High Temperature Operating Life
Latent Failure Rate
High Accelerated Saturation Test
(HAST)
Test Condition
(Temp/Bias)
Result
P/F
Dynamic Operating Condition, Vcc Max = 3.8V, 125°C
Dynamic Operating Condition, Vcc Max = 3.8V, 150C
P
Dynamic Operating Condition, Vcc Max = 3.8V, 125°C
Dynamic Operating Condition, Vcc Max = 3.8V, 150C
P
130°C, 3.63V,85%RH
Precondition: JESD22 Moisture Sensitivity MSL 3
P
192hrs, 30C/60%RH+3IR-Reflow, 220°C+5, 0°C
Temperature Cycle
MIL-STD-883C, Method 1010, Condition C, -65°C to 150°C
Precondition: JESD22 Moisture Sensitivity MSL 3
P
192hrs, 30C/60%RH+3IR-Reflow, 220°C+5, 0°C
Pressure Cooker
121°C, 100%RH
Precondition: JESD22 Moisture Sensitivity MSL 3
P
192hrs, 30C/60%RH+3IR-Reflow, 220°C+5, 0°C
High Temperature Storage
150°C ± 5°C no bias
Electrostatic Discharge
Human Body Model (ESD-HBM)
2,200V
Electrostatic Discharge
2,200V
Human Body Model (ESD-HBM)
MIL-STD-883, Method 3015.7
Electrostatic Discharge
Charge Device Model (ESD-CDM)
500V
Acoustic Microscopy, MSL 3
Cypress Spec. 25-00104
P
Static Latch-up
125C, 10V, ± 300mA
P
JESD22, Method A114-B
P
P
P
P
Cypress Spec. 25-00020
In accordance with JEDEC 17. Cypress Spec. 01-00081
Cypress Semiconductor
QTP# 023302A V, 1.0
Page 6 of 8
May 2004
EZ-OTGt™ Programmable USB On-The-Go Host/Peripheral Controller
Device: CY7C67200
RELIABILITY FAILURE RATE SUMMARY
Stress/Test
Device Tested/
Device Hours
#
Fails
Activation
Energy
Thermal
AF4
Failure Rate
High Temperature Operating Life
Early Failure Rate @125C
2,069
1
N/A
N/A
483 PPM
High Temperature Operating Life
Early Failure Rate @150C
4,898
0
N/A
N/A
0 PPM
337,828 DHRs
0
0 .7
170
16 FITs
High Temperature Operating Life1,2
Long Term Failure Rate @150C
1
2
3
Assuming an ambient temperature of 55°C and a junction temperature rise of 15°C.
Chi-squared 60% estimations used to calculate the failure rate.
Thermal Acceleration Factor is calculated from the Arrhenius equation
E  1 1  
AF = exp  A  -  
 k  T 2 T1  
where:
EA =The Activation Energy of the defect mechanism.
k = Boltzmann's constant = 8.62x10-5 eV/Kelvin.
T1 is the junction temperature of the device under stress and T2 is the junction temperature of the device
at use conditions.
Cypress Semiconductor
QTP# 023302A V, 1.0
Page 7 of 8
May 2004
EZ-OTGt™ Programmable USB On-The-Go Host/Peripheral Controller
Device: CY7C67200
Reliability Test Data
QTP #:
Device
Fab Lot #
Assy Lot #
Ass Loc
023302
Duration
Samp
Rej
COMP
15
0
Failure Mechanism
STRESS: ACOUSTIC-MSL3
CY7C67300 (7C67300A)
4243325
610307229/30/1 CML-R
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 125C, 3.8V, Vcc Max
CY7C67300 (7C67300A)
4243325
610307229/30/1 CML-R
96
1022
0
CY7C67300 (7C67300A)
4308967
610324821
96
1047
1
CML-R
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 125C, 3.8V, Vcc Max
CY7C67300 (7C67300A)
4315341
610324827
CML-R
168
237
0
CY7C67300 (7C67300A)
4315341
610324827
CML-R
500
235
0
CY7C67300 (7C67300A)
4315341
610324827
CML-R
1000
111
0
CY7C67300 (7C67300A)
4308967
610324821
CML-R
168
120
0
CY7C67300 (7C67300A)
4308967
610324821
CML-R
500
120
0
CY7C67300 (7C67300A)
4308967
610324821
CML-R
803
120
0
CY7C67300 (7C67300A)
4325123
610341061
CML-R
168
120
0
CY7C67300 (7C67300A)
4325123
610341061
CML-R
500
120
0
CY7C67300 (7C67300A)
4325123
610341061
CML-R
803
120
0
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 150C, 3.8V, Vcc Max
CY7C67300 (7C67300A)
4243325
610307229/30/1 CML-R
48
399
0
CY7C67300 (7C67300A)
4308967
610324821
CML-R
48
350
0
CY7C67300 (7C67300A)
4325123
610341061
CML-R
48
1044
0
CY7C67300 (7C67300A)
4315341
610324827
CML-R
48
1036
0
CY7C67300 (7C67300A)
4346531
610359501
CML-R
48
2069
0
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 150C, 3.8V, Vcc Max
CY7C67300 (7C67300A)
4243325
610307229/30/1 CML-R
80
120
0
CY7C67300 (7C67300A)
4346531
610359501
CML-R
80
430
0
CY7C67300 (7C67300A)
4346531
610359501
CML-R
226
423
0
CY7C67300 (7C67300A)
4346531
610359501
CML-R
500
416
0
STRESS: ESD-HUMAN BODY CIRCUIT PER JESD22, METHOD A114-B, 2,200V
CY7C67300 (7C67300A)
4243325
610307229/30/1 CML-R
COMP
9
0
CY7C67300 (7C67300A)
4315341
610324827
COMP
9
0
CML-R
METAL SHORT
Cypress Semiconductor
QTP# 023302A V, 1.0
Page 8 of 8
May 2004
EZ-OTGt™ Programmable USB On-The-Go Host/Peripheral Controller
Device: CY7C67200
Reliability Test Data
QTP #:
Device
Fab Lot #
Assy Lot #
Ass Loc
023302
Duration
Samp
Rej
STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2,200V
CY7C67300 (7C67300A)
4243325
610307229/30/1 CML-R
COMP
3
0
CY7C67300 (7C67300A)
4315341
610324827
CML-R
COMP
3
0
STRESS: ESD-CHARGE DEVICE MODEL, 500V
CY7C67300 (7C67300A)
4243325
610307229/30/1 CML-R
COMP
9
0
CY7C67300 (7C67300A)
4315341
610324827
COMP
9
0
CML-R
STRESS: STATIC LATCH-UP TESTING (125C, 10V, +/-300mA)
CY7C67300 (7C67300A)
4243325
610307229/30/1 CML-R
COMP
3
0
CY7C67300 (7C67300A)
4315341
610324827
COMP
3
0
CML-R
STRESS: HIGH TEMPERATURE STORAGE, 150C, No Bias
CY7C67300 (7C67300A)
4243325
610307229/30/1 CML-R
500
48
0
CY7C67300 (7C67300A)
4243325
610307229/30/1 CML-R
1000
48
0
STRESS: HI-ACCEL SATURATION TEST (130C, 85%RH, 3.6V), PRE COND 168 HR 85C/85%RH
CY7C67300 (7C67300A)
4243325
610307229/30/1 CML-R
128
48
0
168
48
0
STRESS: PRESSURE COOKER TEST, 121C, 100%RH), PRE COND 168 HR 85C/85%RH
CY7C67300 (7C67300A)
4243325
610307229/30/1 CML-R
STRESS: TC COND. C -65C TO 150C, PRECOND 168 HR 85C/85%RH
CY7C67300 (7C67300A)
4243325
610307229/30/1 CML-R
300
47
0
CY7C67300 (7C67300A)
4243325
610307229/30/1 CML-R
500
47
0
CY7C67300 (7C67300A)
4243325
610307229/30/1 CML-R
1000
47
0
Failure Mechanism