CY2309NZ
Nine-Output 3.3 V Buffer
Nine-Output 3.3 V Buffer
Features
Functional Description
■
One-input to nine-output buffer/driver
■
Supports two DIMMs or four SO-DIMMs with one additional
output for feedback to an external or chipset phase-locked loop
(PLL)
■
Low power consumption for mobile applications
❐ Less than 32 mA at 66.6 MHz with unloaded outputs
■
1-ns input-output delay
■
Buffers all frequencies from 2 MHz to 133.33 MHz
■
Output-output skew less than 250 ps
■
Multiple VDD and VSS pins for noise and electromagnetic
interference (EMI) reduction
■
Space-saving 16-pin 150-mil small-outline integrated circuit
(SOIC) package
■
3.3-V operation
■
Industrial temperature available
The CY2309NZ is a low-cost buffer designed to distribute
high-speed clocks in mobile PC systems and desktop PC
systems with SDRAM support. The part has nine outputs, eight
of which can be used to drive two DIMMs or four SO-DIMMs, and
the remaining can be used for external feedback to a PLL. The
device operates at 3.3 V and outputs can run up to 133.33 MHz.
The CY2309NZ is designed for low EMI and power optimization.
It has multiple VSS and VDD pins for noise optimization and
consumes less than 32 mA at 66.6 MHz, making it ideal for the
low-power requirements of mobile systems. It is available in an
ultra-compact 150-mil 16-pin SOIC package.
For a complete list of related documentation, click here.
Logic Block Diagram
BUF_IN
OUTPUT1
OUTPUT2
OUTPUT3
OUTPUT4
OUTPUT5
OUTPUT6
OUTPUT7
OUTPUT8
OUTPUT9
Cypress Semiconductor Corporation
Document Number: 38-07182 Rev. *L
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised May 5, 2016
CY2309NZ
Contents
Pinouts .............................................................................. 3
Pin Descriptions ............................................................... 3
Maximum Ratings ............................................................. 4
Operating Conditions ....................................................... 4
Electrical Characteristics ................................................. 4
Switching Characteristics ................................................ 5
Switching Waveforms ...................................................... 6
Test Circuits ...................................................................... 6
Ordering Information ........................................................ 7
Ordering Code Definitions ........................................... 7
Package Diagram .............................................................. 8
Document Number: 38-07182 Rev. *L
Acronyms .......................................................................... 9
Document Conventions ................................................... 9
Units of Measure ......................................................... 9
Document History Page ................................................. 10
Sales, Solutions, and Legal Information ...................... 11
Worldwide Sales and Design Support ....................... 11
Products .................................................................... 11
PSoC® Solutions ...................................................... 11
Cypress Developer Community ................................. 11
Technical Support ..................................................... 11
Page 2 of 11
CY2309NZ
Pinout
Figure 1. 16-pin SOIC Pinout (Top View)
BUF_IN
OUTPUT1
1
16
2
15
OUTPUT2
VDD
3
14
4
13
GND
OUTPUT3
OUTPUT4
VDD
5
12
6
11
7
10
8
9
OUTPUT9
OUTPUT8
OUTPUT7
VDD
GND
OUTPUT6
OUTPUT5
GND
Pin Descriptions
Pin
Signal
4, 8, 13
VDD
3.3-V digital voltage supply
Description
5, 9, 12
GND
Ground
1
BUF_IN
2, 3, 6, 7, 10,
11, 14, 15, 16
OUTPUT [1:9]
Input clock
Outputs
Document Number: 38-07182 Rev. *L
Page 3 of 11
CY2309NZ
Maximum Ratings
Storage temperature ................................ –65 °C to +150 °C
Supply voltage to ground potential ..............–0.5 V to +7.0 V
DC input voltage ............................................–0.5 V to 7.0 V
Junction temperature ................................................ 150 °C
Static discharge voltage
(per MIL-STD-883, Method 3015) .......................... >2,000 V
Operating Conditions
For commercial and industrial temperature devices
Parameter
Description
Min
Max
Unit
3.0
3.6
V
0
70
°C
–40
85
°C
Load capacitance, Fout < 100 MHz
–
30
pF
Load capacitance,100 MHz < Fout < 133.33 MHz
–
15
pF
Input capacitance
–
7
pF
2
133.33
MHz
0.05
50
ms
VDD
Supply voltage
TA
(Ambient operating temperature) commercial
(Ambient operating temperature) industrial
CL
CIN
BUF_IN,
Operating frequency
OUTPUT [1:9]
tPU
Power-up time for all VDDs to reach minimum specified voltage (power ramps must
be monotonic)
Electrical Characteristics
For commercial and industrial temperature devices
Parameter
Min
Max
Unit
Input LOW voltage
[1]
–
0.8
V
VIH
Input HIGH voltage
[1]
2.0
–
V
IIL
Input LOW current
VIN = 0 V
–
50.0
A
IIH
Input HIGH current
VIN = VDD
–
100.0
A
IOL = 8 mA
–
0.4
V
2.4
–
V
–
32
mA
VIL
Description
[2]
Test Conditions
VOL
Output LOW voltage
VOH
Output HIGH voltage [2]
IOH = –8 mA
IDD
Supply current
Unloaded outputs at 66.66 MHz
Thermal Resistance
Parameter [3]
Description
θJA
Thermal resistance
(junction to ambient)
θJC
Thermal resistance
(junction to case)
Test Conditions
16-pin SOIC
Unit
Test conditions follow standard test methods and
procedures for measuring thermal impedance, in
accordance with EIA/JESD51.
111
°C/W
60
°C/W
Notes
1. BUF_IN input has a threshold voltage of VDD/2.
2. Parameter is guaranteed by design and characterization. It is not 100% tested in production.
3. These parameters are guaranteed by design and are not tested.
Document Number: 38-07182 Rev. *L
Page 4 of 11
CY2309NZ
Switching Characteristics
For commercial and industrial temperature devices [4]
Parameter
Description
[5]
Duty cycle
t3
t4
Condition
Min
Typ
Max
Unit
40.0
50.0
60.0
%
Measured between 0.8 V and 2.0 V
–
–
1.50
ns
Measured between 0.8 V and 2.0 V
–
–
1.50
ns
All outputs equally loaded
–
–
250
ps
Measured at VDD/2
1
5
9.2
ns
Measured at 1.4 V
= t2 t1
[5]
Rise time
[5]
Fall time
[5]
t5
Output to output skew
t6
Propagation delay,
BUF_IN Rising edge to
Output Rising edge[5]
Notes
4. All parameters specified with loaded outputs.
5. Parameter is guaranteed by design and characterization. It is not 100% tested in production.
Document Number: 38-07182 Rev. *L
Page 5 of 11
CY2309NZ
Switching Waveforms
Figure 2. Duty Cycle Timing
t1
t2
1.4 V
1.4 V
1.4 V
Figure 3. All Outputs Rise/Fall Time
OUTPUT
2.0 V
0.8 V
3.3 V
2.0 V
0.8 V
0V
t4
t3
Figure 4. Output-Output Skew
1.4 V
OUTPUT
1.4 V
OUTPUT
t5
Figure 5. Input-Output Propagation Delay
VDD/2
INPUT
VDD/2
OUTPUT
t6
Test Circuits
Figure 6. Test Circuits
VDD
0.1 F
Output
CLK out
C LOAD
VDD
0.1 F
Document Number: 38-07182 Rev. *L
GND
GND
Page 6 of 11
CY2309NZ
Ordering Information
Ordering Code
Package Type
Operating Range
Pb-free
CY2309NZSXC-1H
16-pin SOIC (150 Mils)
Commercial
CY2309NZSXC-1HT
16-pin SOIC (150 Mils) – Tape and Reel
Commercial
CY2309NZSXI-1H
16-pin SOIC (150 Mils)
Industrial
CY2309NZSXI-1HT
16-pin SOIC (150 Mils) – Tape and Reel
Industrial
Ordering Code Definitions
CY
2309 NZ
S
X
X - 1H X
X = blank or T
blank = Tube; T = Tape and Reel
High Output Drive Strength
Temperature Grade: X = C or I
C = Commercial; I = Industrial
Pb-free
Package Type:
S = 16-pin SOIC
Non Zero Delay Buffer
Base Part Number
Company ID: CY = Cypress
Document Number: 38-07182 Rev. *L
Page 7 of 11
CY2309NZ
Package Diagram
Figure 7. 16-pin SOIC (150 Mils) S16.15/SZ16.15 Package Outline, 51-85068
51-85068 *E
Document Number: 38-07182 Rev. *L
Page 8 of 11
CY2309NZ
Acronyms
Acronym
Document Conventions
Description
EMI
Electromagnetic Interference
PLL
Phase-Locked Loop
SOIC
Small-Outline Integrated Circuit
Document Number: 38-07182 Rev. *L
Units of Measure
Symbol
Unit of Measure
°C
degrees Celsius
MHz
megahertz
A
microampere
mA
milliampere
ms
millisecond
mV
millivolt
ns
nanosecond
pF
picofarad
V
volt
Page 9 of 11
CY2309NZ
Document History Page
Document Title: CY2309NZ, Nine-Output 3.3 V Buffer
Document Number: 38-07182
Rev.
ECN
Orig. of
Change
Submission
Date
**
111858
DSG
12/09/01
Description of Change
Change from Spec number: 38-00709 to 38-07182
*A
121834
RBI
12/14/02
Power-up requirements added to Operating Conditions Information
*B
130563
SDR
10/23/03
Added industrial operating temperature to operating conditions
*C
212991
RGL / GGK
03/30/04
Updated the propagation delay T6 spec to 9.2 ns in the Switching
Characteristics table
*D
270149
RGL
10/04/04
Added Lead-free devices
Replaced 8.7 ns Input/Output Delay to 1 ns Input/Output Delaying the features
section
*E
2568533
AESA
09/23/08
Changed “SDRAM [1:9]” to “OUTPUT [1:9]” in Operating Conditions table.
Removed part number CY2309NZSI-1H and CY2309NZSI-1HT.
Added Note “Not recommended for new designs.”
Updated to new template.
*F
2904715
CXQ
04/05/10
Updated Ordering Information:
Removed parts CY2309NZSC-1H, CY2309NZSC-1HT.
Updated Package Diagram.
*G
3082147
CXQ
11/10/2010
Updated Maximum Ratings:
Changed the following from:
“DC Input Voltage (Except REF) ............ –0.5 V to VDD + 0.5 V”
“DC Input Voltage REF .........................................–0.5 V to 7.0 V”
to:
“DC Input Voltage .........................................–0.5 V to 7.0 V”
Updated footnotes
Added Ordering Code Definitions.
Added Acronyms and Units of Measure.
Updated to new template.
*H
4201460
CINM
11/25/2013
Updated Package Diagram:
spec 51-85068 – Changed revision from *C to *E.
Updated to new template.
Completing Sunset Review.
*I
4578443
TAVA
11/25/2014
Updated Functional Description:
Added “For a complete list of related documentation, click here.” at the end.
*J
4715451
XHT
04/10/2015
Updated Operating Conditions:
Updated minimum value of BUF_IN, OUTPUT [1:9] parameter as 5 MHz.
*K
4743611
TAVA
04/27/2015
Updated Operating Conditions:
Changed minimum value of BUF_IN, OUTPUT [1:9] parameter from 5 MHz to
2 MHz.
Updated to new template.
*L
5260404
PSR
05/05/2016
Added Thermal Resistance.
Updated to new template.
Document Number: 38-07182 Rev. *L
Page 10 of 11
CY2309NZ
Sales, Solutions, and Legal Information
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closest to you, visit us at Cypress Locations.
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© Cypress Semiconductor Corporation, 2001-2016. This document is the property of Cypress Semiconductor Corporation and its subsidiaries, including Spansion LLC ("Cypress"). This document,
including any software or firmware included or referenced in this document ("Software"), is owned by Cypress under the intellectual property laws and treaties of the United States and other countries
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Document Number: 38-07182 Rev. *L
Revised May 5, 2016
Page 11 of 11