031102%20rev4.0.R8LD.1.8.pdf

Cypress Semiconductor
Technology Qualification Report
QTP# 031102 VERSION 4.0
June 2004
R8LD-1.8 Technology, Fab4
High Performance Static SRAM
CY62155DV-2XWI
CY62155DV18
CY62157DV
CY62157DV18
CY62157DV20
CY62157DV18 MoBL2™
CY62157DV20 MoBL2™
8M (512K x 16)
Static RAM
MoBL2™ and More Battery Life™ is trademark of Cypress Semiconductor
CYPRESS TECHNICAL CONTACT FOR QUALIFICATION DATA:
Rene Rodgers
Principal Reliability Engineer
(408) 943-2732
Cypress Semiconductor
8Meg, MoBL2, Static SRAM
Device CY62155DV*, R8LD-1.8, Fab 4
QTP # 031102 V, 4.0
Page 2 of 10
June 2004
TECHNOLOGY QUALIFICATION HISTORY
Qual
Report
Description of Qualification Purpose
Date
Comp
031102
New Technology R8LD-1.8V / New Device, 8Meg, MoBL Static RAM CY62155DV* and family
Mar 03
030502
MM2E New Process/Recipe for CY62155DV* and family, R8LD-1.8 Technology
July 03
031806
Polyimide Process change (HD8000) on Ram8 Wafers
Apr 04
Cypress Semiconductor
8Meg, MoBL2, Static SRAM
Device CY62155DV*, R8LD-1.8, Fab 4
QTP # 031102 V, 4.0
Page 3 of 10
June 2004
PRODUCT DESCRIPTION (for qualification)
Qualification Purpose: Qualify New MM2E Recipe for R8LD-1.8V, Fab 4 on CY62155DV* device and family.
Marketing Part #:
CY62155DV*, CY62157DV, CY62157DV18, CY62157DV20
Device Description:
1.65V – 2.2V, Industrial available in 48-ball FBGA package.
Cypress Division:
Cypress Semiconductor Corporation –Memory Product Division (MPD)
Overall Die (or Mask) REV Level (pre-requisite for qualification):
Rev. D
What ID markings on Die: 7C62355D
TECHNOLOGY/FAB PROCESS DESCRIPTION – RAM8LD-1.8
Number of Metal Layers:
2
Metal
Metal 1: Ti 100 Å, Al 3200 Å, TiW 300 Å
Composition: Metal 2: Ti 300 Å, Al 8000 Å 0.5% Cu, TiW 300 Å
Passivation Type and Materials:
1000Å TEOS / 9000Å Si3N4
Free Phosphorus contents in top glass layer(%):
N/A
Number of Transistors in Device
~48million
Number of Gates in Device
~48 million
Generic Process Technology/Design Rule (µ-drawn):
CMOS Double Metal/0.13 µm
Gate Oxide Material/Thickness (MOS):
32Å
Name/Location of Die Fab (prime) Facility:
Cypress Semiconductor -- Bloomington, MN
Die Fab Line ID/Wafer Process ID:
Fab4/RAM8NLD-1.8V
PACKAGE AVAILABILITY
PACKAGE
48-ball FBGA
ASSEMBLY SITE FACILITY
TAIWN-G
Note: Package Qualification details upon request
Cypress Semiconductor
8Meg, MoBL2, Static SRAM
Device CY62155DV*, R8LD-1.8, Fab 4
QTP # 031102 V, 4.0
Page 4 of 10
June 2004
MAJOR PACKAGE INFORMATION USED IN THIS QUALIFICATION
Package Designation:
Package Outline, Type, or Name:
Mold Compound Name/Manufacturer:
Mold Compound Flammability Rating:
BA48
48-ball Fine Pitch Ball Grid Array (FBGA)
PLASKON SMT-B1-LAS
V-O per UL94
Oxygen Rating Index:
>28%
Substrate Material:
BT Resin
Lead Finish, Composition / Thickness:
Solder Ball, 63%Sn, 37%Pb
Die Backside Preparation Method/Metallization:
N/A
Die Separation Method:
Wafer Saw
Die Attach Supplier:
Ablestik
Die Attach Material:
Ablestik 8355F
Die Attach Method:
Epoxy
Bond Diagram Designation:
10-04689
Wire Bond Method:
Thermosonic
Wire Material/Size:
Au, 1.0um
Thermal Resistance Theta JA °C/W:
55°C/W
Package Cross Section Yes/No:
N/A
Assembly Process Flow:
49-41020
Name/Location of Assembly (prime) facility:
ASE Taiwan
ELECTRICAL TEST / FINISH DESCRIPTION
Test Location:
USA-C, CML-R
Fault Coverage:
100%
Cypress Semiconductor
8Meg, MoBL2, Static SRAM
Device CY62155DV*, R8LD-1.8, Fab 4
QTP # 031102 V, 4.0
Page 5 of 10
June 2004
RELIABILITY TESTS PERFORMED PER SPECIFICATION REQUIREMENT
Stress/Test
Test Condition
(Temp/Bias)
Result
P/F
Dynamic Operating Condition, Vcc Max = 2.4V, 125°C
P
Dynamic Operating Condition, Vcc Max = 2.4V, 150°C
P
High Temperature Steady State Life
Static Operating Condition, Vcc Max = 2.2V, 150°C
P
High Accelerated Saturation Test
(HAST)
130°C, 2.2V,85%RH
Precondition: JESD22 Moisture Sensitivity MSL 3
P
High Temperature Operating Life
Early Failure Rate
High Temperature Operating Life
Latent Failure Rate
192 Hrs, 30C/60%RH+3IR-Reflow, 235°C+5, 0°C
Temperature Cycle
MIL-STD-883C, Method 1010, Condition C, -65°C to 150°C
Precondition: JESD22 Moisture Sensitivity MSL3
P
192 Hrs, 30C/60%RH+3IR-Reflow, 235°C+5, 0°C
Pressure Cooker
121°C, 100%RH
Precondition: JESD22 Moisture Sensitivity MSL 3
P
192 Hrs, 30C/60%RH+3IR-Reflow, 235°C+5, 0°C
High Temperature Storage
150°C ± 5°C no bias
Electrostatic Discharge
Human Body Model (ESD-HBM)
2,200V
Age Bond Strength
200C, 4HRS
MIL-STD-883, Method 3015.7
P
P
P
MIL-STD-883, Method 883-2011
Low Temperature Operating Life
-30C, 2.35V, 8MHZ
P
Acoustic Microscopy, MSL 3
Cypress Spec. 25-00104
P
Dynamic Latch-up
125C, 3.55V
P
Static Latch-up
125C, 6.5V, ± 300mA
P
In accordance with JEDEC 17. Cypress Spec. 01-00081
Cypress Semiconductor
8Meg, MoBL2, Static SRAM
Device CY62155DV*, R8LD-1.8, Fab 4
QTP # 031102 V, 4.0
Page 6 of 10
June 2004
RELIABILITY FAILURE RATE SUMMARY
Stress/Test
High Temperature Operating Life
Early Failure Rate
High Temperature Operating Life1,2,
Long Term Failure Rate
1
2
3
Device Tested/
Device Hours
#
Fails
Activation
Energy
Thermal
AF4
Failure Rate
16,244
2
N/A
N/A
123 PPM
573,280 DHRs
0
0.7
170
9 FIT
Assuming an ambient temperature of 55°C and a junction temperature rise of 15°C.
Chi-squared 60% estimations used to calculate the failure rate.
Thermal Acceleration Factor is calculated from the Arrhenius equation
E  1 1  
AF = exp  A  -  
 k  T 2 T1  
where:
EA =The Activation Energy of the defect mechanism.
k = Boltzmann's constant = 8.62x10-5 eV/Kelvin.
T1 is the junction temperature of the device under stress and T2 is the junction temperature of the device
at use conditions.
Cypress Semiconductor
8Meg, MoBL2, Static SRAM
Device CY62155DV*, R8LD-1.8, Fab 4
QTP # 031102 V, 4.0
Page 7 of 10
June 2004
Reliability Test Data
QTP #:
Device
Fab Lot #
Assy Lot #
031102
Ass Loc
Duration Samp
Rej
Failure Mechanism
STRESS: ACOUSTIC-MSL3
CY62157DV20 (7C62357D)
4151609
610205573N
TAIWN-G
COMP
20
0
CY62157DV20 (7C62357D)
4205767
610210027
TAIWN-G
COMP
20
0
CY62157DV20 (7C62357D)
4210625
610216786N1
TAIWN-G
COMP
20
0
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 125C, 2.4V, Vcc Max
CY62157DV20 (7C62357D)
4247883
610303398
TAIWN-G
96
1390
0
CY62157DV20 (7C62357D)
4230988
610240982N
TAIWN-G
96
1191
0
CY62157DV20 (7C62357D)
4151609
610205573N
TAIWN-G
72
1109
0
CY62157DV20 (7C62357D)
4205767
610210027
TAIWN-G
72
8581
CY62157DV20 (7C62357D)
4210625
610216786N1
TAIWN-G
72
1103
1
CY62157DV20 (7C62357D)
4214343
610221185
TAIWN-G
72
834
0
POLY PARTICLE
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 150C, 2.4V, Vcc Max
CY62157DV20 (7C62357D)
4222101
610234320
TAIWN-G
80
416
0
CY62157DV20 (7C62357D)
4222101
610234320
TAIWN-G
500
383
0
CY62157DV20 (7C62357D)
4230988
610240982N
TAIWN-G
80
418
0
CY62157DV20 (7C62357D)
4230988
610240982N
TAIWN-G
500
415
0
CY62157DV20 (7C62357D)
4214343
610221185
TAIWN-G
80
410
0
CY62157DV20 (7C62357D)
4214343
610221185
TAIWN-G
500
330
0
STRESS: HIGH TEMP STEADY STATE LIFE TEST, 150C, 2.2V, Vcc MAX
CY62157DV20 (7C62357D)
4151609
610205573N
TAIWN-G
80
80
0
CY62157DV20 (7C62357D)
4151609
610205573N
TAIWN-G
180
74
0
STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2,200V
CY62157DV20 (7C62357D)
4151609
610205573
TAIWN-G
COMP
9
0
CY62157DV20 (7C62357D)
4205767
610210027
TAIWN-G
COMP
9
0
CY62157DV20 (7C62357D)
4210625
610216786
TAIWN-G
COMP
9
0
CY62157DV20 (7C62357D)
4215571
610222767N
TAIWN-G
COMP
9
0
CY62157DV20 (7C62357D)
4216781
610223553
TAIWN-G
COMP
9
0
STRESS: ESD-CHARGE DEVICE MODEL, 500V
CY62157DV20 (7C62357D)
4215571
610222767N
TAIWN-G
COMP
9
0
CY62157DV20 (7C62357D)
4214343
610221278
TAIWN-G
COMP
9
0
CY62157DV20 (7C62357D)
4216781
610223553
TAIWN-G
COMP
9
0
TAIWN-G
COMP
3
0
STRESS: DYNAMIC LATCH-UP TESTING, 125C, 3.55V
CY62157DV20 (7C62357D)
4205767
610210027
NON-VISUAL
Cypress Semiconductor
8Meg, MoBL2, Static SRAM
Device CY62155DV*, R8LD-1.8, Fab 4
QTP # 031102 V, 4.0
Page 8 of 10
June 2004
Reliability Test Data
QTP #:
Device
Fab Lot #
Assy Lot #
031102
Ass Loc
Duration
Samp
Rej
STRESS: STATIC LATCH-UP TESTING, 125C, 6.5V, ±300mA
CY62157DV20 (7C62357D)
4151609
610205573
TAIWN-G
COMP
3
0
CY62157DV20 (7C62357D)
4205767
610210027
TAIWN-G
COMP
3
0
CY62157DV20 (7C62357D)
4210625
610216786
TAIWN-G
COMP
3
0
TAIWN-G
500
50
0
STRESS: LOW TEMPERATURE OPERATING LIFE, -30C, 2.35V
CY62157DV20 (7C62357D)
STRESS:
4151609
610205573
HIGH TEMPERATURE STORAGE, 150C
CY62157DV20 (7C62357D)
4151609
610205573N
TAIWN-G
500
50
0
CY62157DV20 (7C62357D)
4151609
610205573N
TAIWN-G
1000
50
0
STRESS: AGE BOND STRENGTH
CY62157DV20 (7C62357D)
4151609
610205573
TAIWN-G
COMP
5
0
CY62157DV20 (7C62357D)
4205767
610210027
TAIWN-G
COMP
5
0
CY62157DV20 (7C62357D)
4210625
610216786
TAIWN-G
COMP
5
0
STRESS: PRESSURE COOKER TEST, 121C, 100%RH, PRE COND 192 HR 30C/60%RH, MSL3
CY62157DV20 (7C62357D)
4151609
610205573N
TAIWN-G
176
50
0
CY62157DV20 (7C62357D)
4205767
610210027
TAIWN-G
176
50
0
CY62157DV20 (7C62357D)
4210625
610216786N1
TAIWN-G
168
50
0
STRESS: HI-ACCEL SATURATION TEST, 130C, 85%RH, 1.98V, PRE COND 192 HR 30C/60%RH, MSL3
CY62157DV20 (7C62357D)
4151609
610205573
TAIWN-G
128
50
0
CY62157DV20 (7C62357D)
4205767
610210027
TAIWN-G
128
48
0
CY62157DV20 (7C62357D)
4210625
610216786
TAIWN-G
128
59
0
STRESS: TC COND. C -65C TO 150C, PRECONDITION 192 HRS 30C/60%RH, MSL3
CY62157DV20 (7C62357D)
4151609
610205573N
TAIWN-G
300
40
0
CY62157DV20 (7C62357D)
4205767
610210027
TAIWN-G
300
50
0
CY62157DV20 (7C62357D)
4210625
610216786N1
TAIWN-G
300
50
0
Failure Mechanism
Cypress Semiconductor
8Meg, MoBL2, Static SRAM
Device CY62155DV*, R8LD-1.8, Fab 4
QTP # 031102 V, 4.0
Page 9 of 10
June 2004
Reliability Test Data
QTP #:
Device
Fab Lot #
Assy Lot #
Ass Loc
030502
Duration
Samp
Rej
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 125C, 2.4V, Vcc Max
CY62157DV20 (7C62357D)
4246699
610306905
TAIWN-G
168
2338
0
CY62157DV20 (7C62357D)
4246699
610306904
TAIWN-G
168
2348
0
CY62157DV20 (7C62357D)
4246700
610310110
TAIWN-G
168
2490
0
CY62157DV20 (7C62357D)
4246700
610310111
TAIWN-G
168
2583
0
STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2,200V
CY62157DV20 (7C62357D)
4246700
610310110
TAIWN-G
COMP
9
0
CY62157DV20 (7C62357D)
4246700
610310111
TAIWN-G
COMP
9
0
Failure Mechanism
Cypress Semiconductor
8Meg, MoBL2, Static SRAM
Device CY62155DV*, R8LD-1.8, Fab 4
QTP # 031102 V, 4.0
Page 10 of 10
June 2004
Reliability Test Data
QTP #:
Device
Fab Lot #
Assy Lot #
Ass Loc
4314972
610337825
TAIWN-G
CY62157DV18LL (7R62357D)
4316374
610328357
CY62157DV18LL (7R62357D)
4316374
CY62157DV18LL (7R62357D)
031806
Duration
Samp
Rej
COMP
15
0
TAIWN-G
COMP
10
0
610328358
TAIWN-G
COMP
10
0
4313929
610328359
TAIWN-G
COMP
10
0
CY62157DV18LL (7R62357D)
4316374
610328357
TAIWN-G
COMP
10
0
CY62157DV18LL (7R62357D)
4316374
610328358
TAIWN-G
COMP
10
0
CY62157DV18LL (7R62357D)
4313929
610328359
TAIWN-G
COMP
10
0
CY62157DV18LL (7R62357D)
4316374
610328357
TAIWN-G
COMP
5
0
CY62157DV18LL (7R62357D)
4313929
610328359
TAIWN-G
COMP
5
0
STRESS: ACOUSTIC, MSL3
CY62167DV30LL (7C62167D)
STRESS: BALL SHEAR
STRESS: BOND PULL
STRESS: INTERNAL VISUAL
STRESS: HI-ACCEL SATURATION TEST, 130C, 85%RH, 3.6V, PRE COND 192 HR 30C/60%RH, MSL3
CY62167DV30LL (7C62167D)
4314972
610337825
TAIWN-G
128
48
0
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 125C, 2.4V, Vcc Max
CY62157DV18LL (7R62357D)
4316374
610328357
TAIWN-G
96
2211
0
STRESS: PRESSURE COOKER TEST, 121C, 100%RH, PRE COND 192 HR 30C/60%RH, MSL3
CY62157DV18LL (7R62357D)
4337530
610356013
TAIWN-G
168
49
0
CY62157DV18LL (7R62357D)
4337530
610356014
TAIWN-G
168
48
0
CY62167DV30LL (7C62167D)
4314972
610337825
TAIWN-G
168
50
0
STRESS: TC COND. C -65C TO 150C, PRECONDITION 192 HRS 30C/60%RH, MSL3
CY62157DV18LL (7R62357D)
4337530
610356013
TAIWN-G
300
48
0
CY62157DV18LL (7R62357D)
4337530
610356013
TAIWN-G
500
47
0
CY62157DV18LL (7R62357D)
4337530
610356013
TAIWN-G
1000
46
0
CY62157DV18LL (7R62357D)
4337530
610356014
TAIWN-G
300
46
0
CY62157DV18LL (7R62357D)
4337530
610356014
TAIWN-G
500
46
0
CY62157DV18LL (7R62357D)
4337530
610356014
TAIWN-G
1000
46
0
CY62167DV30LL (7C62167D)
4314972
610337825
TAIWN-G
300
50
0
CY62167DV30LL (7C62167D)
4314972
610337825
TAIWN-G
500
48
0
CY62167DV30LL (7C62167D)
4314972
610337825
TAIWN-G
1000
48
0
Failure Mechanism