Cypress Semiconductor Product Qualification Report QTP# 071210 VERSION 1.1 February 2008 Automotive PSoC™ Mixed Signal Array Family “A” Grade Pb-Free S4AD-5CTI, Fab 2 CY8C21334 CY8C21534 Mixed Signal Array with On-Chip Controller CYPRESS TECHNICAL CONTACT FOR QUALIFICATION DATA: Fredrick Whitwer Principal Reliability Engineer (408) 943-2722 Mira Ben-Tzur Quality Engineering Director (408) 943-2675 Cypress Semiconductor “A” Grade Pb-Free Automotive PSoC™ Mixed-Signal Array Family, S4AD-5CTI, Fab 2 Device: CY8C21x34 071210 V.1.1 Page 2 of 9 February 2008 PRODUCT QUALIFICATION HISTORY Qual Report Description of Qualification Purpose Date Comp 042702 Qualify Automotive PSoC 8C27243/443/643 Product Family on S4AD-5CTI Technology, Fab2 Nov 04 071210 Qualify PSoC Device 8C21x34 in “A” Grade Pb-Free Automotive Application Feb 08 Cypress Semiconductor “A” Grade Pb-Free Automotive PSoC™ Mixed-Signal Array Family, S4AD-5CTI, Fab 2 Device: CY8C21x34 071210 V.1.1 Page 3 of 9 February 2008 PRODUCT DESCRIPTION (for qualification) Qualification Purpose: Qualify CY8C2xxxx Product Family in S4AD-5CTI in Fab 2 using “A” Grade Pb-Free for Automotive Application Marketing Part #: CY8C21334, CY8C21534 Device Description: 3.3V, Automotive, 24MHz Programmable System on Chip available on 20/28-Lead SSOP Packages Cypress Division: Consumer and Computation Division (CCD) TECHNOLOGY/FAB PROCESS DESCRIPTION Number of Metal Layers: 2 Metal Composition: S4AD-5CTI Metal 1: 500A Ti/6000A Al 0.5% Cu /1200A TiW Metal 2: 500A Ti/8000A Al 0.5% Cu/300A TiW Passivation Type and Materials: 3,000A TeOs / 6000A Si3N4 Generic Process Technology/Design Rule ( -drawn): Single Poly, Double Metal, 0.35 um Gate Oxide Material/Thickness (MOS): SiO2 / 110A Name/Location of Die Fab (prime) Facility: Cypress Semiconductor - Round Rock, TX Die Fab Line ID/Wafer Process ID: Fab2, S4AD-5CTI SONOS PACKAGE AVAILABILITY PACKAGE 20/28-Lead SSOP ASSEMBLY SITE FACILITY Amkor Philippines Note: Package Qualification details upon request. Cypress Semiconductor “A” Grade Pb-Free Automotive PSoC™ Mixed-Signal Array Family, S4AD-5CTI, Fab 2 Device: CY8C21x34 MAJOR PACKAGE INFORMATION USED IN THIS QUALIFICATION Package Designation: Package Outline, Type, or Name: Mold Compound Name/Manufacturer: Mold Compound Flammability Rating: SP28 28-Lead Shrunk Small Outline Packages (SSOP) EME-G600 / Sumitomo V-O per UL94 Oxygen Rating Index: N/A Lead Frame Material: Copper Lead Finish, Composition / Thickness: Ni-Pd-Au Die Backside Preparation Method/Metallization: Backgrind Die Separation Method: Sawing 100% Die Attach Supplier: Ablestik Die Attach Material: Ablebond 8290 Die Attach Method: Dispensed Epoxy Bond Diagram Designation: 10-05678 Wire Bond Method: Thermosonic Wire Material/Size: Au. 1.0mil Thermal Resistance Theta JA °C/W: 90 °C/W Package Cross Section Yes/No: N/A Assembly Process Flow: 001-09888 Name/Location of Assembly (prime) facility: Amkor Philippines (M) MSL Level 3 Reflow Profile 260C ELECTRICAL TEST / FINISH DESCRIPTION Test Location: CML-R Note: Please contact a Cypress Representative for other packages availability. 071210 V.1.1 Page 4 of 9 February 2008 Cypress Semiconductor “A” Grade Pb-Free Automotive PSoC™ Mixed-Signal Array Family, S4AD-5CTI, Fab 2 Device: CY8C21x34 071210 V.1.1 Page 5 of 9 February 2008 RELIABILITY TESTS PERFORMED PER SPECIFICATION REQUIREMENT Stress/Test Test Condition (Temp/Bias) Result P/F Dynamic Operating Condition, Vcc Max=5.5V, 125°C AEC-Q100-008 and JESD22-A108 P Dynamic Operating Condition, Vcc Max=5.5V, 125°C AEC-Q100-008 and JESD22-A108 P JESD22-A104, Condition C, -65°C to 150°C Precondition: JESD22 Moisture Sensitivity MSL 1 168 Hrs, 85C/85%RH+3IR-Reflow, 260°C+0, -5°C JESD22-A102, 121°C, 100%RH, 15 Psig Precondition: JESD22 Moisture Sensitivity MSL 1 168 Hrs, 85C/85%RH+3IR-Reflow, 260°C+0, -5°C P High Accelerated Saturation Test (HAST) JESD22-A110, 130°C, 5.5V, 85%RH Precondition: JESD22 Moisture Sensitivity MSL 1 168 Hrs, 85C/85%RH+3IR-Reflow, 260°C+0, -5°C P Data Retention 150°C ± 5°C no bias P High Temperature Operating Life Early Failure Rate High Temperature Operating Life Latent Failure Rate Temperature Cycle Pressure Cooker Electrostatic Discharge Body Model (ESD-HBM) Human AEC-Q100-002 P P Electrostatic Discharge Charge Device Model (ESD-CDM) AEC-Q100-011 P Acoustic Microscopy Cypress Spec. 25-00104 P Endurance Test AEC-Q100-005 P Static Latchup Sensitivity AEC-Q100-004 P Ball Shear AEC-Q100-010 P Bond Pull Mil-Std 883, Method 2011 P Electrical Distribution AEC Q100-009 P External Visual JESD22-B100 P Physical Dimensions AEC Q100-009 P High Temperature Storage 150°C ± 5°C, no bias P Solderability JESD22-B102 P Post Temp Cycle Bond Pull Mil-Std 883, Method 2011 P Cypress Semiconductor “A” Grade Pb-Free Automotive PSoC™ Mixed-Signal Array Family, S4AD-5CTI, Fab 2 Device: CY8C21x34 071210 V.1.1 Page 6 of 9 February 2008 RELIABILITY FAILURE RATE SUMMARY Device Tested/ Device Hours # Fails Activation Energy Thermal3 A.F Failure Rate High Temperature Operating Life Early Failure Rate @125C 2,130 Devices 0 N/A N/A 0 PPM High Temperature Operating Life1,2 Long Term Failure Rate 232,000 DHRs 0 0 .7 55 71 FITs * Stress/Test 1 2 3 Assuming an ambient temperature of 55°C and a junction temperature rise of 15°C. Chi-squared 60% estimations used to calculate the failure rate. Thermal Acceleration Factor is calculated from the Arrhenius equation ⎡E ⎡ 1 1 ⎤ ⎤ AF = exp ⎢ A ⎢ - ⎥ ⎥ ⎣ k ⎣ T 2 T1 ⎦ ⎦ where: EA =The Activation Energy of the defect mechanism. k = Boltzmann's constant = 8.62x10-5 eV/Kelvin. T1 is the junction temperature of the device under stress and T2 is the junction temperature of the device at use conditions. * Based on Automotive qual samples size not Commercial qual sample size. Cypress Semiconductor “A” Grade Pb-Free Automotive PSoC™ Mixed-Signal Array Family, S4AD-5CTI, Fab 2 Device: CY8C21x34 071210 V.1.1 Page 7 of 9 February 2008 Reliability Test Data QTP #: Device Fab Lot # Assy Lot # Assy Loc 042702 Duration Samp Rej Failure Mechanism STRESS: HI-ACCEL SATURATION TEST, 130C, 85%RH, 5.5V, PRE COND 168 HR 85C/85%RH, MSL1 CY8C27443 (8C27443B) 2403330 610438921 TAIWAN-T 96 85 0 CY8C27443 (8C27443B) 2403330 610438921 TAIWAN-T 128 50 0 CY8C27443 (8C27443B) 2405478 610438920 TAIWAN-T 96 84 0 CY8C27443 (8C27443B) 2405478 610438920 TAIWAN-T 128 84 0 CY8C27443 (8C27443B) 2414285 610438918 TAIWAN-T 96 85 0 CY8C27443 (8C27443B) 2414285 610438918 TAIWAN-T 128 85 0 STRESS: PRESSURE COOKER TEST, 121C, 100%RH, 15 Psig, PRE COND 168 HR 85C/85%RH, MSL1 CY8C27443 (8C27443B) 2403330 610438921 TAIWAN-T 96 85 0 CY8C27443 (8C27443B) 2403330 610438921 TAIWAN-T 168 85 0 CY8C27443 (8C27443B) 2405478 610438920 TAIWAN-T 96 85 0 CY8C27443 (8C27443B) 2405478 610438920 TAIWAN-T 168 85 0 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 125C, 5.5V, Vcc Max CY8C27443 (8C27443B) 2403330 610438921 TAIWAN-T 48 854 0 CY8C27443 (8C27443B) 2405478 610438920 TAIWAN-T 48 856 0 CY8C27443 (8C27443B) 2414285 610438918 TAIWAN-T 48 420 0 STRESS: DATA RETENTION CY8C27443 (8C27443B) 2403330 610438921 TAIWAN-T 1000 92 0 CY8C27443 (8C27443B) 2405478 610438920 TAIWAN-T 1000 94 0 CY8C27443 (8C27443B) 2414285 610438918 TAIWAN-T 1000 94 0 STRESS: ENDURANCE LIFE TEST CY8C27443 (8C27443B) 2403330 610438921 TAIWAN-T 1000 84 0 CY8C27443 (8C27443B) 2405478 610438920 TAIWAN-T 1000 84 0 CY8C27443 (8C27443B) 2414285 610438918 TAIWAN-T 1000 81 0 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 125C, 5.5V, Vcc Max CY8C27443 (8C27443B) 2403330 610438921 TAIWAN-T 1000 73 0 CY8C27443 (8C27443B) 2405478 610438920 TAIWAN-T 1000 81 0 CY8C27443 (8C27443B) 2414285 610438918 TAIWAN-T 1000 78 0 TAIWAN-T 1000 50 0 STRESS: HIGH TEMPERATURE STORAGE, 150C CY8C27443 (8C27443B) 2403330 610438921 Cypress Semiconductor “A” Grade Pb-Free Automotive PSoC™ Mixed-Signal Array Family, S4AD-5CTI, Fab 2 Device: CY8C21x34 071210 V.1.1 Page 8 of 9 February 2008 Reliability Test Data QTP #: Device Fab Lot # Assy Lot # Assy Loc 042702 Duration Samp Rej STRESS: TC COND. C -65C TO 150C, PRE COND 168 HRS 85C/85%RH, MSL1 CY8C27443 (8C27443B) 2403330 610438921 TAIWAN-T 500 85 0 CY8C27443 (8C27443B) 2403330 610438921 TAIWAN-T 1000 80 0 CY8C27443 (8C27443B) 2405478 610438920 TAIWAN-T 500 85 0 CY8C27443 (8C27443B) 2405478 610438920 TAIWAN-T 1000 82 0 CY8C27443 (8C27443B) 2414285 610438918 TAIWAN-T 500 85 0 CY8C27443 (8C27443B) 2414285 610438918 TAIWAN-T 1000 84 0 610438921 TAIWAN-T COMP 5 0 STRESS: POST T/C BOND PULL CY8C27443 (8C27443B) 2403330 Failure Mechanism Cypress Semiconductor “A” Grade Pb-Free Automotive PSoC™ Mixed-Signal Array Family, S4AD-5CTI, Fab 2 Device: CY8C21x34 071210 V.1.1 Page 9 of 9 February 2008 Reliability Test Data QTP #: Device Fab Lot # Assy Lot # Assy Loc 071210 Duration Samp Rej STRESS: STATIC LATCH-UP TESTING, 125C, 8.25V, ±100mA CY8C21534 (8C21534A) 2507173 610521613 TAIWAN-T COMP 6 0 3 0 3 0 STRESS: ESD-HUMAN BODY CIRCUIT PER JESD22, METHOD A114-B, 2,000V CY8C21534 (8C21534A) 2507173 610521613 TAIWAN-T COMP STRESS: ESD-HUMAN BODY CIRCUIT PER JESD22, METHOD A114-B, 4,000V CY8C21534 (8C21534A) 2507173 610521613 TAIWAN-T COMP STRESS: ESD-HUMAN BODY CIRCUIT PER JESD22, METHOD A114-B, 6,000V CY8C21534 (8C21534A) 2507173 610521613 TAIWAN-T COMP 3 0 STRESS: ELECTRICAL DISTRIBUTION CY8C21534 (8C21534A) 2508261 610520458 TAIWAN-T COMP 30 0 CY8C21534 (8C21534A) 2507173 610521613 TAIWAN-T COMP 30 0 CY8C21534 (8C21534A) 2509349 610522952 TAIWAN-T COMP 30 0 Failure Mechanism