TPS61197 www.ti.com SLVSC25 – JULY 2013 Single-String WLED Driver for LCD TV Check for Samples: TPS61197 FEATURES • 1 • • • • • • 8V to 30V Input Voltage 50 kHz to 800 kHz Programmable Switching Frequency Adaptive Boost Output to White LED Voltage High Precision PWM Dimming Resolution up to 5000:1 Programmable Over-voltage Protection Threshold at Output Programmable Under-voltage Threshold at Input with Adjustable Hysteresis Adjustable Soft Start Time Independent of Dimming Duty Cycle Built-in LED Open Protection Built-in Schottky Diode Open/Short Protection Built-in IFB Short Protection Thermal Shutdown 16L SOIC Package • • • • • APPLICATIONS • LCD TV Backlight DESCRIPTION The TPS61197 provides highly integrated solutions for LCD TV backlight. This device is a current mode boost controller driving one WLED string with multiple LEDs in series. The input voltage range for TPS61197 is from 8V to 30V.The TPS61197 adjusts the boost controller’s output voltage automatically to provide only the minimum voltage required by the LED string to generate the setting LED current, thereby optimizing the driver’s efficiency. Its switching frequency is programmed by an external resistor from 50 kHz to 800 kHz. The TPS61197 supports direct PWM brightness dimming method. During the PWM dimming, the white LED current is turned on and off at the duty cycle and frequency which are determined by an external PWM signal. The PWM dimming frequency ranges from 90 Hz to 22 kHz. The TPS61197 integrates over-current protection, output short circuit protection, Schottky diode open and short protection, LED open protection, LED string short protection and over temperature shutdown circuit. The device also provides programmable input under-voltage lockout threshold and output over-voltage protection threshold. The TPS61197 has a built-in linear regulator which steps down the input voltage to the VDD voltage for powering the internal circuitry. An internal soft start circuit is implemented to work with an external capacitor to adjust the soft startup time to minimize the in-rush current during boost converter startup. The device is available in 16-pin SOIC package, which is ideal for a single-layer PCB board. SIMPLIFIED SCHEMATIC CIRCUIT L1 68uH VIN = 24V R11 100 EC2 22uF EC1 470uF R10 VIN GDRV R3 1.0M Q1 3 C2 2.2uF ISNS R1 383k R6 300 UVLO R2 24.9k D1 C1 10nF PGND TPS61197 VDD C4 1nF R5 0.1 R4 20k C5 220pF OVP COMP C3 1.0uF FSW REF R7 300k C7 EN FAULT PWM 2.2uF IDRV Q2 R12 IFB C8 AGND R8 50k C6 22nF 1.0k R9 1.0nF 1.0 Figure 1. Typical Application of TPS61197 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2013, Texas Instruments Incorporated TPS61197 SLVSC25 – JULY 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION (1) (1) TA PACKAGE ORDERING PART NUMBER TOP MARK -40°C to 85°C 16-Pin SOIC TPS61197DR TPS61197 For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) VALUE MIN Voltage range (2) Pin VIN –0.3 33 Pin FAULT –0.3 VIN Pin ISNS, IFB –0.3 3.3 Pin EN, PWM, VDD, GDRV, IDRV –0.3 20 Pin GDRV 10ns transient –2.0 20 All other pins –0.3 7.0 HBM ESD rating MAX 2 MM CDM Continuous power dissipation UNIT V kV 200 V 1 kV See Thermal Information Table Operating junction temperature range –40 150 °C Storage temperature range –65 150 °C (1) (2) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal THERMAL INFORMATION THERMAL METRIC (1) TPS61197 SOIC (16 PINS) θJA Junction-to-ambient thermal resistance 85.8 θJCtop Junction-to-case (top) thermal resistance 44.5 θJB Junction-to-board thermal resistance 43.3 ψJT Junction-to-top characterization parameter 13.5 ψJB Junction-to-board characterization parameter 42.9 (1) 2 UNITS °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPS61197 TPS61197 www.ti.com SLVSC25 – JULY 2013 RECOMMENDED OPERATING CONDITIONS (1) MIN NOM VIN Input voltage range VOUT MAX UNIT 8 30 Output voltage range VIN 300 V L1 Inductor 4.7 470 µH CIN Input capacitor 10 COUT Output capacitor 1.0 220 µF fSW Boost regulator switching frequency 50 800 kHz fDIM PWM dimming frequency 0.09 22 kHz TA Operating ambient temperature –40 85 °C TJ Operating junction temperature –40 125 °C (1) V µF Customers need to verify the component value in their application if the values are different from the recommended values. ELECTRICAL CHARACTERISTICS VIN= 24V, TA = –40°C to 85°C, typical values are at TA = 25°C, EC1 = 470μF, EC2 = 22μF (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX 6.5 7.0 UNIT POWER SUPPLY VIN Input voltage range VVIN_UVLO Under voltage lockout threshold 8 VVIN_HYS VIN UVLO hysteresis IQ_VIN Operating quiescent current into VIN Device enabled, no switching, VIN = 30 V 2.0 mA ISD Shutdown current VIN = 12 V VIN = 30 V 25 50 µA VDD Regulation voltage for internal circuit 0 mA < IDD < 15 mA 6.6 7.4 V VH Logic high input on EN, PWM VIN = 8 V to 30 V 1.6 VL Logic low input on EN, PWM VIN = 8 V to 30 V RPD Pull-down resistance on EN, PWM VIN falling 30 300 7 V V mV EN and PWM V 0.75 V 400 800 1600 kΩ 1.204 1.229 1.253 V –0.1 –4.4 a -3.9 0.1 –3.3 µA UVLO VUVLOTH IUVLO Threshold voltage at UVLO pin UVLO input bias current VUVLO = VUVLOTH – 50 mV VUVLO = VUVLOTH + 50 mV Soft start charging current PWM dimming on, VREF<2.0V SOFT START ISS 200 µA CURRENT REGULATION VIFB_REG IFB pin regulation voltage VIFB_SCP IFB short to ground protection threshold TJ = 25°C to 85°C VIFB_OVP IFB over voltage protection threshold IIFB_LEAK IFB pin leakage current 293 300 307 200 1.0 mV 1.2 V –100 100 nA 0 3.5 V TJ = -40°C to 85°C –25 25 nA R = 200 kΩ 187 200 213 kHz 90% 94% VIFB = 300mV 1.1 mV BOOST REFERENCE VOLTAGE VREF Reference voltage range for Boost Controller IREF_LEAK Leakage current at REF OSCILLATOR fSW Switching frequency VFSW FSW pin reference voltage D(max) Maximum duty cycle ton(min) Minimum pulse width 1.8 fSW = 200 kHz V 98% 300 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPS61197 ns 3 TPS61197 SLVSC25 – JULY 2013 www.ti.com ELECTRICAL CHARACTERISTICS (continued) VIN= 24V, TA = –40°C to 85°C, typical values are at TA = 25°C, EC1 = 470μF, EC2 = 22μF (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ERROR AMPLIFIER ISINK Comp pin sink current VOVP = VREF + 200mV, VCOMP = 1V 20 ISOURCE Comp pin source current VOVP = VREF – 200mV, VCOMP = 1V 20 GmEA Error amplifier transconductance REA Error amplifier output resistance fEA Error amplifier crossover frequency 90 120 µA µA 150 µS 20 MΩ 1000 kHz GATE DRIVER Ω RGDRV_SRC Gate driver impedance when sourcing VGDRV = 7 V, IGDRV = –20 mA 5 10 RGDRV_SNK Gate driver impedance when sinking VDD = 7 V, IGDRV = 20 mA 2 5 IGDRV_SRC Gate driver source current VDD = 7 V, VGDRV = 5 V 200 mA IGDRV_SNK Gate driver sink current VDD = 7 V, VGDRV = 2 V 400 mA VPWM_OCP Overcurrent detection threshold during PWM VIN = 8 V to 30 V, TJ = 25°C to 125°C 376 VPFM_OCP Overcurrent detection threshold during PFM 400 424 180 Ω mV mV OVP VOVPTH Over-voltage protection threshold 2.98 3.04 3.10 V IOVP_LEAK Leakage current at OVP pin –100 0 100 nA FAULT INDICATOR IFLT_H Leakage current at high impedance VFLT = 24 V IFLT_L Sink current at low output VFLT = 1 V 2 1 nA 5 mA 150 °C 15 °C THERMAL SHUTDOWN TSTDN Thermal shutdown threshold THYS Thermal shutdown threshold hysteresis 4 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPS61197 TPS61197 www.ti.com SLVSC25 – JULY 2013 DEVICE INFORMATION SOIC-16 (D) (TOP VIEW) 1 16 VIN EN 2 15 FAULT PWM 3 14 FSW AGND 4 13 VDD REF 5 12 GDRV COMP 6 11 PGND IFB 7 10 OVP IDRV 8 9 ISNS TPS61197 UVLO PIN FUNCTIONS PIN NO. (D) NAME 1 UVLO 2 EN DESCRIPTION Low input voltage lockout. Use a resister divider from VIN to this pin to set the UVLO threshold Device enable and disable control input. EN pin high voltage enables the device. EN pin low voltage disables the device. 3 PWM PWM dimming signal input. The frequency of the PWM signal is in the range of 90Hz to 22 kHz 4 AGND Analog ground 5 REF 6 COMP Internal reference voltage for the boost converter. Use a capacitor at this pin to adjust the soft start time. 7 IFB 8 IDRV PWM dimming output control pin to drive the external MOSFET or bipolar transistor 9 ISNS External switch MOSFET current sense positive input 10 OVP Over-voltage protection detection input. Connect a resistor divider from output to this pin to program the OVP threshold. In addition, this pin is also the feedback of the output voltage of the boost converter. 11 PGND External MOSFET current sense ground input 12 GDRV Gate driver output for the external switch MOSFET 13 VDD Internal regulator output for IC power supply. Connect a ceramic capacitor of more than 1.0µF to this pin. 14 FSW Boost switching frequency setting pin. Use a resistor to set the frequency between 50 kHz to 800 kHz. 15 FAULT 16 VIN Loop compensation for the boost converter. Connect a RC network to make loop stable Connecting a resistor to the pin programs the LED current level for full brightness (i.e., 100% dimming) Fault indicator. Open-drain output. Output high impedance when fault conditions happen Power supply input pin Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPS61197 5 TPS61197 SLVSC25 – JULY 2013 www.ti.com FUNCTIONAL BLOCK DIAGRAM D1 L1 IN OUT EC1 EC2 VIN FAULT VDD C2 C3 Power Supply EN Protection Logic R1 VDD UVLO R2 PWM Logic GDRV Driver C1 FSW R7 ISNS Oscillator and Slope Compensation Q1 R6 R5 C5 COMP PGND OC Protection R8 400mV VDD C6 EA REF OVP Protection R3 3.0V OVP Iss C4 R4 VDD C7 PWM Driver IDRV IFB EA 6 300mV Submit Documentation Feedback AGND R9 Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPS61197 TPS61197 www.ti.com SLVSC25 – JULY 2013 TYPICAL CHARACTERISTICS TABLE OF GRAPHS Figure 1 as test circuit TITLE TEST CONDITIONS FIGURE Dimming Efficiency with 24 LEDs 24 LEDs (VOUT = 80V), IOUT = 300mA, 100Hz Dimming Frequency Figure 2 Dimming Efficiency with 38 LEDs 38 LEDs (VOUT = 130V), IOUT = 300mA, 100Hz Dimming Frequency Figure 3 Dimming Linearity 24 LEDs (VOUT = 80V), VIN = 24V Figure 4 Dimming Linearity at Small Dimming Duty Cycle 24 LEDs (VOUT = 80V), VIN = 24V Figure 5 DC Load Efficiency fSW = 130kHz Figure 6 Switching Frequency Setting VIN = 24V Figure 7 Boost Switching Waveform VIN = 24V, VOUT = 80V, IOUT = 300mA Figure 8 Dimming Waveform (2% Dimming) VIN = 24V, VOUT = 80V, IOUT = 300mA, 100Hz Dimming Frequency Figure 9 Startup Waveform (1% Dimming) 100Hz Dimming Frequency, 1% Dimming Duty Cycle Figure 10 Startup Waveform (100% Dimming) 100Hz Dimming Frequency, 100% Dimming Duty Cycle Figure 11 Shutdown Waveform (1% Dimming) 100Hz Dimming Frequency, 1% Dimming Dutyc Cycle Figure 12 Shutdown Waveform (100% Dimming) 100Hz Dimming Frequency, 100% Dimming Duty Cycle Figure 13 LED Open Protection (1% Dimming) 100Hz Dimming Frequency, 1% Dimming Duty Cycle Figure 14 LED Open Protection (100% Dimming) 100Hz Dimming Frequency, 100% Dimming Duty Cycle Figure 15 LED String Short Protection (1% Dimming) 100Hz Dimming Frequency, 1% Dimming Duty Cycle Figure 16 LED String Short Protection (100% Dimming) 100Hz Dimming Frequency, 100% Dimming Duty Cycle EFFICIENCY (38 LEDs) 100 100 90 90 80 Efficiency (%) Efficiency (%) EFFICIENCY (24 LEDs) 24 LEDS (VOUT = 80V) 100Hz Dimming Frequency 70 60 Figure 17 38 LEDs (VOUT = 130V) 100Hz Dimming Frequency 80 70 60 VIN = 12V VIN = 48V VIN = 24V VIN = 24V 50 50 0 10 20 30 40 50 60 70 80 90 100 0 10 20 PWM Dimming Duty Cycle (%) 40 50 60 70 80 90 100 Figure 2. Figure 3. DIMMING LINEARITY DIMMING LINEARITY AT LOW DIMMING DUTY CYCLE 10 350 9 300 1kHz Dimming LED Average Current (mA) Total LED Average Current (mA) 30 PWM Dimming Duty Cycle (%) 250 200 150 100 100Hz Dimming 50 8 7 1kHz Dimming 6 5 4 3 100Hz Dimming 2 1 0 0 0 10 20 30 40 50 60 70 80 90 100 0 PWM Dimming Duty Cycle (%) 0.5 1 1.5 2 2.5 3 PWM Dimming Duty Cycle (%) Figure 4. Figure 5. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPS61197 7 TPS61197 SLVSC25 – JULY 2013 www.ti.com DC LOAD EFFICIENCY SWITCHING FREQUENCY SETTING 900 100 800 700 80 Frequency (kHz) Efficiency (%) 90 24V Input 12V Input 70 500 400 300 200 24 LEDs (VOUT = 80V) 60 600 100 0 50 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 0 Output Current (A) 200 300 400 500 600 700 800 900 Resistance (k:) Figure 6. Figure 7. BOOST SWITCHING WAVEFORM DIMMING WAVEFORM (1% DIMMING) PWM 5V/div SW 50V/div SW 50V/div Vout (AC) 200mV/div VOUT (AC) 500mV/div Inductor Current 500mA/div LED Current 200mA/div 4ms/div 40ms/div Figure 8. Figure 9. STARTUP WAVEFORM (1% DIMMING) STARTUP WAVEFORM (100% DIMMING) EN 5V/div EN 5V/div Input Current 500mA/div Input Current 500mA/div VOUT 20V/div VOUT 20V/div LED Current 200mA/div LED Current 200mA/div 40ms/div 40ms/div Figure 10. 8 100 Figure 11. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPS61197 TPS61197 www.ti.com SLVSC25 – JULY 2013 SHUTDOWN WAVEFORM (1% DIMMING) SHUTDOWN WAVEFORM (100% DIMMING) EN 5V/div EN 5V/div SW 50V/div SW 50V/div VOUT 20V/div VOUT 20V/div LED Current 200mA/div LED Current 200mA/div 1s/div 1s/div Figure 12. Figure 13. LED OPEN PROTECTION (1% DIMMING) LED OPEN PROTECTION (100% DIMMING) FAULT 20V/div FAULT 20V/div SW 50V/div SW 50V/div VOUT 20V/div VOUT 20V/div LED Current 200mA/div LED Current 200mA/div 20ms/div 20ms/div Figure 14. Figure 15. LED STRING SHORT PROTECTION (1% DIMMING) LED STRING SHORT PROTECTION (100% DIMMING) FAULT 20V/div FAULT 20V/div SW 50V/div SW 50V/div IFB 2V/div IFB 2V/div Short Current 2A/div Short Current 2A/div 10ms/div 10ms/div Figure 16. Figure 17. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPS61197 9 TPS61197 SLVSC25 – JULY 2013 www.ti.com DETAILED DESCRIPTION Supply Voltage The TPS61197 has a built-in linear regulator to supply the IC analog and logic circuitries. The VDD pin, output of the regulator, must be connected to a bypass capacitor with more than 1.0µF capacitance. VDD only has a current sourcing capability of 15mA. VDD voltage is ready after the EN pin is pulled high. Boost Controller The TPS61197 regulates the output voltage with peak current mode PWM (pulse width modulation) control. The control circuitry turns on an external switch FET at the beginning of each switching cycle. The input voltage is applied across the inductor and stores the energy as the inductor current ramps up. During this portion of the switching cycle, the load current is provided by the output capacitor. When the inductor current rises to the threshold set by the Error Amplifier (EA) output, the switch FET is turned off and the external Schottky diode is forward biased. The inductor transfers stored energy to replenish the output capacitor and supply the load current. This operation repeats each switching cycle. The switching frequency is programmed by an external resistor. A ramp signal from the oscillator is added to the current ramp to provide slope compensation, shown in the Functional Block Diagram. The duty cycle of the converter is then determined by the PWM logic block which compares the EA output and the slope compensated current ramp. The feedback loop regulates the OVP pin to a reference voltage generated by the current regulation control circuit which senses the LED current at the IFB pin. The output of the EA is connected to the COMP pin. An external RC compensation network must be connected to the COMP pin to optimize the feedback loop for stability and transient response. The TPS61197 consistently adjusts the boost output voltage to account for any changes in LED forward voltages. In the event that the boost controller is not able to regulate the output voltage due to the minimum pulse width (ton(min), in the ELECTRICAL CHARACTERISTICS table), the TPS61197 enters pulse skip mode. In this mode, the device keeps the power switch off for several switching cycles to prevent the output voltage from rising above the regulated voltage. This operation typically occurs in light load condition or when the input voltage is higher than the output voltage. Switching Frequency The switching frequency is programmed between 50kHz to 800kHz by an external resistor (R7 in the SIMPLIFIED SCHEMATIC CIRCUIT). To determine the resistance by a given frequency, use the curve in Figure 7 or calculate the resistance value by Equation 1. Table 1 shows the recommended resistance values for some switching frequencies. 40000 fSW = (kHz ) (1) R7 Table 1. Recommended Resistance Values for Switching Frequencies R7 fSW 800 k 50 kHz 400 k 100 kHz 200 k 200 kHz 100 k 400 kHz 80 k 500 kHz Enable and Under Voltage Lockout The TPS61197 is enabled with soft startup when the EN pin voltage is higher than 1.6V. A voltage of less than 0.75V disables the TPS61197. An under-voltage lockout protection feature is provided in the TPS61197. When the voltage at the VIN pin is less than 6.5V, the TPS61197 is powered off. The TPS61197 resumes the operation once the voltage at the VIN pin recovers above the hysteresis (VVIN_HYS ) more than the UVLO falling threshold of input voltage. If a higher under-voltage lockout (UVLO) voltage is required, use the UVLO pin as shown in Figure 18 to adjust the input UVLO threshold by using an external resistor divider. Once the voltage at the UVLO 10 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPS61197 TPS61197 www.ti.com SLVSC25 – JULY 2013 pin exceeds the 1.229V threshold, the TPS61197 is powered on and a hysteresis current source of 3.9µA is added. When the voltage at the UVLO pin drops lower than 1.229V, the current source is removed and the TPS61197 is powered off. The resistors of R1, R2 can be calculated by Equation 2 from required turn-on voltage (VSTART) and turn-off voltage (VSTOP). To avoid noise coupling, the resistor divider R1 and R2 must be close to the UVLO pin. Placing a filter capacitor of more than 10nF as shown in Figure 18 can eliminate the impact of the switching ripple of the input voltage and improve the noise immunity. If the UVLO function is not used, pull up the UVLO pin to the VDD pin. VIN IHYS R1 UVLO R2 Enable C1 UVLO Comparator 1.229V Figure 18. The Under-Voltage Lockout Circuit VSTART - VSTOP IHYS (2) 1.229V R2 = R1 VSTART - 1.229V (3) R1 = Where IHYS is 3.9µA sourcing current from the UVLO pin. When the UVLO condition happens, the FAULT pin outputs high impedance. As long as the UVLO condition is removed, the FAULT pin outputs low impedance. Power Up Sequencing and Soft Startup The input voltage, UVLO pin voltage, EN input signal and the input dimming PWM signal control the power up of the TPS61197. After the input voltage is above the required minimal input voltage of 7.5V, the internal circuit is ready to be powered up. After the UVLO pin voltage is above the threshold of 1.229V and the EN signal is high, the internal LDO and logic circuit are activated. When the PWM dimming signal is high, the soft startup begins. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPS61197 11 TPS61197 SLVSC25 – JULY 2013 www.ti.com VIN Rising Threshold Falling Threshold UVLO EN 40s VDD PWM FAULT REF Voltage = OVP Voltage REF VOUT Switching IFB Figure 19. Power up Sequencing The TPS61197 has integrated the soft-start circuitry working with an external capacitor at the REF pin to avoid inrush current during startup. During the startup period, the capacitor at the REF pin is charged with a soft-start current source. When the REF pin voltage is higher than the output feedback voltage at the OVP pin, the boost controller starts switching and the output voltage starts to ramp up. At the same time, the LED current regulation circuit starts to drive the LED string. At the beginning of the soft start, the charge current is 200µA. Once the voltage of the REF pin exceeds 2.0V, the charge current stops. The output voltage continues to ramp up until the IFB voltage is in regulation of 300mV. The total soft start time is determined by the external capacitance at the REF pin. The capacitance must be within 470nF to 4.7µF for different startup time. UVLO VIN EN PWM Dimming 200uA Charging Current VREF=2V Dimming Off (VOUT = VIN ± VD) VOUT IFB voltage ramps to 300mV Figure 20. Soft Start Waveforms 12 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPS61197 TPS61197 www.ti.com SLVSC25 – JULY 2013 Current Regulation The TPS61197 regulates the IFB voltage to 300mV. Applying a current sense resistor (R9 in the SIMPLIFIED SCHEMATIC CIRCUIT) at the IFB pin to set the required LED current. VIFB _ REG ILED = R9 (4) Where VIFB_REG is the IFB pin regulation voltage of 300mV. PWM Dimming LED brightness dimming is set by applying an external PWM signal of 90Hz to 22kHz to the PWM pin. Varying the PWM duty cycle from 0% to 100% adjusts the LED from minimum to maximum brightness respectively. The recommended minimum on time of the LED string is 10µsec. Thus the TPS61197 has a minimum dimming ratio of 500:1 at 200Hz. When the PWM voltage is pulled low during dimming off, the TPS61197 turns off the LED string and keeps the boost converter running in PFM mode. In PFM mode, the output voltage is kept at a level which is a little bit lower than that when the PWM voltage is high. Thus, the TPS61197 limits the output ripple due to the load transient that occurs during PWM dimming. When the PWM voltages are pulled low for more than 20ms, to avoid the REF pin voltage dropping due to the leakage current, the voltage of the REF pin is held by an internal reference voltage which is a little bit lower than the REF pin voltage in normal dimming operation. Thus the output voltage will be kept unchanged during the long dimming off time. Since the output voltage in long time dimming off status is almost the same as the normal voltage for turning the LED on, the TPS61197 turns on the LED very fast without any flicker when recovering from long time dimming off to normal dimming operation. Protections The TPS61197 has full set of protections making the system safe to any abnormal conditions. Some protections will latch the TPS61197 in off state until its power supply is recycled or it is disabled and then enabled again. In the latch-off state, the REF pin voltage is discharged to 0V. 1. Switch current limit protection using the ISNS pin The TPS61197 monitors the inductor current through the voltage across a sense resistor (R5 in the SIMPLIFIED SCHEMATIC CIRCUIT) in order to provide current limit protection. During the switch FET on period, when the voltage at the ISNS pin rises above the over-current protection threshold (VPWM_OCP or VPFM_OCP in the ELECTRICAL CHARACTERISTICS table), the IC turns off the FET immediately and does not turn it back on until the next switching cycle. The switch current limit is equal to VPWM_OCP / R5 (or VPFM_OCP / R5). The current limit is different for PWM mode and PFM mode. In the PWM mode, the current limit threshold voltage is 400mV typically. In the PFM mode, it is 180mV typically. 2. LED open protection When the LED string is open, the IFB pin voltage drops to zero volt during dimming-on time. The TPS61197 keeps increasing the output voltage until it touches the output over-voltage protection threshold. The TPS61197 is then latched off. 3. Schottky diode open protection When the TPS61197 is enabled, it checks the topology connection first. The TPS61197 detects the voltage at the OVP pin to check if the Schottky diode is not connected or the boost output is hard-shorted to ground. If the voltage at the OVP pin is lower than 70mV for 80ms, the TPS61197 is locked in off state until the input power is recycled or the TPS61197 is enabled again. 4. Schottky diode short protection If the rectifier Schottky diode is shorted, the reverse current from output capacitor to ground is very large when the switch MOSFET is turned on. The TPS61197 uses a secondary current limit threshold of 800mV across the current sense resistor to permanently disable the switching if the threshold is touched. 5. IFB over-voltage protection Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPS61197 13 TPS61197 SLVSC25 – JULY 2013 www.ti.com When the IFB pin reaches the threshold (VIFB_OVP in the ELECTRICAL CHARACTERISTICS table) of 1.1V during startup or normal operation, the IC stops switching and stays in the latch-off state immediately to protect from damage. This function protects the external dimming MOSFET from damage when the LED string is shorted from the anode (connecting to output of the boost converter) to its cathode. 6. Output over-voltage protection using the OVP pin Use a resistor divider to program the maximum output voltage of the boost converter. To ensure the LED string can be turned on with setting current, the maximum output voltage must be higher than the forward voltage drop of the LED string. The maximum required voltage can be calculated by multiplying the maximum LED forward voltage (VFWD(max) ) and number (n) of series LEDs , and adding extra 2V to account for regulation and resistor tolerances and load transients. The recommended bottom feedback resistor of the resistor divider (R4 in the SIMPLIFIED SCHEMATIC CIRCUIT) is 20kΩ. Calculate the top feedback resistor (R3, in the SIMPLIFIED SCHEMATIC CIRCUIT) using Equation 5, where VOUT_OVP is the output over-voltage protection threshold of the boost converter. æ VOUT _ OVP ö R3 = çç - 1÷÷ ´ R4 3.04 è ø (5) When the IC detects that the OVP pin voltage exceeds the over-voltage protection threshold of 3.04V, indicating that the output voltage has exceeded the over-voltage proteciton threshold, the TPS61197 clamps the output voltage to prevent it going up any more. If the OVP pin voltage does not drop below the OVP threshold for more than 640ms, the TPS61197 is latched off until the input power or the EN pin is re-cycled. 7. IFB short to ground protection The TPS61197 monitors the IFB pin voltage when the device is enabled. If the IFB pin voltage is less than 200mV, the TPS61197 keeps increasing the output voltage until the over-voltage protection or the switch over-current protection happens. If the IFB pin voltage is still under 200mV for 60ms in these protection conditions, the TPS61197 is latched off. 8. Thermal Protection When the internal junction temperature of the TPS61197 is over 150°C, the thermal protection circuit is triggered and shuts down the device immediately. The device automatically restarts when the junction temperature falls back to less than 150°C, with approximate 15°C hysteresis. Table 2. Protection List PROTECTION ITEM FAULT CONDITIONS FAULT RESULT Diode Open VOVP < 70mV for more than 80ms Y Latch off Diode Short VISNS > 800mV for three switching cycles Y Latch off Output Over Voltage VOVP > 3.04V for more than 640ms Y Latch off LED String Open (VIFB < 200mV and VOVP > 3.04V) for more than 60ms Y Latch off LED String Short VIFB > 1.1V Y Latch off IFB Short to Ground (VIFB < 200mV and VOVP > 3.04V) or (VIFB < 200mV and VISNS > 400mV) for more than 60ms Y Latch off Input Voltage under UVLO Threshold VUVLO < 1.229V Y Retry Thermal Shutdown TJ > 150ºC Y Retry Indication for Fault Conditions The TPS61197 has an open-drain fault indicator pin to indicate abnormal conditions. When the TPS61197 is operating normally, the voltage at the FAULT pin is low. When any fault condition happens, the FAULT pin is in high impedance, which can be pulled up to a high voltage level through an external resistor. 14 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPS61197 TPS61197 www.ti.com SLVSC25 – JULY 2013 APPLICATION INFORMATION Inductor Selection The inductor is the most important component in switching power regulator design because it affects power supply steady state operation, transient behavior, and loop stability. The inductor value, DC resistance and saturation current are important specifications to be considered for better performance. Although the boost power stage can be designed to operate in discontinuous conduction mode (DCM) at maximum load, where the inductor current ramps down to zero during each switching cycle, most applications will be more efficient if the power stage operates in continuous conduction mode (CCM), where a DC current flows through the inductor. Therefore, the Equation 7 and Equation 8 are for CCM operation only. The TPS61197 is designed to work with inductor values between 4.7 µH and 470 µH, depending on the switching frequency. Running the controller at higher switching frequencies allows the use of smaller and/or lower profile inductors in the 4.7µH range. Running the controller at slower switching frequencies requires the use of larger inductors, near 470µH, to maintain the same inductor current ripple but may improve overall efficiency due to smaller switching losses. Inductor values can have ±20% tolerance with no current bias. When the inductor current approaches saturation level, its inductance can decrease 20% to 35% from the value measured at near 0-A, depending on how the inductor vendor defines saturation. In a boost regulator, the inductor DC current can be calculated with Equation 6. V ´I IL(DC) = OUT OUT VIN ´ h (6) Where: VOUT = boost output voltage IOUT = boost output current VIN = boost input voltage η = power conversion efficiency, use 95% for TPS61197 applications The inductor peak-to-peak ripple current can be calculated with Equation 7. DIL(P -P) = VIN ´ (VOUT - VIN ) L ´ fSW ´ VOUT (7) Where: ΔIL(P-P) = inductor ripple current L = inductor value fSW = switching frequency VOUT = boost output voltage VIN = boost input voltage Therefore, the inductor peak current is calculated with Equation 8. DIL(P - P ) IL(P) = IL(DC) + 2 (8) Select an inductor, which saturation current is higher than calculated peak current. To calculate the worst case inductor peak current, use the minimum input voltage, maximum output voltage and maximum load current. Regulator efficiency is dependent on the resistance of its high current path and switching losses associated with the switch FET and power diode. Besides the external switch FET, the overall efficiency is also affected by the inductor DC resistance (DCR). Usually the lower DC resistance shows higher efficiency. However, there is a tradeoff between DCR and inductor footprint; furthermore, shielded inductors typically have higher DCR than unshielded ones. Schottky Diode The TPS61197 demands a high-speed rectification for optimum efficiency. Ensure that the diode's average and peak current rating exceed the output LED current and inductor peak current. In addition, the diode's reverse breakdown voltage must exceed the application output voltage. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPS61197 15 TPS61197 SLVSC25 – JULY 2013 www.ti.com Switch MOSFET and Gate Driver Resistor The TPS61197 demands a power N-MOSFET (see Q1 in SIMPLIFIED SCHEMATIC CIRCUIT) as a switch. The voltage and current rating of the MOSFET must be higher than the application output voltage and the inductor peak current. The applications benefit from the addition of a resistor (See R10 in SIMPLIFIED SCHEMATIC CIRCUIT) connected between the GDRV pin and the gate of the switch MOSFET. With this resistor, the gate driving current is limited and the EMI performance is improved. A 3-Ω resistor value is recommended. The TPS61197 exhibits lower efficiency when the resistor value is above 3Ω due to the more switching loss of the external MOSFET. Current Sense and Current Sense Filtering R5 determines the correct over-current limit protection. To choose the right value of R5, start with the total system power needed POUT, and calculate the input current IIN by Equation 6. Efficiency can be estimated from Figure 3. The second step is to calculate the inductor peak current based on the inductor value L using Equation 7 and Equation 8. The maximum R5 can now be calculated as R5(max) = VISNS_OC / IL(P). It is recommended to add 20% or more margins to account for component variations. A small filter placed on the ISNS pin improves performance of the converter (See R6 and C5 in SIMPLIFIED SCHEMATIC CIRCUIT). The time constant of this filter should be approximately 100ns. The range of R6 must be from about 300Ω to 1kΩ for best results. The C5 should be located as close as possible to the ISNS pin to provide noise immunity. Output Capacitor The output capacitor is mainly selected to meet the requirements for output ripple and loop stability of the whole system. This ripple voltage is related to the capacitance of the capacitor and its equivalent series resistance (ESR). Assuming a capacitor with zero ESR, the minimum capacitance needed for a given ripple can be calculated by: I ´ DMAX VRIPPLE(C) = OUT fSW ´ COUT (9) Where VRIPPLE is the peak to peak output voltage ripple and DMAX is the maximum duty cycle of the boost converter in the application. DMAX is approximately equal to (VOUT(MAX) – VIN(MIN) / VOUT(MAX)) in applications. Care must be taken when evaluating a capacitor’s derating under DC voltage. The DC bias voltage can also significantly reduce capacitance. Ceramic capacitors can loss as much as 50% of its capacitance at its rated voltage. Therefore, leave the margin on the voltage rating to ensure adequate capacitance. The ESR impact on the output ripple must be considered as well if tantalum or aluminum electrolytic capacitors are used. Assuming there is enough capacitance such that the ripple due to the capacitance can be ignored, the ESR needed to limit the VRIPPLE is: VRIPPLE(ESR ) = IL(P) ´ ESR (10) Ripple current flowing through a capacitor’s ESR causes power dissipation in the capacitor. This power dissipation causes temperature increase internally to the capacitor. Excessive temperature can seriously shorten the expected life of a capacitor. Capacitors have ripple current ratings that are dependent on ambient temperature and should not be exceeded. Therefore, high ripple current type electrolytic capacitor with small ESR is used in the typical application as shown in SIMPLIFIED SCHEMATIC CIRCUIT. In the typical application, the output requires a capacitor in the range of 1.0µF to 100µF. The output capacitor affects the small signal control loop stability of the boost converter. If the output capacitor is below the range, the boost regulator may potentially become unstable. Loop Consideration The COMP pin on the TPS61197 is used for external compensation, allowing the loop response to be optimized for each application. The COMP pin is the output of the internal trans-conductance amplifier. The external resistor R8, along with ceramic capacitors C6 (see in SIMPLIFIED SCHEMATIC CIRCUIT), are connected to the COMP pin to provide poles and zero. The pole and zero, along with the inherent pole and zero in a peak current mode control boost converter, determine the closed loop frequency response. This is important to converter stability and transient response. 16 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPS61197 TPS61197 www.ti.com SLVSC25 – JULY 2013 The first step is to calculate the pole and the right half plane zero of the peak current mode boost converter by Equation 11 and Equation 12. 2IOUT fP = 2pVOUT ´ COUT (11) 2 fZRHP = VOUT ´ (1 - D ) 2pL ´ IOUT (12) To make the loop stable, the loop must have sufficient phase margin at the crossover frequency where the loop gain is 1. To avoid the effect of the right half plane zero on the loop stability, choose the crossover frequency fCO less than 1/5 of the fZRHP. Then calculate the compensation components by Equation 13 and Equation 14. R5 ´ 2pfCO ´ COUT VOUT _ OVP ´ R8 = VOVPTH (1 - D )´ GmEA (13) Where VOVPTH = 3.04V, which is the over-voltage protection threshold at the OVP pin. VOUT_OVP is the setting output over-voltage protection threshold. GmEA is the trans-conductance of the error amplifier. The typical value of the GmEA is 120μS. fCO is the crossover frequency, which normally is less than 1/5 of the fZRHP. 1 C6 = 2pfP ´ R8 (14) Where fP is the pole’s frequency of the power stage calculated by Equation 11. If the output capacitor is the electrolytic capacitor which may have large ESR, a capacitor is required at the COMP pin or at the OVP pin to cancel the inherent zero of the output capacitor. Layout Consideration As for all switching power supplies, especially those providing high current and using high switching frequencies, layout is an important design step. If layout is not carefully done, the regulator could show instability as well as EMI problems. Therefore, use wide and short traces for high current paths. The VDD capacitor, C3 (see in SIMPLIFIED SCHEMATIC CIRCUIT) is the filter and noise decoupling capacitor for the internal linear regulator powering the internal circuitries. It should be placed as close as possible between the VDD and PGND pin to prevent any noise insertion to internal circuitries. The switch node at the drain of Q1 carries high current with fast rising and falling edges. Therefore, the connection between this node to the inductor and the schottky diode should be kept as short and wide as possible. The ground of output capacitor EC2 should be kept close to input power ground or through a large ground plane because of the large ripple current returning to the input ground. When laying out signal grounds, it is recommended to use short traces separate from power ground traces and connect them together at a single point. Resistors R3, R4 and R7 (see in the SIMPLIFIED SCHEMATIC CIRCUIT) are setting resistors for switching frequency and output over-voltage protection. To avoid unexpected noise coupling into the pins and affecting the accuracy, these resistors need to be close to the pins with short and wide traces to AGND pin. Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPS61197 17 TPS61197 SLVSC25 – JULY 2013 www.ti.com VIN GND 16 VIN 2 15 FAULT 3 14 FSW AGND 4 13 VDD 12 GDRV 11 PGND 10 OVP 9 ISNS REF 5 COMP 6 IFB 7 IDRV 8 TPS61197 1 EN PWM UVLO VOUT VLED- VLED+ Figure 21. Layout Example Typical Applications The TPS61197 can be configured as a simple boost converter to drive the LEDs when the boost ratio of the output voltage to the input voltage is less than 6. When the boost ratio is higher than 6, a transformer is required to replace the inductor to make the switching duty cycle near 50% and lower the voltage rating of the switch FET. Figure 22 shows this application. R11 100 EC2 22uF EC1 470uF R10 VIN GDRV R3 1.0M Q1 3 C2 2.2uF ISNS R1 383k R6 300 UVLO R2 49.9k D1 T1 VIN = 12V C1 10nF PGND TPS61197 VDD C4 1nF R5 0.05 R4 20k C5 220pF OVP COMP C3 1.0uF FSW REF R7 300k C7 EN FAULT PWM C6 22nF 2.2uF IDRV Q2 R12 IFB C8 AGND R8 20k 1.0k R9 1.0nF 1.0 Figure 22. High Boost Ratio Application The TPS61197 also supports the PWM dimming by turning on and off the boost converter to save cost of the dimming MOSFET. Figure 23 is the application circuit. This application requires small output capacitance so as to discharge the output voltage fast during dimming off period. The minimum dimming on time must be longer than 200µs to ramp up the output voltage to achieve the setting LED current during dimming on period. 18 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPS61197 TPS61197 www.ti.com SLVSC25 – JULY 2013 L1 68uH VIN = 24V R11 100 EC2 2.2uF EC1 470uF R10 VIN GDRV R3 1.0M Q1 3 C2 2.2uF ISNS R1 383k R6 300 UVLO R2 24.9k D1 C1 10nF PGND TPS61197 VDD C4 1nF R5 0.1 R4 20k C5 220pF OVP COMP C3 1.0uF FSW REF R7 300k C7 EN R8 1k C6 220nF 2.2uF VDD FAULT PWM IDRV R12 IFB C8 AGND 1.0k 1.0nF R9 1.0 Figure 23. PWM Dimming by Turning on and off the Boost Converter Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: TPS61197 19 PACKAGE OPTION ADDENDUM www.ti.com 24-Jul-2013 PACKAGING INFORMATION Orderable Device Status (1) TPS61197DR ACTIVE Package Type Package Pins Package Drawing Qty SOIC D 16 2500 Eco Plan Lead/Ball Finish (2) Green (RoHS & no Sb/Br) MSL Peak Temp Op Temp (°C) Device Marking (3) CU SN Level-1-260C-UNLIM (4/5) -40 to 85 TPS61197 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. 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