PHILIPS TDA6103

INTEGRATED CIRCUITS
DATA SHEET
TDA6103Q
Triple video output amplifier
Preliminary specification
File under Integrated Circuits, IC02
Philips Semiconductors
March 1994
Philips Semiconductors
Preliminary specification
Triple video output amplifier
TDA6103Q
FEATURES
GENERAL DESCRIPTION
• High bandwidth: 7.5 MHz typical; 60 V (peak-to-peak
value)
The TDA6103Q includes three video output amplifiers in
one single in-line 9-pin medium power (SIL9MP) package
SOT111BE, using high-voltage DMOS technology,
intended to drive the three cathodes of a colour CRT.
• High slew rate: 1600 V/µs
• Simple application with a variety of colour decoders
• Only one supply voltage needed
• Internal protection against positive appearing
Cathode-Ray Tube (CRT) flashover discharges
• One non-inverting input with a low minimum input
voltage of 1 V
• Thermal protection
• Controllable switch-off behaviour.
ORDERING INFORMATION
PACKAGE
EXTENDED TYPE
NUMBER
PINS
PIN POSITION
MATERIAL
CODE
TDA6103Q
9
DBS9
plastic
SOT111BE
BLOCK DIAGRAM
VDD
6
VDD
3x
VDD
VDD
MIRROR 2
TDA6103Q
VDD
VDD
MIRROR 3
FLASHDIODE
Voc
(3x)
9,8,7
inverting
input
(3x)
1,2,3
1x
CURRENT
SOURCES
Vbias
LEVELSHIFTER 1
DIFFERENTIAL
STAGE
5
LEVELSHIFTER 2
THERMAL
PROTECTION
MIRROR 1
4
GND
Fig.1 Block diagram (one amplifier shown).
March 1994
2
MGA968
non-inverting
input
Vip
Philips Semiconductors
Preliminary specification
Triple video output amplifier
TDA6103Q
PINNING
SYMBOL
PIN
DESCRIPTION
V i1
1
inverting input 2
Vi2
2
3
inverting input 3
Vi3
3
GND
4
ground, fin
GND
4
Vip
5
non-inverting input
Vip
5
VDD
6
supply voltage
7
cathode output 3
V DD
6
Voc3
Voc2
8
cathode output 2
Voc3
7
Voc1
9
cathode output 1
Voc2
8
V oc1
9
Vi1
1
inverting input 1
Vi2
2
Vi3
TDA6103Q
MGA969
Fig.2 Pin configuration.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134). Voltages measured with respect to GND (pin 4);
currents as specified in Fig.1; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDD
supply voltage
0
250
V
Vi
input voltage
0
12
V
Vidm
differential mode input voltage
−6
+6
V
Voc
cathode output voltage
0
VDD
V
IocsmL
LOW non-repetitive peak cathode
output current
flashover discharge = 50 µC
0
5
A
IocsmH
HIGH non-repetitive peak cathode
output current
flashover discharge = 100 nC
0
10
A
Tstg
storage temperature
−55
+150
°C
Tj
junction temperature
−20
+150
°C
Ves
electrostatic handling
human body model (HBM)
−
tbf
V
machine model (MM)
−
tbf
V
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling MOS devices (see “Handling MOS Devices”).
QUALITY SPECIFICATION
Quality specification “SNW-FQ-611 part E” is applicable and can be found in the “Quality reference pocketbook” (ordering
number 9398 510 34011).
March 1994
3
Philips Semiconductors
Preliminary specification
Triple video output amplifier
TDA6103Q
THERMAL RESISTANCE
SYMBOL
PARAMETER
THERMAL RESISTANCE
Rth j-fin
from junction to fin; note 1
11 K/W
Rth h-a
from heatsink to ambient
18 K/W
Note
1. An external heatsink is necessary.
Thermal protection
The internal thermal protection circuit gives a decrease of
the slew rate at high temperatures: 10% decrease at
130 °C and 30% decrease at 145 °C (typical values on the
spot of the thermal protection circuit).
MGA972
6
5
P tot
(W)
4
(1)
3
(2)
OUTPUTS
2
5 K/W
1
Thermal protection circuit
0
–50
0
50
6 K/W
100
150
T amb ( o C)
FIN
MGA970
(1) Infinite heatsink.
(2) No heatsink.
Fig.3 Power derating curves.
March 1994
Fig.4 Equivalent thermal resistance network.
4
Philips Semiconductors
Preliminary specification
Triple video output amplifier
TDA6103Q
CHARACTERISTICS
Operating range: Tj = −20 to 150 °C; VDD = 180 to 210 V; Vip = 1 to 4 V.
Test conditions (unless otherwise specified): Tamb = 25 °C; VDD = 200 V; Vip = 1.3 V; Voc1 = Voc2 = Voc3 = 1⁄2VDD;
CL = 10 pF (CL consists of parasitic and cathode capacitance); Rth h-a = 18 K/W; measured in test circuit Fig.5.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
IDD
quiescent supply current
7.0
9.25
11.5
mA
Ibias
input bias current inverting inputs
(pins 1, 2 and 3)
−5
−1
+1
µA
Ibias
input bias current non-inverting
input (pin 5)
−15
−3
+1
µA
Vi(offset)
input offset voltage
(pins 1, 2 and 3)
−50
−
+50
mV
∆Vi(offset) differential input offset voltage
temperature drift between pins 1
and 5; 2 and 5; 3 and 5
−
tbf
−
mV/K
Cicm
common-mode input capacitance
(pins 1, 2 and 3)
−
5
−
pF
Cicm
common-mode input capacitance
(pin 5)
−
10
−
pF
Cidm
differential mode input capacitance
between 1 and 5; 2 and 5; 3 and 5
−
1
−
pF
Voc(min)
minimum output voltage
(pins 7, 8 and 9)
V1−5 = V2−5 = V3−5 = −1 V
−
5
10
V
Voc(max)
maximum output voltage
(pins 7, 8 and 9)
V1−5 = V2−5 = V3−5 = 1 V;
note 1
VDD − 10 VDD − 6
−
V
GB
gain-bandwidth product of
open-loop gain:
Voc1, 2, 3 / Vi1-5, 2-5, 3-5
f = 500 kHz
−
0.75
−
GHz
BS
small signal bandwidth
(pins 7, 8 and 9)
Voc(p-p) = 60 V
6
7.5
−
MHz
BL
large signal bandwidth
(pins 7, 8 and 9)
Voc(p-p) = 100 V
5
7
−
MHz
tpd
cathode output propagation delay
time 50% input to 50% output
(pins 7, 8 and 9)
Voc(p-p) = 100 V square
wave; f < 1 MHz;
tr = tf = 40 ns (pins 1, 2
and 3); see Figs 7 and 8
−
38
−
ns
∆tp
difference in cathode output
propagation time 50% input to
50% output (pins 7 and 8, 7 and 9
and 8 and 9)
Voc(p-p) = 100 V square
wave; f < 1 MHz;
tr = tf = 40 ns (pins 1, 2
and 3)
−10
0
+10
ns
tr
cathode output rise time 10%
output to 90% output
(pins 7, 8 and 9)
Voc = 50 to 150 V square
48
wave; f < 1 MHz; tf = 40 ns
(pins 1, 2 and 3); see Fig.7
60
73
ns
tf
cathode output fall time 90% output Vo = 150 to 50 V square
48
to 10% output (pins 7, 8 and 9)
wave; f < 1 MHz; tr = 40 ns
(pins 1, 2 and 3); see Fig.8
60
73
ns
March 1994
5
Philips Semiconductors
Preliminary specification
Triple video output amplifier
SYMBOL
PARAMETER
TDA6103Q
CONDITIONS
MIN.
TYP.
MAX.
UNIT
ts
settling time 50% input to
(99% < output < 101%)
Voc(p-p) = 100 V square
wave; f < 1 MHz;
tr = tf = 40 ns (pins 1, 2
and 3); see Figs 7 and 8
−
−
350
ns
SR
slew rate between
V1−5 = V2−5 = V3−5 = 2 V
50 V to (VDD − 50 V); (pins 7, 8 and square wave (p-p);
9)
f < 1 MHz; tr = tf = 40 ns
(pins 1, 2 and 3)
−
1600
−
V/µs
Ov
cathode output voltage overshoot
(pins 7, 8 and 9)
Voc(p-p) = 100 V square
wave; f < 1 MHz;
tr = tf = 40 ns (pins 1, 2
and 3); see Figs 7 and 8
−
5
−
%
SVRR
supply voltage rejection ratio
f < 50 kHz; note 2
−
70
−
dB
Notes
1. See also Fig.6 for the typical low-frequency response of Vi to Voc.
2. The ratio of the change in supply voltage to the change in input voltage when there is no change in output voltage.
needed (for this resistor-value, the CRT has to be
connected to the main PCB). This addition produces an
increase in the rise- and fall times of approximately 5 ns
and a decrease in the overshoot of approximately 3%.
Cathode output
The cathode output is protected against peak currents
(caused by positive voltage peaks during high-resistance
flash) of 5 A maximum with a charge content of 50 µC.
VDD to GND must be decoupled:
The cathode is also protected against peak currents
(caused by positive voltage peaks during low-resistance
flash) of 10 A maximum with a charge content of 100 nC.
1. With a capacitor >20 nF with good HF behaviour (e.g.
foil). This capacitance must be placed as close as
possible to pins 6 and 4, but definitely within 5 mm.
The DC voltage of VDD (pin 6) must be within the operating
range of 180 to 210 V during the peak currents.
2. With a capacitor >10 µF on the picture tube base print.
Switch-off behaviour
Flashover protection
The switch-off behaviour of the TDA6103Q is controllable.
This is due to the fact that the output pins of the
TDA6103Q are still under control of the input pins for
relative low-power supply voltages (approximately 30 V
and higher).
The TDA6103Q incorporates protection diodes against
CRT flashover discharges that clamp the cathode output
voltage up to a maximum of VDD + Vdiode. To limit the diode
current, an external 1.5 kΩ carbon high-voltage resistor in
series with the cathode output and a 2 kV spark gap are
March 1994
6
Philips Semiconductors
Preliminary specification
Triple video output amplifier
TDA6103Q
Test circuit
C par
R4
V DD
100 kΩ
C11
100 nF
C par
Voc1
R5
100 kΩ
Vi1
C1
C7
22 µF
8.2 pF
C2
22 nF
1
R1
Vin1
0.987
mA
C3
C12
3.2
pF
6
9
TDA6103Q
Vi2
C4
22 nF
Vi3
8.2 pF
0.987
mA
C9
22 µF
8.2 pF
C6
22 nF
Vin3
0.987
mA
7
3
C10
100
nF
C16
6.8
pF
R9
2 MΩ
C17
136
pF
R10
100 kΩ
C19
6.8
pF
R11
2 MΩ
C20
136
pF
R12
100 kΩ
probe 1
probe 2
Voc3
5
4
1.3 V
R8
100 kΩ
3
R3
667 Ω
C15
3.2
pF
8
2
667 Ω
C5
C14
136
pF
Voc2
2
R2
Vin2
R7
2 MΩ
1
667 Ω
C8
22 µF
C13
6.8
pF
C par
C18
3.2
pF
probe 3
R6
100 kΩ
MGA976
Cpar = 70 fF.
Fig.5 Test circuit with feedback factor 1⁄150.
March 1994
7
Philips Semiconductors
Preliminary specification
Triple video output amplifier
TDA6103Q
MGA973
200
194
188
Voc
100
5
0
1.2
0
0.633
0.583
∆V i
1.1 1.2
Fig.6 Typical low-frequency (f < 1 MHz) response of ∆Vi1, 2,3 to Voc1, 2,3.
x
Vi
0
t
x
ts
overshoot (in %)
Voc
151
150
140
149
100
60
50
t
tr
MGA974
t pd
Fig.7 Output voltage (pins 7, 8 and 9) rising edge as a function of the AC input signal.
March 1994
8
Philips Semiconductors
Preliminary specification
Triple video output amplifier
TDA6103Q
x
Vi
0
t
x
ts
150
140
Voc
100
overshoot (in %)
51
60
50
49
t
tf
MGA975
t pd
Fig.8 Output voltage (pins 7, 8 and 9) falling edge as a function of the AC input signal.
March 1994
9
R5
R9
100 kΩ
R17
47 Ω
220 Ω
3.3 kΩ
R10
680 Ω
X1
C6
10 µF
(250 V)
100 kΩ
1
2
3
R25
1.2 Ω
4
185 V
AQUA
V ff
V ff (GND)
R13
470 Ω
TDA6103Q
EHT
C1
X3
R
G
B
GND
1
4
3
2
1
R6
3.3 kΩ
3
4
5
6
7
8
9
C5
R7
470 Ω
2
R12
680 Ω
100
nF
10
R15
470 Ω
C4
220 nF
R21
R19
220
kΩ
R20
1.5
kΩ
1.5 kΩ
kR
R22
kG
1.5 kΩ
R4
R8
R18
3.3 kΩ
100 kΩ
R11
680 Ω
R14
470 Ω
A51EAL . . X02
kB
R23
1.5 kΩ
C2
470 Ω
Philips Semiconductors
R24
Triple video output amplifier
R16
TEST AND APPLICATION INFORMATION
March 1994
C3
g1 g2 g3
C7
2.7 nF
(500 V)
C8
2.7 nF
(500 V)
optional
R26
1.5 kΩ
MGA977
C9
1 nF
(2000 V)
Vg2
X2
Preliminary specification
TDA6103Q
Fig.9 Application diagram.
AQUA
X4
Philips Semiconductors
Preliminary specification
Triple video output amplifier
1,2,3
TDA6103Q
to
differential
stage
GND
VDD
4
6
TDA6103Q
from
input
circuit
(1)
7,8,9
Vbias
5
to
differential
stage
to
differential
stage
from
input
to
differential circuit
stage
MGA971
(1) All pins have an energy protection for positive or negative overstress situations.
Fig.10 Internal pin configuration.
Dissipation
Regarding dissipation, distinction must first be made between static dissipation (independent of frequency) and dynamic
dissipation (proportional to frequency).
The static dissipation of the TDA6103Q is due to voltage supply currents and load currents in the feedback network and
CRT.
The static dissipation equals:
Pstat = VDD × IDD − 3 × Voc × (Voc/Rfb − IOC)
Rfb = value of feedback resistor.
IOC = DC-value of cathode current.
The dynamic dissipation equals:
Pdyn = 3 × VDD × (CL + Cfb + Cint) × fi × Vo(p-p) × δ
CL = load capacitance.
Cfb = feedback capacitance.
Cint = internal load capacitance (≈4 pF).
fi = input frequency.
Vo(p-p) = output voltage (peak-to-peak value).
δ = non-blanking duty-cycle.
The IC must be mounted on the picture tube base print to minimize the load capacitance (CL).
March 1994
11
Philips Semiconductors
Preliminary specification
Triple video output amplifier
TDA6103Q
PACKAGE OUTLINE
22.00
21.35
21.4
20.7
15.1
14.9
2.75
2.50
(2x)
8.7
8.0
3.85
3.45
3.4
3.2
1.75
1.55
fin
5.9
5.7 4.4
4.2
18.5
17.8
6.48
6.14
2
3
4
5
6
7
seating plane
1
8
9
1.1
0.7
0.76
3.9
3.4
1.0
0.3
1.40
1.14
1.0
0.7
2.54
(8x)
0.45
0.25
0.67
0.50
1.40
1.14
0.47
0.38
0.25 M
(9x)
2.54
65 o
55 o
MBC376 - 1
Dimensions in mm.
Fig.11 Plastic SIL-bent-to-DIL, medium power with fin, 9-pin (SOT111BE).
March 1994
12
Philips Semiconductors
Preliminary specification
Triple video output amplifier
TDA6103Q
SOLDERING
Plastic single in-line packages
BY DIP OR WAVE
The maximum permissible temperature of the solder is
260 °C; this temperature must not be in contact with the
joint for more than 5 s. The total contact time of successive
solder waves must not exceed 5 s.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified storage maximum. If the printed-circuit board has
been pre-heated, forced cooling may be necessary
immediately after soldering to keep the temperature within
the permissible limit.
REPAIRING SOLDERED JOINTS
Apply the soldering iron below the seating plane (or not
more than 2 mm above it). If its temperature is below
300 °C, it must not be in contact for more than 10 s; if
between 300 and 400 °C, for not more than 5 s.
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
March 1994
13
Philips Semiconductors
Preliminary specification
Triple video output amplifier
TDA6103Q
NOTES
March 1994
14
Philips Semiconductors
Preliminary specification
Triple video output amplifier
TDA6103Q
NOTES
March 1994
15
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Tel. (071)436 41 44, Fax. (071)323 03 42
United States: INTEGRATED CIRCUITS:
811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. (800)234-7381, Fax. (708)296-8556
DISCRETE SEMICONDUCTORS: 2001 West Blue Heron Blvd.,
P.O. Box 10330, RIVIERA BEACH, FLORIDA 33404,
Tel. (800)447-3762 and (407)881-3200, Fax. (407)881-3300
Uruguay: Coronel Mora 433, MONTEVIDEO,
Tel. (02)70-4044, Fax. (02)92 0601
For all other countries apply to: Philips Semiconductors,
International Marketing and Sales, Building BAF-1,
P.O. Box 218, 5600 MD, EINDHOVEN, The Netherlands,
Telex 35000 phtcnl, Fax. +31-40-724825
SCD29
© Philips Electronics N.V. 1994
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