STMICROELECTRONICS TDA7416

TDA7416
CARRADIO SIGNAL PROCESSOR
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3 STEREO INPUTS
1 PSEUDO DIFFERENTIAL STEREO INPUT
VOLUME CONTROL
7 BAND EQUALIZER FILTER CONTROL
HIGH PASS FILTER FOR SUBWOOFER
APPLICATION
DIRECT MUTE AND SOFT MUTE
4 INDEPENDENT SPEAKER OUTPUTS
SOFT STEP SPEAKER CONTROL
SUBWOOFER OUTPUT WITH SOFT STEP
7 BAND SPECTRUM ANALYZER
FULL MIXING CAPABILITY
HPF2 WITH ZEROCROSS
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I2C-BUS INTERFACE
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TQFP44
ORDERING NUMBER: TDA7416
DESCRIPTION
The device includes a high performance audioprocessor with 7 bands equalizer and spectrum analyzer. The digital control allows a programming in
a wide range of all the filter characteristics.
September 2003
AUXL
MDR
MDL
AMR
AML
N.C.
Cref
ACOUTSW
ACINSW
ACOUTR
N.C.
PIN CONNECTION (Top view)
44
43
42
41
40
39
38
37
36
35
34
29
VDD
N.C.
6
28
AC2INL
PDR+
7
27
AC2OUTL
MIX
8
26
FILOL
N.C.
9
25
OUTLF
GND
10
24
OUTLR
N.C.
11
23
N.C.
12
13
14
15
16
17
18
19
20
21
22
OURF
5
OUTRR
VREFOUT
PD-
AC2INR
ACINL
30
FILOR
31
4
AC2OUT3
3
PDL+
OUTSW
AUXR
MUTE
ACOUTL
SAOUT
ACINR
32
SAIN
33
2
SCL
1
N.C.
SDA
N.C.
TQFP44
1/27
TDA7416
SUPPLY
Symbol
Parameter
Test Conditions
VS
Supply Voltage
IS
Supply Current
VS = 9V
Ripple Rejection @ 1kHz
Audioprocessor (all Filters flat)
SVRR
Min.
Typ.
Max.
Unit
7.5
9
10
V
35
45
55
mA
60
dB
THERMAL DATA
Symbol
Description
Rth j-pins
Thermal Resistance Junction-pins max
Value
Unit
65
°C/W
Value
Unit
10.5
V
-40 to 85
°C
-55 to +150
°C
ABSOLUTE MAXIMUM RATINGS
Symbol
VS
Parameter
Operating Supply Voltage
Tamb
Operating Temperature Range
Tstg
Storage Temperature Range
ESD:
All pins are protected against ESD according to the MIL883 standard.
2/27
TDA7416
BLOCK DIAGRAM
3/27
TDA7416
FEATURES
Input multiplexer
–
–
–
–
–
1 pseudo differential CDC stereo input, programmable as single-ended input
3 single-ended stereo inputs
Input gain adjust 0 to 15dB with 1dB steps
direct mute
internal offset-cancellation (autozero)
Mixing stage
– mixable mix input to Front speaker outputs
– Input controls +15 to -79dB with 1dB steps
– direct mute
Loudness
– programmable center frequency and filter slope
– 19dB with 1dB steps
– selectable flat-mode (constant attenuation)
Volume
– +32 to -79.5dB with 0.5dB step resolution
– soft-step control with programmable blend times
– 100dB range
Equalizer
–
–
–
–
–
seven bands
2nd order frequency response
center frequency programmable for lowest and highest filter
programmable quality factor in four steps for each filter
-15 to 15dB range with 1dB resolution
Spectrum analyzer
– seven bandpass filters
– 2nd order frequency response
– programmable quality factor for different visual appearance
– analog output
– controlled by external serial clock
High pass
– 2nd order butterworth highpass with programmable cut-off frequency
– selectable flat-mode
Speaker
– 4 independent soft step speaker controls, +15 to -79dB with 1dB steps
– mute
– 4 independent programmable mix inputs with 50% mixing ratio
Subwoofer
– single-ended monaural output
– independent soft step level control +15 to -79dB with 1dB steps
Mute functions
– direct mute
– digitally controlled SoftMute with 3 programmable mute-times
Effect
– Gain effect or high pass effect fixed external components
4/27
TDA7416
Table 1. ELECTRICAL CHARACTERISTICS
(VS=9V; Tamb=25°C; RL=10kΩ; all gains=0dB; f=1kHz; unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
70
100
130
kΩ
INPUT SELECTOR
Rin
Input Resistance
VCL
Clipping Level
1.8
2.2
VRMS
SIN
Input Separation
80
100
dB
GIN MIN
Min. Input Gain
-1
0
GIN MAX
Max. Input Gain
13
15
17
dB
GSTEP
Step Resolution
0.5
1
1.5
dB
Adjacent Gain Steps
-5
1
5
mV
GMIN to GMAX
-10
1
10
mV
VDC
Voffset
DC Steps
all single ended Inputs
Remaining offset with Autozero
1
0.5
dB
mV
DIFFERENTIAL STEREO INPUTS
Rin
CMRR
eNO
Input Resistance (see Fig. 1)
Differential
70
100
Common Mode Rejection Ratio
VCM = 1VRMS @ 1kHz
46
70
dB
VCM = 1VRMS @ 10kHz
46
60
dB
11
µV
Output-Noise @ Speaker-Outputs 20Hz - 20kHz, flat; all stages 0dB
130
kΩ
MIXING CONTROL
MLEVEL
Mixing Ratio
Main / Mix-Source
-6/-6
dB
GMAX
Max. Gain
13
15
17
dB
AMAX
Max. Attenuation
-83
-79
-75
dB
ASTEP
Attenuation Step
0.5
1
1.5
dB
0.5
1
1.5
dB
LOUDNESS CONTROL
ASTEP
Step Resolution
AMAX
Max. Attenuation
fPeak
Peak Frequency
-21
-19
-17
dB
fP1
180
200
220
Hz
fP2
360
400
440
Hz
fP3
540
600
660
Hz
fP4
720
800
880
Hz
VOLUME CONTROL
GMAX
Max. Gain
18
20
22
dB
AMAX
Max. Attenuation
-83
-79
-75
dB
ASTEP
Step Resolution
0
0.5
1
dB
EA
ET
VDC
Attenuation Set Error
G = -20 to +20dB
-0.75
0
+0.75
dB
G = -80 to -20dB
-4
0
3
dB
Tracking Error
DC Steps
2
dB
Adjacent Attenuation Steps
0.1
3
mV
From 0dB to GMIN
0.5
5
mV
SOFT MUTE
AMUTE
Mute Attenuation
80
100
dB
5/27
TDA7416
Table 1. ELECTRICAL CHARACTERISTICS (continued)
(VS=9V; Tamb=25°C; RL=10kΩ; all gains=0dB; f=1kHz; unless otherwise specified)
Symbol
TD
Parameter
Test Condition
Delay Time
Typ.
Max.
Unit
T1
0.48
1
ms
T2
0.96
2
ms
123
170
ms
1
V
T3
Min.
70
VTH low
Low Threshold for SM-Pin
VTH high
High Threshold for SM - Pin
2.5
RPU
Internal pull-up resistor
32
VPU
Internal pull-up Voltage
1)
V
45
58
3.3
kΩ
V
EQUALIZER CONTROL
CRANGE
ASTEP
Control Range
+14
+15
+16
dB
Step Resolution
0.5
1
1.5
dB
55
62
69
Hz
fC1
Center Frequency Band 1
fC1b
90
100
110
Hz
fC2
Center Frequency Band 2
fC2
141
157
173
Hz
fC3
Center Frequency Band 3
fC3
365
396
437
Hz
fC4
Center Frequency Band 4
fC4
0.9
1
1.1
kHz
fC5
Center Frequency Band 5
fC5
2.25
2.51
2.76
kHz
fC6
Center Frequency Band 6
fC6a
3.6
4
4.4
kHz
fC6b
5.70
6.34
6.98
kHz
fC7
Center Frequency Band 7
fC7a
13.5
15
16.5
kHz
fC7b
14.4
16
17.6
kHz
Q1
0.9
1
1.1
Q2
1.26
1.4
1.54
Q3
1.62
1.8
1.98
Q4
1.98
2.2
2.44
-1
0
+1
Q
DCGAIN
Quality Factor
DC-gain, Band 1
fC1a
DC = off
DC = on, 15dB boost
4
dB
dB
SPECTRUM ANALYZER CONTROL
VSAOut
Output Voltage Range
0
3.3
V
fC1
Center Frequency Band 1
fC1
55
62
69
Hz
fC2
Center Frequency Band 2
fC2
141
157
173
Hz
fC3
Center Frequency Band 3
fC3
356
396
436
Hz
fC4
Center Frequency Band 4
fC4
0.9
1
1.1
kHz
fC5
Center Frequency Band 5
fC5
2.26
2.51
2.76
kHz
fC6
Center Frequency Band 6
fC6
5.70
6.34
6.98
kHz
fC7
Center Frequency Band 7
fC7
14.4
16
17.6
kHz
Q
Quality Factor
Q1
1.62
1.8
1.98
Q2
3.15
3.5
3.85
fSAClk
Clock Frequency
1
tSAdel
Analog Output Delay Time
2
1) The SM-Pin is active low (Mute = 0)
6/27
100
kHz
µs
TDA7416
Table 1. ELECTRICAL CHARACTERISTICS (continued)
(VS=9V; Tamb=25°C; RL=10kΩ; all gains=0dB; f=1kHz; unless otherwise specified)
Symbol
Parameter
trepeat
Spectrum Analyzer Repeat Time
tintres
Internal Reset Time
Test Condition
Min.
Typ.
Max.
50
Unit
ms
3
ms
±20
mV
22
dB
HPF2
VTH
Zero Crossing Threshold
EMAX
Max. Effect
EMIN
Min. Effect
ESTEP
4
Step Resolution
1.5
2
dB
2.5
dB
SPEAKER ATTENUATORS
Rin
Input Impedance
35
50
65
kΩ
GMAX
Max. Gain
13
15
17
dB
AMAX
Max. Attenuation
-83
-79
-75
dB
ASTEP
Step Resolution
0.5
1
1.5
dB
AMUTE
Output Mute Attenuation
80
90
EE
Attenuation Set Error
VDC
DC Steps
Adjacent Attenuation Steps
MR
Mixing Ratio
Signal/MixIn
0.5
dB
3
dB
5
mV
50/50
%
2.2
VRMS
AUDIO OUTPUTS
VCLIP
Clipping Level
RL
Output Load Resistance
CL
Output Load Capacitance
ROUT
Output Impedance
VDC
DC Voltage Level
Thd=0.3%
1.8
2
4.3
kΩ
10
nF
30
120
Ω
4.5
4.7
V
HIGH PASS
fHP
Highpass corner frequency
fHP1
81
90
99
Hz
fHP2
122
135
148
Hz
fHP3
162
180
198
Hz
fHP4
194
215
236
Hz
SUBWOOFER ATTENUATOR
Rin
Input Impedance
35
50
65
kΩ
GMAX
Max. Gain
14
15
16
dB
AATTN
Max. Attenuation
-83
-79
-75
dB
ASTEP
Step Resolution
0.5
1
1.5
dB
AMUTE
Output Mute Attenuation
80
90
EE
VDC
Attenuation Set Error
DC Steps
Adjacent Attenuation Steps
dB
2
dB
1
5
mV
SUBWOOFER Lowpass
fLP
Lowpass corner frequency
fLP1
72
80
88
Hz
fLP2
108
120
132
Hz
fLP3
144
160
176
Hz
7/27
TDA7416
Table 1. ELECTRICAL CHARACTERISTICS (continued)
(VS=9V; Tamb=25°C; RL=10kΩ; all gains=0dB; f=1kHz; unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
3
15
µV
20
µV
µV
GENERAL
eNO
Output Noise
BW = 20Hz - 20kHz
output muted
BW = 20Hz - 20kHz
all gains = 0dB
single ended inputs
S/N
d
Signal to Noise Ratio
distortion
15
all gains = 0dB
flat; VO = 2VRMS
103
dB
All EQ-bands at +12dB; Q = 1.0
a-weighted; VO = 2.6VRMS
87
dB
VIN = 1VRMS; all stages 0dB
VOUT = 1VRMS; Bass & Treble = 12dB
SC
1
Channel Separation left/right
80
0.01
0.1
0.05
0.1
90
1.1 Input stages
In the basic configuration one pseudo-differential, three single ended stereo are available.
Figure 1. Input-stages
Vref
1
IN1Main Selector
-
Pseudo
differential
Mute
IN1
IN2
+
IN3
IN4
1
InGain
IN1+
Vref
Vref
Rear Selector
IN1
IN2
IN2
Vref
Mute
IN3
IN4
Fader
IN3
Vref
IN4
Vref
8/27
Vref
%
dB
DESCRIPTION OF THE AUDIOPROCESSOR PART
Stereo
%
TDA7416
1.1.1 Pseudo-differential stereo Input (IN1)
The IN1-input is implemented as a buffered pseudo-differential stereo stage with 100kΩ input-impedance
at each input pin. This input is also configurable as single-ended stereo input . The common input-pin, IN1features a fast charge switch to speed up the charge time of external capacitors.- This switch is released
the first time the input-selector data-byte (0) is assessed.
1.1.2 Single-ended stereo Inputs
All single ended inputs have an input impedance of 100kΩ.
1.2 AutoZero
The AutoZero allows a reduction of the number of pins as well as external components by canceling any
offset generated by or before the In-Gain-stage (Please notice that externally generated offsets, e.g. generated through the leakage current of the coupling capacitors, are not canceled).
The auto-zeroing is started every time the DATA-BYTE 0 is selected and needs max. 0.3ms for the alignment. To avoid audible clicks the Audioprocessor have to be muted by softmute or hard mute during this
time.
1.2.1 AutoZero-Remain
In some cases, for example if the µP is executing a refresh cycle of the IIC-Bus-programming, it is not
useful to start a new AutoZero-action because no new source is selected and an undesired mute would
appear at the out-puts. For such applications the TDA7416 could be switched in the AutoZero-RemainMode (Bit 6(I1) of the subad-dress-byte). If this bit is set to high, the DATABYTE 0 could be loaded without
invoking the AutoZero and the old adjustment-value remains.
1.3 Loudness
There are four parameters programmable in the loudness stage:
1.3.1 Attenuation
Figure 2 shows the attenuation as a function of frequency at fP = 400Hz
Figure 2. Loudness Attenuation @ fP = 400Hz.
0.0
-5.0
-10.0
dB
-15.0
-20.0
-25.0
10.0
100.0
1.0K
10.0K
Hz
9/27
TDA7416
1.3.2 Peak Frequency
Figure 3 shows the four possible peak-frequencies at 200, 400, 600 and 800Hz
Figure 3. Loudness Center frequencies @ Attn. = 15dB
0.0
-5.0
dB
-10.0
-15.0
-20.0
10.0
100.0
1.0K
10.0K
Hz
1.3.3 Loudness filter order
Different shapes of 1st and 2nd-Order Loudness
Figure 4. 1st and 2nd Order Loudness @ Attn. = 15dB, fP=400Hz
0.0
-5.0
dB
-10.0
-15.0
-20.0
10.0
100.0
Hz
1.0K
1.3.4 Flat Mode
In flat mode the loudness stage works as a 0dB to -19dB attenuator.
10/27
10.0K
TDA7416
1.4 SoftMute
The digitally controlled SoftMute stage allows muting/demuting the signal with a I2C-bus programmable
slope. The mute process can either be activated by the SoftMute pin or by the I2C-bus. This slope is realized in a special S-shaped curve to mute slow in the critical regions (see Figure 5).
For timing purposes the Bit0 of the I2C-bus output register is set to 1 from the start of muting until the end
of de-muting.
Figure 5. Soft Mute-Timing
Note: Please notice that a started Mute-action is always terminated and could not be interrupted by a change of the mute -signal.
1.5 SoftStep Volume and Speaker
When the speaker-level is changed audible clicks could appear at the output. The root cause of those
clicks could either be a DC-Offset before the speaker-stage or the sudden change of the envelope of the
audio signal. With the SoftStep-feature both kinds of clicks could be reduced to a minimum and are no
more audible. The blend-time from one step to the next is programmable in four steps.
Figure 6. SoftStep-Timing for Volume
1dB
0.5dB
SS Time
-0.5dB
-1dB
Note: For steps more than 0.5dB (Volume) or 1dB (Speaker) the SoftStep mode should be deactivated because it could generate a hard 1dB
step during blending.
11/27
TDA7416
1.6 Equalizer filter
There are three parameters programmable in the equalizer filter:
1.6.1 Attenuation
Figure 7 shows the boost and cut response as a function of frequency at a center frequency of 1kHz.
Figure 7. Equalizer filter control @ fCenter = 1kHz, Q = 1.0
15
dB
10
5
0
-5
-10
-15
20
100
10k
1k
20k
Hz
1.6.2 Center Frequency
This parameter is programmable in the filter stage 1(62/100Hz), 6(4/6.34kHz) and 7(15/16kHz) only.
Figure 8 shows the center frequencies 62, 156, 396, 1000, 2510, 6340 and 15000Hz of the 7 equalizer
filters.
Figure 8. Center frequencies @ Gain = 15dB, Q = 1.0
16
dB
14
12
10
8
6
4
2
0
-2
12/27
10
100
1k
Hz
20k
TDA7416
1.6.3 Quality Factors
Figure 9 shows the four possible quality factors 1, 1.4, 1.8 and 2.2
Figure 9. Quality factors @ boost = 15dB, fCenter = 1kHz
16
dB
14
12
10
8
6
4
2
0
-2
10
100
1k
Hz
20k
1.6.4 Superposition of all EQ Filters
Figure 10 shows the superposition of all equalizer filter curves for different quality factors. The gain for all
filters is +15dB.
Figure 10. Superposition of all EQ bands @ boost = 15dB
18
dB
16
14
12
10
8
6
4
2
0
10
100
1k
Hz
20k
13/27
TDA7416
1.6.5 DC-mode of equalizer band 1 (62/100 Hz)
In this mode, the DC-gain 4dB when set to 15dB boost.
Figure 11. EQ band1, normal- and DC-mode @ boost = 15 dB, fCenter = 62 Hz
16
dB
14
12
10
8
6
4
2
0
-1
1
Hz
1K
100
10
10K
Note: The center frequency, Q, DC-mode and boost/cut can be set fully independently for each filter.
1.7 Subwoofer Application
Figure 12. Subwoofer Application with Lowpass @ 80/120/160Hz and HighPass @ 90/135/180Hz
0.0
-10.0
-20.0
dB
-30.0
-40.0
-50.0
10.0
100.0
Hz
1.0K
10.0K
Both filters, the lowpass- as well as the highpass-filter, have butterworth characteristic so that their cut-off
frequen-cies are not equal but shifted by the factor 1.125 to get a flat frequency response.
14/27
TDA7416
1.8 Spectrum analyzer
A fully integrated seven band spectrum analyzer with programmable quality factor is present in the
TDA7416(Fig. 13).
The spectrum analyzer consists of seven band pass filters with rectifier and sample capacitor which stores
the maximum peak signal level since the last read cycle. This peak signal level can be read by a microprocessor at the SAout-pin. To allow easy interfacing to an analog port of the microprocessor, the output
voltage at this pin is re-ferred to device ground.
The microprocessor starts a read cycle with the negative going clock edge at the SAclk input. On the following positive clock edges, the peak signal level for the band pass filters is subsequently switched to
SAout. Each analog output data is valid after the time tSAdel. A reset of the sample capacitors is induced
whenever SAclk remains high for the time tintres. Note that a proper reset requires the clock signal SAclk
to be held at high potential. Figure 13 shows the block diagram and figure 14 illustrates the read cycle
timing of the spectrum analyzer.
Figure 13. Spectrum analyzer block diagram
Figure 14. Timing spectrum analyzer
15/27
TDA7416
1.9 AC-coupling
In some applications additional signal manipulations are desired. For this purpose an AC-coupling is
placed before the speaker(fader)-attenuators, which can be activated or internally shorted by I 2C-Bus. In
short condition the input-signal of the speaker-attenuator is available at the AC-outputs. The input-impedance of this AC-inputs is 50k . In addition there are Mix inputs available. With this inputs it is possible to
mix an external signal to every speaker with a mixing ratio of 50% (see figure 14).
The source of front and rear speaker can be set independently.
As source is choosable :
- internal dc coupling (not recommended)
- external ac coupling using ACin pins
ACoutL
SWout
1
1
Figure 15. AC/DC-coupling
SWin
Vref
ACinL
Vref
Front Fader
left channel
Highpass
fr
flat
RearFader
Subwoofer Fader
Lowpass
fr
flat
right channel
Rear selector
1.10 Front Speaker-Attenuator and Mixing
A Mixing-stage is placed after front speaker-attenuator and can be set independently to mixing-mode.
Having a full volume for the Mix-signal the stage offers a wide flexibility to adapt the mixing levels.
Figure 16. Output Selector
Volume
+15/-79dB
1dB step
Highpass2
1
OutF
25k
25k
Front
From M I Xin
Volume
+15/-79dB
1dB step
1.11 Audioprocessor Testing
During the Testmode, which can be activated by setting bit I2 of the subaddress byte and D0 of the audioprocessor testing byte, several internal signals are available at the Mix pin. During this mode the input
resistance of 100kOhm is disconnected from the pin. The internal signals available are shown in the Databyte specification.
16/27
TDA7416
I2C BUS INTERFACE
2
2.1 Interface Protocol
The interface protocol comprises:
-a start condition (S)
-a chip address byte (the LSB bit determines read / write transmission)
-a subaddress byte
-a sequence of data (N-bytes + acknowledge)
-a stop condition (P)
CHIP ADDRESS
SUBADDRESS
MSB
LSB
S 1 0 0 0 1 1 0 R/W ACK
MSB
T AZ
I
A
A
A
DATA 1...DATA n
A
LSB
MSB
A ACK
LSB
DATA
ACK
P
S = Start
R/W = “0” -> Receive-Mode (Chip could be programmed by µP)
“1” -> Transmission-Mode (Data could be received by µP)
ACK = Acknowledge
P = Stop
MAX CLOCK SPEED 500kbits/s
2.1.1 Auto increment
If bit I in the subaddress byte is set to “1”, the auto increment of the subaddress is enabled.
2.1.2 TRANSMITTED DATA (send mode)
MSB
X
LSB
X
X
X
X
X
X
SM
SM = Soft mute activated
X = Not Used
The transmitted data is automatically updated after each ACK.
Transmission can be repeated without new chip address.
2.1.3 Reset Condition
A Power-On-Reset is invoked if the Supply-Voltage is below than 3.5V. After that, the following data is written
automatically into the registers of all subaddresses:
MSB
1
LSB
1
1
1
1
1
1
0
The programming after POR is marked bold-face / underlined in the programming tables.
With this programming all the outputs are muted to VREF (VOUT= VDD/2).
17/27
TDA7416
2.2 SUBADDRESS (receive mode)
1MSB
LSB
FUNCTION
I2
I1
I0
A4
A3
A2
A1
A0
Audioprocessor Testmode
off
on
0
1
AutoZero Remain
off
on
0
1
Auto-Increment Mode
off
on
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
18/27
0
0
0
0
1
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Subaddress
Source Selector
Loudness
Volume
EQ Filter 1 (62/100Hz)
EQ Filter 2 (157Hz)
EQ Filter 3 (396Hz)
EQ Filter 4 (1kHz)
EQ Filter 5 (2.51kHz)
EQ Filter 6 (4/6.34kHz)
EQ Filter 7 (15/16kHz)
Mixing Programming
SoftMute
Subwoofer / Spectrum analyzer / HighPass
Configuration Audioprocessor I
Mixing Level Control
Speaker attenuator LF
Speaker attenuator RF
Speaker attenuator LR
Speaker attenuator RR
Subwoofer attenuator
Testing Audioprocessor
TDA7416
2.3 DATA BYTE SPECIFICATION
The status after Power-On-Reset is marked bold-face / underlined in the programming tables.
2.3.1 Input Selector (0)
MSB
LSB
FUNCTION
D7
D6
0
0
:
1
1
D5
0
0
:
1
1
D4
0
0
:
1
1
D3
D2
D1
D0
X
X
X
X
0
0
1
1
0
1
0
1
Source Selector
BUS/PD
AUX
MD
AM/FM
Input Gain
0dB
1dB
:
14dB
15dB
0
1
:
0
1
Mute
off
on
0
1
2.3.2 Loudness (1)
MSB
LSB
FUNCTION
D7
D6
0
0
1
1
0
1
D5
0
1
0
1
D4
D3
D2
D1
D0
0
0
:
0
0
:
1
:
0
0
:
1
1
:
0
:
0
0
:
1
1
:
0
:
0
0
:
1
1
:
1
:
0
1
:
0
1
:
1
:
Attenuation
0 dB
-1 dB
:
-14 dB
-15 dB
:
-19 dB
not allowed
Center Frequency
200Hz
400Hz
600Hz
800Hz
Loudness Order
First Order
Second Order
19/27
TDA7416
2.3.3 Volume (2)
MSB
LSB
ATTENUATION
D7
D6
D5
D4
D3
D2
D1
D0
0
0
:
0
0
0
:
0
0
0
:
1
1
0
0
:
0
0
0
:
0
1
1
:
1
1
0
0
:
0
0
0
:
1
0
0
:
X
X
0
0
:
1
1
1
:
1
0
0
:
1
1
0
0
:
1
1
1
:
1
0
0
:
1
1
0
0
:
0
0
0
:
1
0
0
:
1
1
0
0
:
0
0
1
:
1
0
0
:
1
1
0
1
:
0
1
0
:
1
0
1
:
0
1
Gain/Attenuation
(+32.0dB)
(+31.5dB)
:
+20.0dB
+19.5dB
+19.0dB
:
+0.5dB
0.0dB
-0.5dB
:
-79.0dB
-79.5dB
Note: It is not recommended to use a gain more than 20dB for system performance reason. In general, the max.
gain should be limited by software to the maximum value, which is needed for the system.
2.3.4 Equalizer (3,4,5,6,7,8,9)
MSB
LSB
FUNCTION
D7
D6
0
0
1
1
D5
0
1
0
1
D4
D3
D2
D1
D0
0
0
:
0
0
1
1
:
1
1
0
0
:
1
1
1
1
:
0
0
0
0
:
1
1
1
1
:
0
0
0
0
:
1
1
1
1
:
0
0
0
1
:
0
1
1
0
:
1
0
Equalizer cut/boost level
-15dB
-14dB
:
-1dB
0dB
0dB
+1dB
:
+14dB
+15dB
Equalizer Q-Factor
2.2
1.8
1.4
1.0
0
1
Equalizer Center Frequency (only Subaddresses 3,8,9)
62Hz(addr 3)/4kHz(addr 8)/15kHz(addr 9)
100Hz(addr 3)/6.24kHz(addr 8)/16kHz(addr 9)
0
1
DC mode EQ Band 1 (62/100 Hz, Subaddress. 4!)
on
off
20/27
TDA7416
2.3.5 Mixing Programming (10)
MSB
LSB
FUNCTION
D7
D6
D5
D4
D3
D2
D1
D0
0
1
0
0
1
1
Rear Source Selector
BUS’(PD)
AUX
MD
AM/FM
0
1
0
1
Mixing Target
Speaker LF off
Speaker LF on
Speaker RF off
Speaker RF on
0
1
0
1
0
1
Mixing
Mute
enable
ZeroCross on HPF2
on
off
X
X
Spectrum Analyzer Detect Point
After EQ
Before EQ
0
1
2.3.6 SoftMute & HPF2 (11)
MSB
LSB
FUNCTION
D7
D6
D5
D4
D3
D2
D1
D0
0
1
0
0
1
0
1
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
1
1
1
1
X
X
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
0
1
0
1
1
0
1
X
SoftMute
On (Mute)
Off
SoftMute Time
Mute time = 0.48ms
Mute time = 0.96ms
Mute time = 123ms
Secondary High Pass Enable
Filter available
No Filter (Gain)
Secondary High Pass effect (with ZeroCross)
4 dB
6 dB
8 dB
10 dB
12 dB
14 dB
16 dB
18dB
20dB
22dB
0dB
Note: It is recommended to set D3(Filter available or not) during initial mute.
21/27
TDA7416
2.3.7 Subwoofer Configuration / Spectrum Analyzer / HighPass (12)
MSB
D7
LSB
D6
D5
D4
D3
X
X
D2
D1
D0
0
0
1
1
0
1
0
1
Subwoofer Filter
off
80Hz
120Hz
160Hz
Subwoofer Coupling
AC using SWIn pin
DC
0
1
Spectrum Analyzer Q-Factor
3.5
1.8
0
1
High Pass Enable
Filter off
Filter on
0
1
0
0
1
1
FUNCTION
High Pass Cut-Off-Frequency
90Hz
135Hz
180Hz
225Hz
0
1
0
1
2.3.8 Configuration Audioprocessor I (13)
MSB
D7
LSB
D6
D5
D4
D3
D2
D1
0
1
0
1
0
1
0
0
1
1
0
1
0
1
0
1
22/27
0
1
0
1
FUNCTION
D0
PD Input Mode
single ended
pseudo differential
PD Input Gain
-6 dB
0 dB
SoftStep Volume
off
on
SoftStep Time
320µs
1.28ms
5.12ms
20.4ms
Loudness
flat
filter ON
Front AC Speaker
AC coupling (ACin)
DC coupling
Rear effect
No effect signal
Equalizing signal
TDA7416
2.3.9 Mixer Level Control (14)
MSB
LSB
ATTENUATION
D7
D6
D5
D4
D3
D2
D1
D0
1
0
:
0
0
0
0
:
0
0
:
1
1
1
0
:
0
0
0
0
:
0
0
:
0
0
1
0
:
0
0
0
0
:
0
1
:
0
0
X
1
:
0
0
0
0
:
1
0
:
1
1
X
1
:
0
0
0
0
:
1
0
:
1
1
X
1
:
0
0
0
0
:
1
0
:
1
1
X
1
:
1
0
0
1
:
1
0
:
0
1
X
1
1
0
0
:
0
0
:
0
0
X
Gain/Attenuation
+15dB
:
+ 1dB
0dB
0dB
- 1dB
:
-15dB
-16dB
:
-78dB
-79dB
Mute
2.3.10Speaker and Subwoofer Level Control (15,16,17,18,19)
MSB
LSB
ATTENUATION
D7
0
1
D6
D5
D4
D3
D2
D1
D0
0
:
0
0
0
0
:
0
:
0
:
1
:
1
:
1
1
0
:
0
0
0
0
:
1
:
1
:
0
:
0
:
0
1
0
:
0
0
1
1
:
0
:
1
:
0
:
1
:
1
X
1
:
0
0
0
0
:
0
:
0
:
0
:
0
:
1
X
1
:
0
0
0
0
:
0
:
0
:
0
:
0
:
1
X
1
:
0
0
0
0
:
0
:
0
:
0
:
0
:
1
X
1
:
1
0
0
1
:
0
:
0
:
0
:
0
:
1
X
Gain/Attenuation
+15dB
:
+ 1dB
0dB
0dB
- 1dB
:
-16dB
:
-32dB
:
-48dB
:
-64dB
-79dB
Mute
SoftStep On/Off
On
Off
23/27
TDA7416
2.3.11Testing Audioprocessor (20)
MSB
LSB
FUNCTION
D7
D6
D5
D4
D3
D2
D1
D0
0
1
0
1
0
1
0
1
X
0
1
X
X
X
0
1
0
1
0
1
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
1
1
1
0
0
0
1
1
0
0
1
1
0
0
1
0
0
1
0
1
Audioprocessor Testmode
off
on
Test-Multiplexer
Spectrum Analyzer Filter
62Hz
Spectrum Analyzer Filter 157Hz
Spectrum Analyzer Filter 396Hz
Spectrum Analyzer Filter
1kHz
Spectrum Analyzer Filter 2.51kHz
Spectrum Analyzer Filter 6.34kHz
Spectrum Analyzer Filter 16kHz
Switch-Ron measurement setup (Level input)
not used
200kHz Oscillator
NB-Hold
internal Reference
Clock
external
internal
AZ Function
off
on
SC-Clock
Fast Mode
Normal Mode
Note: This byte is used for testing or evaluation purposes only and must not set to other values than “11111110”
in the application!
24/27
TDA7416
IN 2R
IN 1L+
IN !-
42
41
40
A CoutR
34
43
A CoutSW
35
IN4L
36
IN 4R
37
IN 3L
38
IN 3R
39
IN2L
44
Figure 17. Application Diagram
1
33
2
32
3
31
4
30
5
29
6
28
7
27
8
26
9
25
10
24
11
23
A CoutL
VREFout
+VS1
AC2I nL
21
22
20
SWOut
19
17
SACLK SMute SAOut
18
16
SCL
15
SDA
14
13
MIX
12
-9
IN 1R+
FI LORA C2OutR AC2I nR OutRR
OutRF
AC2OutL
FI LOL
OutLF
OutLR
25/27
TDA7416
mm
DIM.
MIN.
TYP.
A
inch
MAX.
MIN.
TYP.
1.60
A1
0.05
A2
1.35
B
0.30
C
0.09
0.063
0.15
0.002
0.006
1.40
1.45
0.053
0.055
0.057
0.37
0.45
0.012
0.014
0.018
0.20
0.004
0.008
D
12.00
0.472
D1
10.00
0.394
D3
8.00
0.315
e
0.80
0.031
E
12.00
0.472
E1
10.00
0.394
E3
8.00
0.315
L
0.45
0.60
0.75
OUTLINE AND
MECHANICAL DATA
MAX.
0.018
0.024
L1
1.00
K
0°(min.), 3.5˚(typ.), 7°(max.)
0.030
0.039
TQFP44 (10 x 10)
D
D1
A
A2
A1
33
23
34
22
0.10mm
.004
B
E
B
E1
Seating Plane
12
44
11
1
C
L
e
K
TQFP4410
26/27
TDA7416
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
© 2003 STMicroelectronics - All rights reserved
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27/27