Si5944DU Vishay Siliconix Dual N-Channel 40-V (D-S) MOSFET FEATURES PRODUCT SUMMARY VDS (V) 40 RDS(on) (Ω) ID (A) 0.112 at VGS = 10 V 6a 0.171 at VGS = 4.5 V 4.9 Qg (Typ.) 2.2 nC PowerPAK ChipFET Dual 1 CC G1 4 S2 D1 7 D1 D2 Part # Code G2 D2 6 COMPLIANT Lot Traceability and Date Code D1 8 • DC-DC Power Supply XXX 3 RoHS APPLICATIONS Marking Code 2 S1 • Halogen-free • TrenchFET® Power MOSFET • New Thermally Enhanced PowerPAK® ChipFET® Package - Small Footprint Area - Low On-Resistance - Thin 0.8 mm Profile G1 D2 G2 5 Bottom View Ordering Information: Si5944DU-T1-GE3 (Lead (Pb)-free and Halogen-free) S1 S2 N-Channel MOSFET N-Channel MOSFET ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current (TJ = 150 °C) Symbol VDS VGS TC = 25 °C TC = 70 °C TA = 25 °C TA = 70 °C ID Continuous Source-Drain Diode Current TC = 25 °C TA = 25 °C IS Single Pulse Avalanche Current Avalanche Energy L = 0.1 mH IAS EAS Maximum Power Dissipation TC = 25 °C TC = 70 °C TA = 25 °C TA = 70 °C PD Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature)d, e Unit V a IDM Pulsed Drain Current Limit 40 ± 20 TJ, Tstg 6 4.87 3.28b, c 2.63b, c 10 8.33 A 1.68b, c 5 1.25 10 6.4 mJ 2.0b, c 1.3b, c - 55 to 150 260 W °C THERMAL RESISTANCE RATINGS Parameter Symbol Typical Maximum Unit RthJA t≤5s 52 62 Maximum Junction-to-Ambientb, f °C/W RthJC 15 18 Maximum Junction-to-Case (Drain) Steady State Notes: a. Package limited. b. Surface Mounted on 1" x 1" FR4 board. c. t = 5 s. d. See Solder Profile (http://www.vishay.com/ppg?73257). The PowerPAK ChipFET is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under Steady State conditions is 110 °C/W. Document Number: 73683 S-81449-Rev. B, 23-Jun-08 www.vishay.com 1 Si5944DU Vishay Siliconix SPECIFICATIONS TJ = 25 °C, unless otherwise noted Parameter Symbol Test Conditions Min. VDS VGS = 0 V, ID = 250 µA 40 Typ. Max. Unit Static Drain-Source Breakdown Voltage ΔVDS/TJ VDS Temperature Coefficient VGS(th) Temperature Coefficient ΔVGS(th)/TJ Gate-Source Threshold Voltage ID = 250 µA VGS(th) VDS = VGS, ID = 250 µA Gate-Source Leakage IGSS VDS = 0 V, VGS = ± 20 V Zero Gate Voltage Drain Current IDSS On-State Drain Currenta ID(on) Drain-Source On-State Resistancea Forward Transconductancea RDS(on) gfs V 32.6 mV/°C - 4.7 1 3 V ± 100 nA VDS = 40 V, VGS = 0 V -1 VDS = 40 V, VGS = 0 V, TJ = 55 °C - 10 VDS ≤ 5 V, VGS = 10 V 10 µA A VGS = 10 V, ID = 3.3 A 0.093 0.112 VGS = 4.5 V, ID = 2.6 A 0.137 0.165 VDS = 20 V, ID = 3.3 A 6.88 Ω S b Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Gate Resistance Rg Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time 210 VDS = 20 V, VGS = 0 V, f = 1 MHz 33 VDS = 20 V, VGS = 10 V, ID = 3.3 A 4.4 6.6 2.2 3.3 pF 17 VDS = 20 V, VGS = 4.5 V, ID = 3.3 A 1.2 f = 1 MHz 2.7 4.1 4 6 30 45 10 15 tf 6 9 td(on) 12 18 80 120 0.8 td(on) tr td(off) tr td(off) nC VDD = 20 V, RL = 7.6 Ω ID ≅ 2.63 A, VGEN = 10 V, Rg = 1 Ω VDD = 20 V, RL = 9.48 Ω ID ≅ 2.41 A, VGEN = 4.5 V, Rg = 1 Ω tf 6 9 8 15 Ω ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulse Diode Forward Current ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Reverse Recovery Fall Time ta Reverse Recovery Rise Time tb TC = 25 °C 8.33 10 IS = 3.0 A, VGS = 0 V IF = 3.0 A, dI/dt = 100 A/µs, TJ = 25 °C A 0.8 1.2 V 22 33 ns 18 27 nC 19 3 ns Notes: a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com 2 Document Number: 73683 S-81449-Rev. B, 23-Jun-08 Si5944DU Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 10 5 VGS = 10 V thru 5 V 4 I D - Drain Current (A) ID - Drain Current (A) 8 6 4 VGS = 4 V 2 3 2 TC = 125 °C 1 TC = 25 °C VGS = 3 V 0 - 55 °C 0 0 1 2 3 4 5 0 1 2 3 4 VDS - Drain-to-Source Voltage (V) VGS - Gate-to-Source Voltage (V) Output Characteristics Transfer Characteristics 0.25 5 300 250 0.20 C - Capacitance (pF) R DS(on) - On-Resistance (mΩ) VGS = 4.5 V 0.15 VGS = 10 V 0.10 0.05 Ciss 200 150 100 Coss 50 0.00 Crss 0 0 2 4 6 8 10 0 5 ID - Drain Current (A) 10 20 25 30 35 40 125 150 VDS - Drain-to-Source Voltage (V) On-Resistance vs. Drain Current and Gate Voltage Capacitance 10 1.7 ID = 3.3 A 1.5 8 6 R DS(on) - On-Resistance (Normalized) VGS - Gate-to-Source Voltage (V) 15 VDS = 20 V VDS = 32 V 4 2 VGS = 10 V, ID = 3.3 A VGS = 4.5 V, ID = 2.8 A 1.3 1.1 0.9 0.7 0 0 1 Document Number: 73683 S-81449-Rev. B, 23-Jun-08 2 3 4 5 0.5 - 50 - 25 0 25 50 75 100 Qg - Total Gate Charge (nC) TJ - Junction Temperature (°C) Gate Charge On-Resistance vs. Junction Temperature www.vishay.com 3 Si5944DU Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 0.30 10 ID = 3.3 A RDS(on) - Drain-to-Source On-Resistance (Ω) I S - Source Current (A) 0.25 TJ = 150 °C 1 TJ = 25 °C TA = 125 °C 0.20 0.15 TA = 25 °C 0.10 0.05 0.00 0.01 0 0.2 0.4 0.6 0.8 1.0 1 1.2 3 5 7 9 VGS - Gate-to-Source Voltage (V) VSD - Source-to-Drain Voltage (V) Source-Drain Diode Forward Voltage On-Resistance vs. Gate-to-Source Voltage 45 3.0 40 2.8 35 ID = 250 µA 30 Power (W) VGS(th) (V) 2.6 2.4 2.2 25 20 15 10 2.0 5 1.8 - 50 - 25 0 25 50 75 100 125 0 0.001 150 0.01 0.1 TJ - Temperature (°C) 1 10 100 1000 Time (s) Threshold Voltage Single Pulse Power, Junction-to-Ambient 100 Limited by R DS(on)* ID - Drain Current (A) 10 10 ms 1 100 ms 1s 10 s 0.1 DC TA = 25 °C Single Pulse 0.01 0.001 0.1 1 * VGS 10 100 VDS - Drain-to-Source Voltage (V) minimum VGS at which R DS(on) is specified Safe Operating Area www.vishay.com 4 Document Number: 73683 S-81449-Rev. B, 23-Jun-08 Si5944DU Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 10 8 8 Power Dissipation (W) I D - Drain Current (A) 6 Package Limited 4 2 6 4 2 0 0 0 25 50 75 100 125 150 0 25 50 75 100 125 TC - Case Temperature (°C) TC - Case Temperature (°C) Current Derating* Power Derating 150 * The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit. Document Number: 73683 S-81449-Rev. B, 23-Jun-08 www.vishay.com 5 Si5944DU Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 2 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 1 0.2 Notes: 0.1 PDM 0.1 0.05 t1 t2 1. Duty Cycle, D = 0.02 t1 t2 2. Per Unit Base = RthJA = 52 °C/W 3. TJM - T A = PDMZthJA(t) Single Pulse 4. Surface Mounted 0.01 10-4 10-3 10-2 10-1 1 Square Wave Pulse Duration (s) 10 100 1000 Normalized Thermal Transient Impedance, Junction-to-Ambient 2 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 1 0.2 0.1 0.1 0.05 Single Pulse 0.02 0.01 10-4 10-3 10-2 Square Wave Pulse Duration (s) 10-1 1 Normalized Thermal Transient Impedance, Junction-to-Case Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?73683. www.vishay.com 6 Document Number: 73683 S-81449-Rev. B, 23-Jun-08 Package Information Vishay Siliconix PowerPAK® ChipFET® SINGLE PAD D D (8) D (7) D (6) S (5) E D (1) D (2) D (3) G (4) Z C b A e A1 K D2 H D (1) L D (2) D (3) G (4) K1 DETAIL Z E2 E3 D3 D (8) D (7) D (6) S (5) Backside view of single pad MILLIMETERS INCHES DIM. MIN. NOM. MAX. MIN. NOM. A 0.70 0.75 0.85 0.028 0.030 MAX. 0.033 A1 0 - 0.05 0 - 0.002 0.014 b 0.25 0.30 0.35 0.010 0.012 C 0.15 0.20 0.25 0.006 0.008 0.010 D 2.92 3.00 3.08 0.115 0.118 0.121 D2 1.75 1.87 2.00 0.069 0.074 0.079 D3 0.20 0.25 0.30 0.008 0.010 0.012 E 1.82 1.90 1.98 0.072 0.075 0.078 E2 1.38 1.50 1.63 0.054 0.059 0.064 E3 0.45 0.50 0.55 0.018 0.020 0.022 e 0.65 BSC 0.026 BSC H 0.15 0.20 0.25 0.006 0.008 K 0.25 - - 0.010 - - K1 0.30 - - 0.012 - - L 0.30 0.35 0.40 0.012 0.014 0.016 Document Number: 73203 19-Jul-10 0.010 www.vishay.com 1 Package Information Vishay Siliconix PowerPAK® ChipFET® DUAL PAD D D1 (8) D1 (7) D2 (6) S2 (5) E SI (1) GI (2) S2 (3) G2 (4) Z A C b e A1 SI (1) GI (2) S2 (3) G2 (4) L K DETAIL Z E2 H D1 (8) D1 (7) D2 (6) D2 (5) K1 Backside view of dual pad MILLIMETERS INCHES DIM. MIN. NOM. MAX. MIN. NOM. MAX. A 0.70 0.75 0.85 0.028 0.030 0.033 A1 0 - 0.05 0 - 0.002 b 0.25 0.30 0.35 0.010 0.012 0.014 C 0.15 0.20 0.25 0.006 0.008 0.010 D 2.92 3.00 3.08 0.115 0.118 0.121 D2 1.07 1.20 1.32 0.042 0.047 0.052 E 1.82 1.90 1.98 0.072 0.075 0.078 E2 0.92 1.05 1.17 0.036 0.041 0.046 e 0.65 BSC 0.026 BSC H 0.15 0.20 0.25 0.006 0.008 0.010 K 0.20 - - 0.008 - - K1 0.20 - - 0.008 - - L 0.30 0.35 0.40 0.012 0.014 0.016 ECN: C10-0618-Rev. C, 19-Jul-09 DWG: 5940 www.vishay.com 2 Document Number: 73203 19-Jul-10 Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR PowerPAK® ChipFET® Dual 2.700 (0.106) 0.300 (0.012) 0.350 (0.014) 0.650 (0.026) 1.900 (0.075) 0.300 (0.012) 1.050 (0.041) 0.350 (0.014) 0.200 (0.008) 0.300 (0.012) 0.225 (0.009) 0.650 (0.026) 1.175 (0.046) 1.525 (0.060) Recommended Minimum Pads Dimensions in mm/(Inches) APPLICATION NOTE Note: This is Flipped Mirror Image Pin #1 Location is Top Left Corner Return to Index www.vishay.com 10 Document Number: 69949 Revision: 21-Jan-08 Legal Disclaimer Notice Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 11-Mar-11 www.vishay.com 1