BOURNS TISP61089HDMR-S

CO
M
PL
IA
NT
TISP61089HDM
*R
oH
S
DUAL FORWARD-CONDUCTING P-GATE THYRISTOR
PROGRAMMABLE OVERVOLTAGE PROTECTOR
TISP61089HDM Overvoltage Protector
Intended for Use in GR-1089-CORE Issue 3 Compliant
Line Cards
8-SOIC (210 mil) Package (Top View)
1
8
K1 (Tip)
2
7
A
(Ground)
NC
3
6
A
(Ground)
K2
4
5
K2 (Ring)
K1
(Tip)
Dual, Voltage-Programmable SLIC Protector
– Low 15 mA max. Gate Triggering Current
– Supports Battery Voltages Down to -155 V
– High 150 mA min. Holding Current
(Gate) G
(Ring)
Rated for GR-1089-CORE Issue 3 Conditions
GR-1089-CORE Test
Impulse Waveshape
IPPSM
Section
Test #
A
2/10
4.6.7
4.6.8
4
1
500
10/1000
4.6.7
4.6.7.1
1, 3
1
100
Meets GR-1089-CORE First Level A.C. Power Fault Conditions
GR-1089-CORE
Section 4.6.10
Test #
I RMS
Power Fault Duration
A
s
1
0.33
900
2
0.17
900
3
1
1
4
1
1
6
0.5
30
7
2.2
2
8
3
1.1
9
5
0.4
NC - No internal connection
Terminal typical application names shown in
parenthesis
MD-8SOIC(210)-001-b
Device Symbol
K1
K1
A
G
A
K2
K2
The negative protection voltage is
controlled by the voltage, VGG,
applied to the G terminal.
SD-TISP6-001-a
GR-1089-CORE Second Level A.C. Power Fault Conditions are
Detailed in the ‘Applications Information’ Section
............................................... UL Recognized Component
How To Order
Device
Package
Carrier
TISP61089HDM
8-SOIC (210 mil)
Embossed Tape Reeled
For Lead Free
Termination Finish
Order As
TISP61089HDMR-S
Marking Code
Standard Quantity
61089H
2000
Description
The TISP61089HDM is a dual forward-conducting buffered p-gate thyristor (SCR) overvoltage protector. It is designed to protect monolithic
SLICs (Subscriber Line Interface Circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and induction.
The TISP61089HDM limits voltages that exceed the SLIC supply rail voltage. The TISP61089HDM parameters are specified to allow
equipment compliance with Telcordia GR-1089-CORE, Issue 3 and ITU-T recommendations K.20, K.21 and K.45.
The SLIC line driver section is typically powered from 0 V (ground) and a negative voltage in the region of -20 V to -155 V. The protector gate is
connected to this negative supply. This references the protection (clipping) voltage to the negative supply voltage. The protection voltage will
then track the negative supply voltage and the overvoltage stress on the SLIC is minimized.
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex
MAY 2004 – REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP61089HDM Overvoltage Protector
Description (Continued)
Positive overvoltages are clipped to ground by diode forward conduction. Negative overvoltages are initially clipped close to the SLIC
negative supply rail value. If sufficient current is available from the overvoltage, then the protector SCR will switch into a low voltage on-state
condition. As the overvoltage subsides the high holding current of TISP61089HDM SCR prevents d.c. latchup.
The TISP61089HDM is designed to be used with a pair of Bourns® B1250T fuses for overcurrent protection. Level 2 power fault compliance
requires the series overcurrent element to become open-circuit or high impedance. For equipment compliant to ITU-T recommendations K.20,
K.21 or K.45 only, the series resistor value is set by the coordination requirements. For coordination with a 400 V limit GDT, a minimum series
resistor value of 6.5 Ω is recommended.
Absolute Maximum Ratings, TA = 25 °C (Unless Otherwise Noted)
Symbol
Value
Unit
Repetitive peak off-state voltage, VGK = 0
Rating
VDRM
-170
V
Repetitive peak gate-cathode voltage, VKA = 0
VGKRM
-167
V
IPPSM
100
150
100
500
500
A
ITSM
7.7
6.1
4.8
3.7
2.8
2.6
A
TJ
-40 to +150
°C
Tstg
-65 to +150
°C
Non-repetitive peak impulse current (see Notes 1, 2 and 3)
10/1000 µs (Telcordia GR-1089-CORE, Issue 3)
5/310 µs (ITU-T K.20, K.21 & K.45, K.44 open-circuit voltage wave shape 10/700 µs)
10/360 µs (Telcordia GR-1089-CORE, Issue 3)
1.2/50 µs voltage waveshape (Telcordia GR-1089-CORE, Issue 3), including 3 Ω non-inductive resistor
2/10 µs (Telcordia GR-1089-CORE, Issue 3)
Non-repetitive peak on-state current, 50 Hz / 60 Hz (see Notes 1, 2, 3 and 4)
0.5 s
1s
2s
5s
30 s
900 s
Junction temperature
Storage temperature range
NOTES: 1. Initially the device must be in thermal equilibrium with TJ = 25 °C. The surge may be repeated after the device returns to its initial
conditions.
2. The rated current values may be applied either to the Ring to Ground or to the Tip to Ground terminal pairs. Additionally, both
terminal pairs may have their rated current values applied simultaneously (in this case the Ground terminal current will be twice the
rated current value of an individual terminal pair). Ratings are obtained by using the gate circuitry as shown in Fig. 3.
3. Rated currents only apply if pins 1 & 8 (T ip) are connected together, pins 4 & 5 (Ring) are connected together and pins 6 & 7
(Anode) are connected together.
4. EIA/JESD51-2 environment and EIA/JESD51-7 high effective thermal conductivity test board (multi-layer) connected with 0.6 mm
printed wiring track widths.
Electrical Characteristics, TA = 25 °C (Unless Otherwise Noted)
Parameter
ID
Off-state current
Test Conditions
-5
-50
µA
12
12
20
V
IF = 5 A, tW = 200 µs
3
V
10/1000 µs, IF = 100 A, VGG = -100 V
5/310 µs, IF = 150 A, VGG = -100 V
2/10 µs, IF = 200 A, VGG = -100 V (see Note 5)
6
7
10
V
VD = VDRM, VGK = 0
10/1000 µs, ITM = 100 A, VGG = -100 V
VGK(BO) Gate-cathode impulse breakover voltage 5/310 µs, ITM = 150 A, VGG = -100 V
2/10 µs, ITM = 200 A, VGG = -100 V (see Note 5)
VF
VFRM
Forward voltage
Peak forward recovery voltage
Min Typ Max Unit
TA = 25 °C
TA = 85 °C
MAY 2004 – REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP61089HDM Overvoltage Protector
Electrical Characteristics, TA = 25 °C (Unless Otherwise Noted) (Continued)
Parameter
IH
Test Conditions
Holding current
Gate reverse current
IGKS
Min Typ Max Unit
IT = -1 A, di/dt = 1 A/ms, VGG = -100 V
VGG = VGK = VGKRM, VKA = 0
-150
mA
TA = 25 °C
TA = 85 °C
-5
-50
µA
mA
IGT
Gate trigger current
IT = -3 A, tp(g) ≥ 20 µs, VGG = -100 V
15
VGT
Gate-cathode trigger voltage
IT = -3 A, tp(g) ≥ 20 µs, VGG = -100 V
2.5
V
CKA
Cathode-anode off-state capacitance
f = 1 MHz, Vd = 1 V rms, VD = -50 V, IG = 0
40
pF
NOTE:
5. Voltage measurements should be made with an oscilloscope with limited bandwidth (20 MHz) to avoid high frequency noise.
Thermal Characteristics, TA = 25 °C (Unless Otherwise Noted)
Parameter
RθJA
NOTE
Junction to ambient thermal resistance
Test Conditions
Min Typ Max
Unit
55
°C/W
EIA/JESD51-7 PCB, EIA/JESD51-2 Environment, PTOT = 4 W
(See Note 6)
6. EIA/JESD51-7 high effective thermal conductivity test board (multi-layer) connected with 0.6 mm printed wiring track widths.
Parameter Measurement Information
+i
Quadrant I
IPPSM
Forward
Conduction
Characteristic
IFSM (= |ITSM|)
IF
VF
V GK(BO)
V GG
-v
VD
ID
I(BO)
IH
IS
V(BO)
+v
VS
VT
IT
ITSM
Quadrant III
IPPSM
Switching
Characteristic
-i
Figure 1. Voltage-Current Characteristic
Unless Otherwise Noted, All Voltages are Referenced to the Anode
MAY 2004 – REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
PM-TISP6-001-a
TISP61089HDM Overvoltage Protector
Thermal Information
ITSM(t) - Non-Repetitive Peak On-State Current - A
NON-REPETITIVE PEAK ON-STATE CURRENT
vs
CURRENT DURATION
TI-TISP6-001-a
15
V GEN = 600 Vrms, 50/60 Hz
RGEN = 1.4 x V GEN/ITSM(t)
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-7 PCB, TA = 25 °C
SIMULTANEOUS OPERATION
OF R AND T TERMINALS.
10
9
8
7
6
5
4
3
2
1.5
1
0.1
1
10
100
1000
t - Current Duration - s
Figure 2.
MAY 2004 – REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP61089HDM Overvoltage Protector
APPLICATIONS INFORMATION
SLIC
SLIC
PROTECTOR
Fuse
Tip
F1a
B1250T
Ring
F1b
B1250T
TISP
61089HDM
1.0 kΩ
1.0 Ω
C1
220 nF
D1
D2
-VBAT
AI-TISP6-001-a
Figure 3. Line Protection with TISP61089HDM
Figure 3 illustrates how a typical SLIC protection circuit may look for a TISP61089HDM and a pair of Bourns® Telefuse™ overcurrent
protectors. This is a generic circuit that is designed to withstand both lightning surge testing and AC power fault testing. As applications can
differ, it is recommended you contact your Bourns representative for detailed applications guidance on your specific design.
MAY 2004 – REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP61089HDM Overvoltage Protector
APPLICATIONS INFORMATION (Continued)
TYPICAL TIME TO OPEN
vs
CURRENT
PEAK AC
vs
CURRENT DURATION
AI-TISP6-002-a
15
30
7
6
5
4
20
TISP61089HDM ITSM
RMS Current - A
Peak 50 Hz / 60 Hz Current - A
10
3
2
1.5
1
0.7
0.6
0.5
0.4
AI-TISP6-003-a
60
50
40
10
8
7
6
5
4
3
GR-1089 First Level Tests
TISP61089HDM
B1250T
2
0.3
0.2
0.15
0.1
1
10
100
t - Current Duration - s
Figure 4.
1000
1
0.01
0.1
1
10
100
1000
t - Current Duration - s
Figure 5.
GR-1089-CORE Issue A.C. Power Fault testing has been comprehended in the design of the TISP61089HDM. For compliance, circuit designs
must pass both First Level and Second Level A.C. Power Fault testing.
First Level Power Fault testing requires that the equipment shall not be damaged and continues to operate correctly without disruption to
other parts of the system. In laboratory tests it has been shown that the circuit shown in Figure 3 can pass these tests without damage.
Figure 4 shows the TISP61089HDM ITSM rating to be above the level of GR-1089-CORE First Level tests.
Second Level Power Fault testing may result in the equipment becoming non-operational, but any component failure should not allow the
equipment to become a hazard. The system should not burn, fragment, or become an electrical safety hazard. The test data in Figure 5
illustrates that the TISP61089HDM and the B1250T are current coordinated, as the fuse interrupt time is shorter than the time it takes to
damage the TISP61089HDM package for a given current.
MAY 2004 – REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
Bourns Sales Offices
Region
Phone
Fax
The Americas:
+1-951-781-5500
+1-951-781-5700
Europe:
+41-41-7685555
+41-41-7685510
Asia-Pacific:
+886-2-25624117
+886-2-25624116
Region
Phone
Fax
The Americas:
+1-951-781-5500
+1-951-781-5700
Europe:
+41-41-7685555
+41-41-7685510
Asia-Pacific:
+886-2-25624117
+886-2-25624116
Technical Assistance
www.bourns.com
Bourns® products are available through an extensive network of manufacturer’s representatives, agents and distributors.
To obtain technical applications assistance, a quotation, or to place an order, contact a Bourns representative in your area.
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COPYRIGHT© 2004, BOURNS, INC. LITHO IN U.S.A. e 10/04/TSP0409