IRFP17N50L, SiHFP17N50L Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • SuperFast Body Diode Eliminates the Need For External Diodes in ZVS Applications 500 RDS(on) (Ω) VGS = 10 V 0.28 Qg (Max.) (nC) 130 Qgs (nC) 33 Qgd (nC) 59 Configuration • Low Gate Charge Results in Simple Drive Requirement Available RoHS* COMPLIANT • Enhanced dV/dt Capabilities Offer Improved Ruggedness Single • Higher Gate Voltage Threshold Offers Improved Noise Immunity D • Lead (Pb)-free Available TO-247 APPLICATIONS • Zero Voltage Switching SMPS G • Telecom and Server Power Supplies S • Uninterruptible Power Supply D S G • Motor Control applications N-Channel MOSFET ORDERING INFORMATION Package TO-247 IRFP17N50LPbF SiHFP17N50L-E3 IRFP17N50L SiHFP17N50L Lead (Pb)-free SnPb ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS 500 Gate-Source Voltage VGS ± 30 VGS at 10 V Continuous Drain Current TC = 25 °C ID TC = 100 °C Pulsed Drain Currenta UNIT V 16 11 A IDM 64 1.8 W/°C EAS 390 mJ Currenta IAR 16 A Repetitive Avalanche Energya EAR 22 mJ PD 220 W dV/dt 13 V/ns TJ, Tstg - 55 to + 150 Linear Derating Factor Single Pulse Avalanche Energyb Repetitive Avalanche Maximum Power Dissipation Peak Diode Recovery TC = 25 °C dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque for 10 s 6-32 or M3 screw 300d °C 10 lbf · in 1.1 N·m Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Starting TJ = 25 °C, L = 3.0 mH, RG = 25 Ω, IAS = 16 A (see fig. 12). c. ISD ≤ 16 A, dI/dt ≤ 347 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91205 S-Pending-Rev. A, 16-Jun-08 WORK-IN-PROGRESS www.vishay.com 1 IRFP17N50L, SiHFP17N50L Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 62 Case-to-Sink, Flat, Greased Surface RthCS 0.50 - Maximum Junction-to-Case (Drain) RthJC - 0.56 UNIT °C/W SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT V V/°C Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage VDS VGS = 0 V, ID = 250 µA 500 - - ΔVDS/TJ Reference to 25 °C, ID = 1 mAd - 0.60 - VGS(th) VDS = VGS, ID = 250 µA 3.0 - 5.0 V Gate-Source Leakage IGSS VGS = ± 30 V - - ± 100 nA Zero Gate Voltage Drain Current IDSS VDS = 500 V, VGS = 0 V - - 50 VDS = 400 V, VGS = 0 V, TJ = 125 °C - - 2.0 Drain-Source On-State Resistance - 0.28 0.32 Ω gfs VDS = 50 V, ID = 9.9 Ab 11 - - S VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 - 2760 - - 325 - - 37 - VDS = 1.0 V , f = 1.0 MHz - 3690 - VDS = 400 V , f = 1.0 MHz - 84 - - 159 - - 120 - - 1.4 - - - 130 - - 33 RDS(on) Forward Transconductance µA ID = 9.9 Ab VGS = 10 V Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Output Capacitance Coss Effective Output Capacitance Effective Output Capacitance (Energy Related) Coss eff. VGS = 0 V VDS = 0 V to 400 V Coss eff. (ER) Internal Gate Resistance Rg Total Gate Charge Qg Gate-Source Charge Qgs f = 1 MHz, open drain VGS = 10 V ID = 16 A, VDS = 400 V see fig. 7 and 15b Gate-Drain Charge Qgd - - 59 Turn-On Delay Time td(on) - 21 - - 51 - - 50 - - 28 - - - 16 - - 64 Rise Time Turn-Off Delay Time Fall Time tr td(off) VDD = 250 V, ID = 16 A RG = 7.5 Ω, VGS = 10 V see fig. 14a & 14bb tf pF Ω nC ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Currenta ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Reverse Recovery Current trr Qrr IRRM MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 °C, IS = 16 A, VGS = 0 Vb TJ = 25 °C TJ = 125 °C TJ = 25 °C IF = 16 A, dI/dt = 100 A/µsb TJ =1 25 °C TJ = 25 °C - - 1.5 - 170 250 - 220 330 - 470 710 - 810 1210 - 7.3 11 V ns µC Forward Turn-On Time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %. c. COSS eff. is a fixed capacitance that gives the same charging time as COSS while VDS is rising fom 0 to 80 % VDS. COSS eff. (ER) is a fixed capacitance that stores the same energy as COSS while VDS is rising fom 0 to 80 % VDS. www.vishay.com 2 Document Number: 91205 S-Pending-Rev. A, 16-Jun-08 IRFP17N50L, SiHFP17N50L Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 100 100 VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V 10 I D , Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP 1 5.0V 0.1 TJ = 150 ° C 10 TJ = 25 ° C 1 20µs PULSE WIDTH Tj = 25°C 0.01 0.1 1 10 0.1 4.0 100 Fig. 1 - Typical Output Characteristics RDS(on) , Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current (A) VGS TOP 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V 5.0V 1 20µs PULSE WIDTH Tj = 150°C 0.1 1 10 VDS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics Document Number: 91205 S-Pending-Rev. A, 16-Jun-08 6.0 7.0 8.0 9.0 10.0 Fig. 3 - Typical Transfer Characteristics 100 0.1 5.0 VGS , Gate-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) 10 V DS = 50V 20µs PULSE WIDTH 100 3.0 ID = 16A 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature ( ° C) Fig. 4 - Normalized On-Resistance vs. Temperature www.vishay.com 3 IRFP17N50L, SiHFP17N50L Vishay Siliconix 20 100000 Coss = Cds + Cgd 10000 C, Capacitance(pF) VGS , Gate-to-Source Voltage (V) VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Ciss 1000 Coss 100 ID = 16A V DS= 400V V DS= 250V V DS= 100V 16 12 8 4 Crss 10 0 1 10 100 1000 0 60 90 120 150 QG , Total Gate Charge (nC) VDS, Drain-to-Source Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 30 Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage 20 ISD , Reverse Drain Current (A) 100 Energy (µJ) 15 10 5 TJ = 150 ° C 10 TJ = 25 ° C 1 0 0 100 200 300 400 500 600 VDS, Drain-to-Source Voltage (V) Fig. 6 - Typ. Output Capacitance Stored Energy vs. VDS www.vishay.com 4 0.1 0.2 V GS = 0 V 0.6 0.9 1.3 1.6 VSD ,Source-to-Drain Voltage (V) Fig. 8 - Typical Source-Drain Diode Forward Voltage Document Number: 91205 S-Pending-Rev. A, 16-Jun-08 IRFP17N50L, SiHFP17N50L Vishay Siliconix RD VDS VGS 20 D.U.T. RG + - VDD ID , Drain Current (A) 16 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 12 Fig. 10a - Switching Time Test Circuit 8 VDS 4 0 90 % 25 50 75 100 125 150 TC , Case Temperature ( °C) 10 % VGS td(on) Fig. 9 - Maximum Drain Current vs. Case Temperature td(off) tf tr Fig. 10b - Switching Time Waveforms Thermal Response(Z thJC ) 1 D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM 0.01 0.001 0.00001 t1 t2 Notes: 1. Duty factor D =t 1 / t 2 2. Peak TJ = P DM x ZthJC + TC 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case Document Number: 91205 S-Pending-Rev. A, 16-Jun-08 www.vishay.com 5 IRFP17N50L, SiHFP17N50L Vishay Siliconix EAS , Single Pulse Avalanche Energy (mJ) 1000 OPERATION IN THIS AREA LIMITED BY RDS(on) ID , Drain Current (A) 100 10us 10 100us 1ms 1 0.1 10ms TC = 25 °C TJ = 150 °C Single Pulse 10 100 1000 10000 800 ID 7A 10A BOTTOM 16A TOP 640 480 320 160 0 25 50 Fig. 12 - Maximum Safe Operating Area 75 100 125 150 Starting T J , Junction Temperature ( ° C) VDS , Drain-to-Source Voltage (V) Fig. 13 - Maximum Avalanche Energy vs. Drain Current VDS tp 15 V Driver L VDS D.U.T RG IAS 20 V tp + - VDD A 0.01Ω Fig. 14a - Unclamped Inductive Test Circuit IAS Fig. 14b - Unclamped Inductive Waveforms Current regulator Same type as D.U.T. 50 kΩ QG 10 V 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 15a - Basic Gate Charge Waveform www.vishay.com 6 Fig. 15b - Gate Charge Test Circuit Document Number: 91205 S-Pending-Rev. A, 16-Jun-08 IRFP17N50L, SiHFP17N50L Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - • • • • RG dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Driver Gate Drive P.W. + Period D= + - VDD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current dI/dt D.U.T. VDS Waveform Diode Recovery dV/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig. 16. For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91205. Document Number: 91205 S-Pending-Rev. A, 16-Jun-08 www.vishay.com 7 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1