PL IA NT Features S CO M ■ *R oH ■ ■ ■ ■ Applications Lead free device (RoHS compliant*) Protects up to 6 lines Bidirectional configuration ESD protection > 40 KV Low capacitance: 15 pF Ethernet – 10/100 Base T Computer I/O Ports – SCSI, FireWire & USB Set-top box protection Video Cards ■ ■ ■ ■ CDNBS08-SRDAxx-6 – Steering Diode/TVS Array Combo General Information The markets of portable communications, computing and video equipment are challenging the semiconductor industry to develop increasingly smaller electronic components. GND I/O 6 I/O 5 I/O 4 8 7 6 5 Bourns offers Steering Diode/Transient Voltage Suppressor Array combination diodes for surge and ESD protection applications in an 8 Lead Narrow Body SOIC package size format. Bourns Chip Diodes conform to JEDEC standards, are easy to handle on standard pick and place equipment and their flat configuration minimizes roll away. The Bourns® device will meet IEC 61000-4-2 (ESD), IEC 61000-4-4 (EFT) and IEC 61000-4-5 (Surge) requirements. 1 2 3 4 I/O 1 I/O 2 +VREF I/O 3 Electrical Characteristics (@ TA = 25 °C Unless Otherwise Noted) Parameter CDNBS08- Symbol SRDA3.3-6 SRDA05-6 Unit Minimum Break Down Voltage @ 1 mA VBR 4.0 6.0 V Working Peak Voltage VWM 3.3 5.0 V Maximum Clamping Voltage VC @ IP VF 6.5 9.8 V Maximum Clamping Voltage @ 8/20 µs VC @ IPP VF 10.9 V @ 43 A 13.5 V @ 42 A V Maximum Leakage Current @ VWM ID 125 20 µA Maximum Cap. Bidirectional @ 0 V, 1 MHz C j(SD) 15 pF Peak Pulse Power (tp = 8/20 µs) PPP 500 W Continuous Power Dissipation PPC 1000 MW Forward Voltage @ 100 mA, 300 µs – Square Wave2 VF 1.1 V 1 Notes: 1. See Peak Pulse Power vs. Pulse Time. 2. Capacitance measured at VWM = VCC connected between I/O pins to pin 8 and 5 (Gnd). VR = VWM @ 1 MHz. Thermal Characteristics (@ TA = 25 °C Unless Otherwise Noted) Parameter Operating Temperature Storage Temperature *RoHS Directive 2002/95/EC Jan 27 2003 including Annex. Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. Symbol Max. Unit TJ -55 to +150 °C TSTG -55 to +150 °C CDNBS08-SRDAxx-6 – Steering Diode/TVS Array Combo Mechanical Characteristics This is a molded JEDEC Narrow Body SO-8 package with lead free 100 % Sn plating on the lead frame. It weighs approximately 15 mg and has a flammability rating of UL 94V-0. Product Dimensions Recommended Footprint A A B F B H C D C G E DIMENSIONS = MILLIMETERS (INCHES) D Dimensions E Dimensions A 1.143 - 1.397 (0.045 - 0.055) B 0.635 - 0.889 (0.025 - 0.035) A 4.80 - 5.00 (0.189 - 0.196) C B 3.80 - 4.00 (0.150 - 0.157) D 3.937 - 4.191 (0.155 - 0.165) C 5.80 - 6.20 (0.229 - 0.244) E 1.016 - 1.27 (0.040 - 0.050) D 1.35 - 1.75 (0.054 - 0.068) E 0.10 - 0.25 (0.004 - 0.008) F 0.25 - 0.50 (0.010 - 0.019) G 0.40 - 1.250 (0.016 - 0.049) H 0.18 - 0.25 (0.007 - 0.009) How To Order CD NBS08 - SRDA 3.3 - 6 Common Code CD = Chip Diode Package NBS08 = Narrow Body SOIC8 Package Model SRDA = Steering/TVS Diode Array Working Peak Reverse Voltage 3.3 = 3.3 VRWM (Volts) 05 = 5.0 VRWM (Volts) Number of Protection Lines 6 = 6 Lines Typical Part Marking CDNBS08-SRDA3.3-6 .......................................................... CDNBS08-SRDA05-6 .......................................................... 6.223 Min. (0.245) SGG SGH Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. CDNBS08-SRDAxx-6 – Steering Diode/TVS Array Combo Packaging The surface mount product is packaged in a 12 mm x 8 mm Tape and Reel format per EIA-481 standard. TOP SIDE VIEW (INTO COMPONENT POCKET) 4.0 ± 0.1 (.16 ± .004) 0.3 ± 0.05 (.01 ± .002) 1.5 ± 0.1/-0 (.06 ± .004/-0) DIA. 2.0 ± 0.05 (.08 ± .002) R 1.75 ± 0.1 (.07 ± .004) 0.3 MAX. (0.01) 12.0 ± 0.3 (.47 ± .01) 2.1 ± 0.1 (.083 ± .004) 5.5 ± 0.3 (.22 ± .01) 6.4 ± 0.1 (.252 ± .004) 9.0 ± 0.1 (.354 ± .004) 8.0 ± 0.3 (.31 ± .01) R 0.25 TYP. (0.010) ORIENTATION OF COMPONENT IN POCKET BACKSIDE FACING UP Block Diagram Device Pinout GND I/O 6 I/O 5 I/O 4 8 7 6 5 1 2 3 4 I/O 1 I/O 2 +VREF I/O 3 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. Pin Function 1 I/O 1 2 I/O 2 3 +VREF 4 I/O 3 5 I/O 4 6 I/O 5 7 I/O 6 8 GND CDNBS08-SRDAxx-6 – Steering Diode/TVS Array Combo Performance Graphs Peak Pulse Power vs Pulse Time Pulse Wave Form 120 IPP – Peak Pulse Current (% of IPP) PPP – Peak Pulse Current (W) 10,000 500 W, 8/20 µs Waveform 1,000 100 Test Waveform Parameters tt = 8 µs td = 20 µs tt 100 80 et 60 40 td = t|IPP/2 20 0 10 0.01 1 10 100 1,000 10,000 0 5 10 15 20 25 30 t – Time (µs) td – Pulse Duration (µs) Power Derating Curve % of Rated Power 100 Peak Pulse Power 8/20 µs 80 60 40 20 Average Power 0 0 25 50 75 100 125 150 TL – Lead Temperature (°C) Reliable Electronic Solutions Asia-Pacific: Tel: +886-2 2562-4117 • Fax: +886-2 2562-4116 Europe: Tel: +41-41 768 5555 • Fax: +41-41 768 5510 The Americas: Tel: +1-951 781-5500 • Fax: +1-951 781-5700 www.bourns.com Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. COPYRIGHT© 2005, BOURNS, INC. LITHO IN U.S.A., IPA0508 10/05