BOURNS TISP4C250H3BJ

oH
VE S CO
AV R M
AI SIO PL
LA N IA
BL S NT
E
TISP4C125H3BJ THRU TISP4C395H3BJ
*R
LOW CAPACITANCE
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
TISP4CxxxH3BJ Overvoltage Protector Series
Ion-Implanted Breakdown Region
- Precise and Stable Voltage
- Low Voltage Overshoot under Surge
- Low Off-State Capacitance
SMB Package (Top View)
VDRM
Device Name
R 1
V(BO)
V
V
TISP4C125H3BJ
100
125
TISP4C145H3BJ
TISP4C180H3BJ
120
145
145
180
TISP4C220H3BJ
TISP4C250H3BJ
180
190
220
250
TISP4C290H3BJ
TISP4C350H3BJ
220
275
290
350
TISP4C395H3BJ
320
395
2 T
MD-SMB-004-a
Device Symbol
T
Rated for International Surge Wave Shapes
IPPSM
Wave Shape
Standard
2/10
GR-1089-CORE
500
10/160
TIA-968-A
200
10/700
ITU-T K.20/21/45
150
10/560
TIA-968-A
100
10/1000
GR-1089-CORE
100
A
R
SD-TISP4xxx-001-a
....... TISP4C290H3BJ, TISP4C350H3BJ & TISP4C395H3BJ
are UL Recognized Components
Description
This device is designed to limit overvoltages on the telephone line. Overvoltages are normally caused by a.c. power system or lightning flash
disturbances which are induced or conducted on to the telephone line. A single device provides 2-point protection and is typically used for the
protection of 2-wire telecommunication equipment (e.g. between the Ring and Tip wires for telephones and modems). Combinations of
devices can be used for multi-point protection (e.g. 3-point protection between Ring, Tip and Ground).
The protector consists of a symmetrical voltage-triggered bidirectional thyristor. Overvoltages are initially clipped by breakdown clamping until
the voltage rises to the breakover level, which causes the device to crowbar into a low-voltage on state. This low-voltage on state causes the
current resulting from the overvoltage to be safely diverted through the device. The high crowbar holding current prevents d.c. latchup as the
diverted current subsides.
Please contact your Bourns representative if the protection voltage you require is not listed.
How to Order
Device
Package
Carrier
TISP4CxxxH3BJ
SMB
Embossed Tape Reeled
Insert xxx corresponding to device name.
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex
SEPTEMBER 2004 – REVISED FEBRUARY 2006
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
For Standard
Termination Finish
Order As
TISP4CxxxH3BJR
For Lead Free
Termination Finish Marking
Code
Order As
TISP4CxxxH3BJR-S 4CxxxH
Std. Qty.
3000
TISP4CxxxH3BJ Overvoltage Protector Series
Absolute Maximum Ratings, TA = 25 °C (Unless Otherwise Noted)
Rating
'4C125H3BJ
'4C145H3BJ
'4C180H3BJ
'4C220H3BJ
'4C250H3BJ
'4C290H3BJ
'4C350H3BJ
'4C395H3BJ
Repetitive peak off-state voltage
Symbol
Value
Unit
VDRM
±100
±120
±145
±180
±190
±220
±275
±320
V
IPPSM
±500
±200
±150
±100
±100
A
ITSM
30
2.1
A
TJ
-40 to +150
°C
Tstg
-65 to +150
°C
Non-repetitive peak impulse current (see Notes 1 and 2)
2/10 µs (GR-1089-CORE, 2/10 µs voltage wave shape)
10/160 µs (TIA-968-A, 10/160 µs voltage wave shape)
5/310 µs (ITU-T K.44, 10/700 µs voltage wave shape used in K.20/21/45)
10/560 µs (TIA-968-A, 10/560 µs voltage wave shape)
10/1000 µs (GR-1089-CORE, 10/1000 µs voltage wave shape)
Non-repetitive peak on-state current (see Notes 1, 2 and 3)
20 ms, 50 Hz (full sine wave)
1000 s, 50 Hz
Junction temperature
Storage temperature range
NOTES: 1. Initially the device must be in thermal equilibrium with TJ = 25 °C.
2. The surge may be repeated after the device returns to its initial conditions.
3. EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring
track widths.
Electrical Characteristics, TA = 25 °C (Unless Otherwise Noted)
Parameter
IDRM
V(BO)
Repetitive peak off-state current
Breakover voltage
Test Conditions
VD = VDRM
dv/dt = ±250 V/ms, RSOURCE = 300 Ω
dv/dt ≤ ±1000 V/µs, Linear voltage ramp,
Maximum ramp value = ±500 V
di/dt = ±10 A/µs, Linear current ramp,
Maximum ramp value = ±10 A
V(BO)
Impulse breakover voltage
I(BO)
Breakover current
dv/dt = ±250 V/ms, RSOURCE = 300 Ω
VT
On-state voltage
IT = ±5 A, tw = 100 µs
IH
Holding current
IT = ±5 A, di/dt = ±30 mA/ms
CO
Off-state capacitance
f = 1 MHz, Vd = 1 V rms, VD = -2 V
Max
Unit
TA = 25 °C
TA = 85 °C
Min
±5
±10
µA
'4C125H3BJ
'4C145H3BJ
'4C180H3BJ
'4C220H3BJ
'4C250H3BJ
'4C290H3BJ
'4C350H3BJ
'4C395H3BJ
±125
±145
±180
±220
±250
±290
±350
±395
V
'4C125H3BJ
'4C145H3BJ
'4C180H3BJ
'4C220H3BJ
'4C250H3BJ
'4C290H3BJ
'4C350H3BJ
'4C395H3BJ
±135
±155
±190
±230
±260
±300
±360
±405
V
±600
mA
±150
Typ
±3
V
±600
mA
'4C125H3BJ
50
'4C145H3BJ
'4C180H3BJ
'4C220H3BJ
'4C250H3BJ
45
'4C290H3BJ
'4C350H3BJ
'4C395H3BJ
40
pF
SEPTEMBER 2004 – REVISED FEBRUARY 2006
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4CxxxH3BJ Overvoltage Protector Series
Thermal Characteristics, TA = 25 °C (Unless Otherwise Noted)
Parameter
RθJA
Test Conditions
Min
Typ
EIA/JESD51-3 PCB, IT = ITSM(1000)
(see Note 4)
Junction to ambient thermal resistance
Unit
113
°C/W
265 mm x 210 mm populated line card,
50
4-layer PCB, IT = ITSM(1000)
NOTE:
Max
4. EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.
Parameter Measurement Information
+i
I PPSM
Quadrant I
Switching
Characteristic
ITSM
ITRM
IT
V(BO)
VT
I(BO)
IH
V (BR)M
V DRM
-v
I(BR)
V (BR)
V (BR)
I(BR)
IDRM
VD
ID
ID
IDRM
VD
+v
V DRM
V (BR)M
IH
I(BO)
V(BO)
VT
IT
ITRM
ITSM
Quadrant III
Switching
Characteristic
I PPSM
-i
Figure 1. Voltage-Current Characteristic for T and R Terminals
All Measurements are Referenced to the R Terminal
SEPTEMBER 2004 – REVISED FEBRUARY 2006
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
PM-TISP4xxx-001-a
TISP4CxxxH3BJ Overvoltage Protector Series
Typical Characteristics
NORMALIZED CAPACITANCE
vs
OFF-STATE VOLTAGE TC-TISP4C-002-a
1.1
Capacitance Normalized to VD = 2 V
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
TJ = 25 °C
Vd = 1 Vrms
0.1
0.0
1
10
VD - Off-state Voltage - V
100
“TISP” is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in U.S. Patent and Trademark Office.
“Bourns” is a registered trademark of Bourns, Inc. in the U.S. and other countries.
SEPTEMBER 2004 – REVISED FEBRUARY 2006
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.