FAIRCHILD MSA24

Revised October 2000
74F543
Octal Registered Transceiver
General Description
Features
The F543 octal transceiver contains two sets of D-type
latches for temporary storage of data flowing in either
direction. Separate Latch Enable and Output Enable inputs
are provided for each register to permit independent control of inputting and outputting in either direction of data
flow. The A outputs are guaranteed to sink 24 mA while the
B outputs are rated for 64 mA.
■ 8-bit octal transceiver
■ Back-to-back registers for storage
■ Separate controls for data flow in each direction
■ A outputs sink 24 mA
■ B outputs sink 64 mA
Ordering Code:
Order Number
74F543SC
74F543MSA
Package Number
M24B
MSA24
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74F543PC
N24A
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600 Wide
74F543SPC
N24C
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
© 2000 Fairchild Semiconductor Corporation
DS009554
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74F543 Octal Registered Transceiver
April 1988
74F543
Unit Loading/Fan Out
Pin Names
U.L.
Input IIH/IIL
HIGH/LOW
Output IOH/IOL
1.0/1.0
20 µA/−0.6 mA
Description
OEAB
A-to-B Output Enable Input (Active LOW)
OEBA
B-to-A Output Enable Input (Active LOW)
1.0/1.0
20 µA/−0.6 mA
CEAB
A-to-B Enable Input (Active LOW)
1.0/2.0
20 µA/−1.2 mA
CEBA
B-to-A Enable Input (Active LOW)
1.0/2.0
20 µA/−1.2 mA
LEAB
A-to-B Latch Enable Input (Active LOW)
1.0/1.0
20 µA/−0.6 mA
LEBA
B-to-A Latch Enable Input (Active LOW)
1.0/1.0
20 µA/−0.6 mA
A0–A7
A-to-B Data Inputs or
3.5/1.083
70 µA/−650 µA
150/40 (33.8)
−3 mA/24 mA (20 mA)
3.5/1.083
70 µA/−650 µA
600/106.6 (80)
−12 mA/64 mA (48 mA)
B-to-A 3-STATE Outputs
B0–B7
B-to-A Data Inputs or
A-to-B 3-STATE Outputs
Data I/O Control Table
Functional Description
The F543 contains two sets of eight D-type latches, with
separate input and output controls for each set. For data
flow from A to B, for example, the A-to-B Enable (CEAB)
input must be LOW in order to enter data from A0–A7 or
take data from B0–B7, as indicated in the Data I/O Control
Table. With CEAB LOW, a LOW signal on the A-to-B Latch
Enable (LEAB) input makes the A-to-B latches transparent;
a subsequent LOW-to-HIGH transition of the LEAB signal
puts the A latches in the storage mode and their outputs no
longer change with the A inputs. With CEAB and OEAB
both LOW, the 3-STATE B output buffers are active and
reflect the data present at the output of the A latches. Control of data flow from B to A is similar, but using the CEBA,
LEBA and OEBA inputs.
Inputs
Latch
Output
CEAB
LEAB
OEAB
Status
Buffers
H
X
X
Latched
High Z
X
H
X
Latched
—
L
L
X
Transparent
—
X
X
H
—
High Z
L
X
L
—
Driving
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
A-to-B data flow shown; B-to-A flow control is the same, except using
CEBA, LEBA and OEBA
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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Recommended Operating
Conditions
Storage Temperature
−65°C to +150°C
Ambient Temperature under Bias
−55°C to +125°C
Free Air Ambient Temperature
Junction Temperature under Bias
−55°C to +150°C
Supply Voltage
0°C to +70°C
+4.5V to +5.5V
−0.5V to +7.0V
VCC Pin Potential to Ground Pin
Input Voltage (Note 2)
−0.5V to +7.0V
Input Current (Note 2)
−30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with VCC = 0V)
Standard Output
−0.5V to VCC
3-STATE Output
−0.5V to +5.5V
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
Current Applied to Output
in LOW State (Max)
twice the rated IOL (mA)
DC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
Input HIGH Voltage
VIL
Input LOW Voltage
0.8
V
VCD
Input Clamp Diode Voltage
−1.2
V
VOH
Output HIGH Voltage
VOL
IIH
IBVI
2.0
Units
VIH
10% VCC
2.5
10% VCC
2.4
5% VCC
2.7
5% VCC
2.7
10% VCC
2.0
IOD
IOH = −15 mA (Bn)
IOL = 24 mA (A n)
5.0
µA
Max
VIN = 2.7V
7.0
µA
Max
0.5
mA
Max
VIN = 5.5V (An, Bn)
50
µA
Max
VOUT = VCC
V
0.0
µA
0.0
mA
Max
0.5
Voltage
10% VCC
0.55
Input HIGH Current
Input HIGH Current
Input HIGH Current
Output HIGH
4.75
Output Leakage
3.75
Circuit Current
IIL
IOH = −1 mA (An)
Min
10% VCC
Test
Min
V
Output LOW
Input Leakage
IIN = −18 mA
IOH = −3 mA (An, Bn)
Leakage Current
VID
Recognized as a LOW Signal
Min
IOH = −3 mA (An, Bn)
V
Breakdown (I/O)
ICEX
Conditions
Recognized as a HIGH Signal
IOH = −1 mA (An)
Breakdown Test
IBVIT
VCC
V
−0.6
Input LOW Current
−1.2
IOL = 64 mA (B n)
(OEAB, OEBA, LEAB,
LEBA, CEAB, CEBA)
IID = 1.9 µA
All Other Pins Grounded
VIOD = 150 mV
All Other Pins Grounded
VIN = 0.5V (OEAB, OEBA)
VIN = 0.5V (CEAB, CEBA)
IIH + IOZH
Output Leakage Current
70
µA
Max
VOUT = 2.7V (An, Bn)
IIL + IOZL
Output Leakage Current
−650
µA
Max
VOUT = 0.5V (An, Bn)
IOS
Output Short-Circuit Current
mA
Max
500
µA
0.0V
VOUT = 5.25V (An, B n)
−60
−150
−100
−225
VOUT = 0V (An)
VOUT = 0V (Bn)
IZZ
Bus Drainage Test
ICCH
Power Supply Current
67
100
mA
Max
VO = HIGH
ICCL
Power Supply Current
83
125
mA
Max
VO = LOW
ICCZ
Power Supply Current
83
125
mA
Max
VO = HIGH Z
3
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74F543
Absolute Maximum Ratings(Note 1)
74F543
AC Electrical Characteristics
TA = +25°C
Symbol
Parameter
VCC = +5.0V
TA = 0°C to +70°C
CL = 50 pF
CL = 50 pF
Min
Typ
Max
Min
tPLH
Propagation Delay
3.0
5.5
7.5
3.0
8.5
tPHL
Transparent Mode
3.0
5.0
6.5
3.0
7.5
12.5
Units
Max
ns
An to Bn or Bn to An
tPLH
Propagation Delay
4.5
8.5
11.0
4.5
tPHL
LEBA to An
4.5
8.5
11.0
4.5
12.5
tPLH
Propagation Delay
4.5
8.5
11.0
4.5
12.5
4.5
8.5
11.0
4.5
12.5
tPHL
LEAB to Bn
tPZH
Output Enable Time
tPZL
OEBA or OEAB to An or Bn
3.0
7.0
9.0
3.0
10.0
CEBA or CEAB to An or Bn
4.0
7.5
10.5
4.0
12.0
tPHZ
Output Disable Time
tPLZ
OEBA or OEAB to An or Bn
1.0
6.0
8.0
1.0
9.0
CEBA or CEAB to An or Bn
2.5
5.5
10.5
2.5
11.5
ns
ns
ns
AC Operating Requirements
TA = +25°C
Symbol
VCC = +5.0V
Parameter
Min
TA = 0°C to +70°C
Max
Min
tS(H)
Setup Time, HIGH or LOW
3.0
3.5
tS(L)
An or Bn to LEBA or LEAB
3.0
3.5
tH(H)
Hold Time, HIGH or LOW
3.0
3.5
tH(L)
An or Bn to LEBA or LEAB
3.0
3.5
tW(L)
Latch Enable, B to A or
8.0
9.0
B to A Pulse Width, LOW
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Units
Max
ns
ns
74F543
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M24B
24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
Package Number MSA24
5
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74F543
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600 Wide
Package Number N24A
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74F543 Octal Registered Transceiver
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N24C
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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