FAIRCHILD FDS6575_01

FDS6575
P-Channel 2.5V Specified PowerTrench MOSFET
General Description
Features
This P-Channel 2.5V specified MOSFET is a rugged
gate version of Fairchild Semiconductor’s advanced
PowerTrench process. It has been optimized for power
management applications with a wide range of gate
drive voltage (2.5V – 8V).
• –10 A, –20 V. RDS(ON) = 13 mΩ @ V GS = –4.5 V
RDS(ON) = 17 mΩ @ V GS = –2.5 V
Applications
• High performance trench technology for extremely
low RDS(ON)
• Low gate charge
• Power management
• High current and power handling capability
• Load switch
• Battery protection
DD
DD
DD
DD
SO-8
Pin 1 SO-8
G
G
S
S
SS
SS
Absolute Maximum Ratings
Symbol
5
4
6
3
7
2
8
1
TA=25oC unless otherwise noted
Ratings
Units
V DSS
Drain-Source Voltage
Parameter
–20
V
V GSS
Gate-Source Voltage
±8
V
ID
Drain Current
–10
A
PD
Power Dissipation for Single Operation
– Continuous
(Note 1a)
– Pulsed
–50
(Note 1a)
2.5
(Note 1b)
1.5
(Note 1c)
TJ , TSTG
Operating and Storage Junction Temperature Range
W
1.2
–55 to +175
°C
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
50
°C/W
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1c)
125
°C/W
RθJ C
Thermal Resistance, Junction-to-Case
(Note 1)
25
°C/W
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
FDS6575
FDS6575
13’’
12mm
2500 units
2001 Fairchild Semiconductor Corporation
FDS6575 Rev F(W)
FDS6575
September 2001
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min
Typ
Max Units
Off Characteristics
BV DSS
∆BV DSS
∆TJ
IDSS
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
V GS = 0 V, ID = –250 µA
V DS = –16 V, V GS = 0 V
–1
µA
IGSSF
Gate–Body Leakage, Forward
V GS = 8 V,
V DS = 0 V
100
nA
IGSSR
Gate–Body Leakage, Reverse
V GS = –8 V,
V DS = 0 V
–100
nA
–1.5
V
On Characteristics
–20
ID = –250 µA, Referenced to 25°C
V
–13
mV/°C
(Note 2)
V GS(th)
∆V GS(th)
∆TJ
RDS(on)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
V DS = V GS , ID = –250 µA
ID = –250 µA, Referenced to 25°C
ID(on)
On–State Drain Current
V GS = –4.5 V,
V DS = –5 V
gFS
Forward Transconductance
V DS = –5 V,
ID = –10 A
57
S
V DS = –10 V,
f = 1.0 MHz
V GS = 0 V,
4951
pF
884
pF
451
pF
–0.4
–0.6
3
V GS = –4.5 V, ID = –10 A
V GS = –2.5 V, ID = –9 A
V GS = –4.5 V, ID =–10A, TJ =125°C
8.5
11
11
mV/°C
13
17
20
mΩ
–50
A
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Switching Characteristics
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
td(off)
(Note 2)
V DD = –10V,
V GS = –4.5 V,
16
29
ns
9
18
ns
Turn–Off Delay Time
196
314
ns
tf
Turn–Off Fall Time
78
125
ns
Qg
Total Gate Charge
53
74
nC
Qgs
Gate–Source Charge
Qgd
Gate–Drain Charge
V DS = –10 V,
V GS = –4.5 V
ID = –1 A,
RGEN = 6 Ω
ID = –10 A,
6
nC
12
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
V SD
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
V GS = 0 V, IS = –2.1 A
Voltage
(Note 2)
–0.6
–2.1
A
–1.2
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 50 °C/W when
mounted on a 1in2
pad of 2 oz copper
b) 105 °C/W when
mounted on a .04 in2
pad of 2 oz copper
c) 125 °C/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDS6575 Rev F(W)
FDS6575
Electrical Characteristics
FDS6575
Typical Characteristics
50
2.2
VGS = -4.5V
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
-2.5V
-3.0V
-ID, DRAIN CURRENT (A)
40
-2.0V
-1.5V
30
20
10
0
2
V GS = - 1.5V
1.8
1.6
1.4
-2.0V
-2.5V
1.2
-3.0V
-3.5V
-4.5V
1
0.8
0
0.5
1
1.5
2
0
10
20
-V DS , DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
50
0.035
ID = -10A
V GS = - 4.5V
ID = -5A
1.4
1.2
1
0.8
0.6
0.03
0.025
0.02
T A = 125o C
0.015
0.01
T A = 25o C
0.005
-50
-25
0
25
50
75
100
125
150
175
0
1
2
3
4
5
-V GS, GATE TO SOURCE VOLTAGE (V)
TJ , JUNCTION TEMPERATURE (oC)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
10
50
25o C
TA = -55oC
40
-I S, REVERSE DRAIN CURRENT (A)
VDS = -5V
-ID, DRAIN CURRENT (A)
40
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
RDS(ON), ON-RESISTANCE (OHM)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
1.6
30
-ID , DRAIN CURRENT (A)
125oC
30
20
10
0
V GS = 0V
1
T A = 125o C
0.1
25o C
0.01
-55o C
0.001
0.0001
0
0.5
1
1.5
-V GS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
2
0
0.2
0.4
0.6
0.8
-V SD , BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS6575 Rev F(W)
FDS6575
Typical Characteristics
6000
ID = -10A
VDS = -5V
5000
4
-15V
3
2
4000
3000
2000
C OSS
1
1000
CRSS
0
0
0
10
20
30
40
50
60
0
5
Q g, GATE CHARGE (nC)
20
50
P(pk), PEAK TRANSIENT POWER (W)
100µ
1ms
10ms
RDS(ON) LIMIT
100ms
1s
10s
DC
1
V GS = -4.5V
SINGLE PULSE
RθJA = 125o C/W
0.1
TA = 25 oC
0.01
0.01
0.1
1
10
SINGLE PULSE
Rθ JA = 125°C/W
T A = 25°C
40
30
20
10
0
0.001
100
0.01
0.1
1
10
100
t1 , TIME (sec)
-V DS, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
15
Figure 8. Capacitance Characteristics.
100
10
10
-V DS , DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
-ID, DRAIN CURRENT (A)
f = 1 MHz
VGS = 0 V
CISS
-10V
CAPACITANCE (pF)
-V GS, GATE-SOURCE VOLTAGE (V)
5
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
RθJA(t) = r(t) + RθJA
0.2
0.1
o
RθJA = 125 C/W
0.1
0.05
P(pk)
0.02
0.01
t1
0.01
t2
TJ - TA = P * RθJA(t)
Duty Cycle, D = t 1 / t2
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS6575 Rev F(W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOSTM
EnSignaTM
FACT™
FACT Quiet Series™
FAST 
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench 
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER 
SMART START™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
TruTranslation™
UHC™
UltraFET 
VCX™
STAR*POWER is used under license
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into
support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose
be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance
support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4