FSTD3125 — 4-Bit Bus Switch with Level Shifting Features Description Fairchild switch FSTD3125 provides four high-speed CMOS TTL-compatible bus switches. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. A diode to VCC has been integrated into the circuit to allow for level shifting between 5V inputs and 3.3V outputs. 4Ω Switch Connection between Two Ports Minimal Propagation Delay through the Switch Low ICC Zero Bounce in Flow-through Mode Control Inputs Compatible with TTL Level TruTranslation Voltage Translation from 5.0V Inputs to 3.3V Outputs The device is organized as four one-bit switches with separate /OE inputs. When /OE is LOW, the switch is ON and port A is connected to port B. When /OE is HIGH, the switch is OPEN and a high-impedance state exists between the two ports. Ordering Information Part Number Operating Temperature Range Packing Method Package FSTD3125MTC -40 to 85°C 14-Lead, Thin Shrink Small Outline Package (TSSOP) JEDEC MO-153, 4mm Wide Tube FSTD3125MTCX -40 to 85°C 14-Lead, Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4mm Wide Tape and Reel All packages are lead free per JEDEC: J-STD-020B standard. Technology Description The Fairchild switch family derives from and embodies Fairchild’s proven switch technology used for several years in its 74LVX3L384 (FST3384) bus switch product. /OE1 1 1A 2 /OE2 2A /OE3 3A /OE4 4A 3 1B 6 2B 8 3B 4 5 10 9 13 12 11 4B Figure 1. Logic Diagram © 2001 Fairchild Semiconductor Corporation FSTD3125 • Rev. 1.0.2 www.fairchildsemi.com FSTD3125 — 4-Bit Bus Switch with Level Shifting March 2008 FSTD3125 — 4-Bit Bus Switch with Level Shifting Pin Configuration /OE1 1 14 VCC 1A 2 13 /OE4 1B 3 12 4A /OE2 4 11 4B 2A 5 10 /OE3 2B 6 9 3A GND 7 8 3B Figure 2. TSSOP Pin Assignments Pin Descriptions Pin # Pin Names Description 1,4,10,13 /OE1, /OE2, /OE3, /OE4 Bus Switch Enables 2,5,9,12 1A, 2A, 3A, 4A Bus A 3,6,8,11 1B, 2B, 3B, 4B Bus B 14 VCC Supply Voltage 7 GND Ground Truth Table Inputs Inputs/Outputs /OE A, B LOW A=B HIGH High Impedance © 2001 Fairchild Semiconductor Corporation FST3D125 • Rev. 1.0.2 www.fairchildsemi.com 2 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter VCC Supply Voltage Min. Max. Unit -0.5 7.0 V VS DC Switch Voltage -0.5 7.0 V VIN DC Input Voltage (1) -0.5 7.0 V IIK DC Input Diode Current, VIN<0V -50 mA DC Output Sink Current 128 mA DC VCC / GND Current ±100 mA +150 °C IOUT ICC / IGND TSTG Storage Temperature Range -65 Note: 1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Recommended Operating Conditions FSTD3125 — 4-Bit Bus Switch with Level Shifting Absolute Maximum Ratings The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Min. Max. Unit 4.5 5.5 V VCC Power Supply Operating VIN Input Voltage 0 5.5 V Output Voltage 0 5.5 V 0 5 0 DC -40 +85 VOUT Switch Control Input tr , tf Input Rise and Fall Time TA Operating Temperature, Free Air (2) Switch I/O ns/V °C Note: 2. Unused control inputs must be held HIGH or LOW. They may not float. © 2001 Fairchild Semiconductor Corporation FST3D125 • Rev. 1.0.2 www.fairchildsemi.com 3 Typical values are at VCC = 5.0V and TA = 25°C. Symbol Parameter Conditions VIK Clamp Diode Voltage VIH High-Level Input Voltage VOH High-Level VIL Low-Level Input Voltage IIN Input Leakage Current IOZ Off-state Leakage Current RON ICC ΔICC VCC (V) IIN = -18mA Switch On Resistance Quiescent Supply Current Increase in ICC per Input Min. Typ. Units Max. 4.5 -1.2 4.5 to 5.5 Figure 5, Figure 6, and Figure 7 (3) TA=-40 to +85°C V 2.0 V 4.0 to 5.5 V 4.5 to 5.5 0.8 V 5.5 ±1.0 µA 0 10 µA 0 ≤ A, B ≤ VCC 5.5 ±1.0 µA VIN = 0V, IIN = 64mA 4.5 4 7 VIN = 0V, IIN = 30mA 4.5 4 7 VIN = 2.4V, IIN = 15mA 4.5 35 50 0 ≤ VIN ≤ 5.5V VIN = 5.5V /OE1 = /OE2 = GND VIN = VCC or GND, IOUT = 0 Ω 1.5 5.5 /OE1 = /OE2 = VCC VIN = VCC or GND, IOUT = 0 FSTD3125 — 4-Bit Bus Switch with Level Shifting DC Electrical Characteristics µA 10 One Input at 3.4V, Other Inputs at VCC or GND 5.5 2.5 mA Note: 3. Measured by the voltage drop between the A and B pins at the indicated current through the switch. On resistance is determined by the lower of the voltages on the A or B pins. AC Electrical Characteristics TA = -40 to +85°C, CL = 50pF, and RU = RD = 500Ω. Symbol Parameter Conditions VCC = 4.5 – 5.5V Min. (4) VIN = Open Units Figure 0.25 ns Figure 3 Figure 4 Max. tPHL, tPLH Propagation Delay, Bus-to-Bus tPZH ,tPZL Output Enable Time VIN = 7V for tPZL VIN = Open for tPZH 1.0 6.1 ns Figure 3 Figure 4 tPHZ, tPLZ Output Disable Time VIN = 7V for tPLZ VIN = Open for tPHZ 1.5 6.4 ns Figure 3 Figure 4 Note: 4. This parameter is guaranteed by design, but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical on resistance of the switch and the 50pF load capacitance when driven by an ideal voltage source (zero output impedance). Capacitance TA = +25°C, f = 1MHz. Capacitance is characterized, but not tested. Symbol Parameter Conditions Typ. Units CIN Control Pin Input Capacitance VCC = 5.0V 3 pF CI/O Input/Output Capacitance VCC, /OE = 5.0V 6 pF © 2001 Fairchild Semiconductor Corporation FST3D125 • Rev. 1.0.2 www.fairchildsemi.com 4 Notes: Input driven by 50Ω source terminated in 50Ω. CL includes load and stray capacitance. Input PRR = 1.0MHz, tw = 500ns. Figure 3. AC Test Circuit FSTD3125 — 4-Bit Bus Switch with Level Shifting AC Loadings and Waveforms Figure 4. AC Waveforms © 2001 Fairchild Semiconductor Corporation FSTD3125 • Rev. 1.0.2 www.fairchildsemi.com 5 Figure 5. Output Voltage vs. Supply Voltage, VIN = VCC, TA = 85°C FSTD3125 — 4-Bit Bus Switch with Level Shifting Performance Characteristics Figure 6. Output Voltage vs. Supply Voltage, VIN = VCC, TA = 25°C Figure 7. Output Voltage vs. Supply Voltage, VIN = VCC, TA = 0°C © 2001 Fairchild Semiconductor Corporation FSTD3125 • Rev. 1.0.2 www.fairchildsemi.com 6 FSTD3125 — 4-Bit Bus Switch with Level Shifting Physical Dimensions 0.65 0.43 TYP 1.65 6.10 0.45 12.00°TOP & BOTTOM R0.09 min A. CONFORMS TO JEDEC REGISTRATION MO-153, VARIATION AB, REF NOTE 6 B. DIMENSIONS ARE IN MILLIMETERS C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS D. DIMENSIONING AND TOLERANCES PER ANSI Y14.5M, 1982 E. LANDPATTERN STANDARD: SOP65P640X110-14M F. DRAWING FILE NAME: MTC14REV6 1.00 R0.09min Figure 8. 14-Lead, Thin Shrink Small Outline Package (TSSOP) MO-153, 4mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ © 2001 Fairchild Semiconductor Corporation FSTD3125 • Rev. 1.0.2 www.fairchildsemi.com 7 FSTD3125 — 4-Bit Bus Switch with Level Shifting © 2001 Fairchild Semiconductor Corporation FSTD3125 • Rev. 1.0.2 www.fairchildsemi.com 8