ROHM BU9798KV

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STRUCTURE
PRODUCT NAME
FUNCTION
FEATURE
Silicon monolithic integrated circuit
BU9798KV
LCD control driver for segment type LCD display
○ LCD drive output : Common output : 4, Segment output : 49
○ built-in Display data RAM (DDRAM) : RAM: 49*4 =196 bit
○ 3-wire Serial interface(SD, SCL, CSB )
○ built-in Oscillator circuit
○ built-in LCD Voltage Generator circuit: support 1/3 Bias, 1/3 or 1/4 Duty, 1/1 Bias, 1/1Duty (Static Driving)
Built-in Buffer AMP, Built-in regulator (3.2, 3.3, 3.4, 4.4, 4.5, 4.6, 5.0V)
○ Support Split Supply for Logic (VDD) and LCD (VLCD)
○ Support two output mode SEG/GPO (SEG15~45)
○ built-in LED driver
○ Support two output mode SEG/LED driver (SEG46~48)
○ Support PWM source select, external clock or internal clock ( 12bit / 8bit mode selectable)
○ Low power consumption
○ Support standby mode
○ built-in Power-on Reset circuit
○ No external component
○ Support blink function (Blink frequency 1.6, 2.0, 2.6, 4.0 Hz selectable)
○ Operating power supply: 1.8~3.6V
○ LCD drive power supply voltage : 3.3~5.5V
○ Absolute maximum ratings (VSS = 0V)
Parameter
Symbol
Rated values
Unit
Remarks
Power supply voltage 1
Power supply voltage 2
Allowable loss
Input voltage range
Operational temperature range
Storage temperature range
Output current
VDD
-0.3 ~ +4.5
V
Power supply
VLCD
-0.5 ~ +7.0
V
LCD drive voltage
Pd
1.0*1
W
VIN
-0.5 ~ VDD+0.5
V
Topr
-30 ~ +75
℃
Tstg
-55 ~ +125
℃
Iout1
5
mA
SEG ouput
Iout2
5
mA
COM ouput
Iout3
10
mA
GPO ouput
Iout4
50
mA
LED ouput
*1 When use more than Ta=25 degree, subtract 10.0mW per degree. (using ROHM standard board)
(board size:70mm×70mm×1.6mm material: FR4 board copper foil: land pattern only)
○ Recommend operating conditions (Ta=-30~+75degree, VSS = 0V)
Symbol
MIN
TYP
MAX
Unit
Power supply voltage 1
Parameter
VDD
1.8
-
3.6
V
Power supply
Remarks
Power supply voltage 2
VLCD
3.3
-
5.5
V
For LCD drive
LED Power supply voltage
VLED
1.0
-
VLCD
V
LED drive voltage
Output current
Iout4
-
-
25
mA
At one LED port
Iout4
-
-
75
mA
At all LED port
○ This product is not designed against radioactive ray.
● As for contents of mention of these materials. A service in the foreign exchange and foreign trade control law
(Technology in the design, the manufacture and the use). Be careful of handling because it is likely to correspond.
● These goods are specific machines. Because the exclusive goods which are specially designed for the device are considered.
Whether that machine, device corresponds to strategic goods to decide as the foreign exchange and foreign trade control law.
You must have it judged.
Status of this document
The Japanese version of this document is the formal specification. A customer may use this translation version only for a reference to help reading the formal
version.
If there are any differences in translation version of this document, formal version takes priority.
REV. A
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○Block diagrams
○Outline drawing
COM0……COM3 SEG0 ……………………………… SEG48
VSS2
VLCD
LCD voltage
Generator
common
driver
Segment
driver
Segment
Segment
driver/GPO driver/LED
Ref Voltage
Circuit
Vreg
GPO/LED
Controller
LCD
BIAS
SELECTOR
BU9798K
common
counter
blink timing
generator
DDRAM
GPO data latch
PWM
Generator
VSS
INHb
CLKIN
Command register
Data Decoder
OSCILLATOR
Power On Reset
serial inter face
Output
Controller
VDD
Lot No.
IF FILTER
VSS
TEST1
SD
CSB
SCL
PWMOUT
Package: VQFP64
○ Electrical Characteristics
( Ta=-30~75degree, VDD=1.8V~3.6V, VLCD=3.3V~5.5V, VSS=0 ; unless otherwise specified )
Limit
TYP
0.2
Parameter
Symbol
“H” level input voltage
“L” level input voltage
Hysteresis width
VIH
VIL
VH
“H” level input current
IIH1
-
-
“L” level input current
IIL1
-5
-
MIN
0.8VDD
VSS
-
MAX
VDD
0.2VDD
-
Unit
Condition
V
V
V
SD, SCL, CSB, CLKIN, TEST1, INHb
SD, SCL, CSB, CLKIN, TEST1, INHb
SCL, INHb, VDD=3.3V, Ta=25degree
5
uA
SD, SCL, CSB, CLKIN, INHb, VI=3.6V
-
uA
SD, SCL, CSB, CLKIN, INHb, TEST1, VI=0V
Iload=-50uA, VLCD=5.0V, SEG0~48,
VOH1
VLCD-0.4
V
In case, internal regulator do not used
Iload=-50uA, VLCD=5.0V, COM0~3,
“H” level output
VOH2
VLCD-0.4
V
IN case, internal regulator do not used
voltage (*1)
(*3)
Iload=-1mA,VLCD=5.0V,SEG15~45(GPO mode)
VOH3
VLCD-0.6
V
In case, internal regulator do not used
VOH4
VDD-0.6
V
Iload=-1mA, VDD=3.3V, PWMOUT
VOL1
0.4
V
Iload= 50uA, VLCD=5.0V, SEG0~48
VOL2
0.4
V
Iload= 50uA, VLCD=5.0V, COM0~3
“L” level output
Iload=1mA, VLCD=5.0V, VDD=3.3V
VOL3
0.5
V
voltage (*3)
SEG15~45(GPO mode), PWMOUT
Iload=20mA, VLCD=5.0V
VOL4
0.11
0.5
V
SEG46~48(LED drive mode)
IstVDD
3
10
uA
Input terminal ALL’L’, Display off, Oscillation off
IstVLCD
0.5
5
uA
Input terminal ALL’L’, Display off, Oscillation off
VDD=3.3V, Ta=25degree, 1/3bias, fFR=64Hz,
IVDD1
8
15
uA
PWM generate off, All output pin open
VDD=3.3V, Ta=25degree, 1/3bias, fFR=64Hz,
IVDD2
90
130
uA
PWM Frequency=500Hz setting, output pin open
VLCD=5.0V, Ta=25degree, 1/3bias、fFR=64Hz,
Supply current (*2)
IVLCD1
10
15
uA
internal regulator do not used, LED drive mode off, All
output pin open
VLCD=5.0V, Ta=25degree, 1/3bias, fFR=64Hz,
IVLCD2
25
40
uA
using internal regulator , LED drive mode off, All output pin
open
VLCD=5.0V, Ta=25degree, 1/3bias,
IVLCD3
30
48
uA
fFR=64Hz, using built-in regulator,
PWM Frequency=500Hz setting, output pin open
*1 In case, internal regulator do not use. When you use internal regulator, please add load regulation specified at page3
*2 In case, power save mode 1 and frame inversion setting *3 Iload : In case, load current from only one port
REV. A
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○Oscillation Frequency Characteristics ( Ta=-30~75degree, VDD=1.8V~3.6V, VLCD=3.3V~5.5V, VSS=0 ; unless otherwise specified )
Parameter
Symbol
Frame frequency 1
Frame frequency 2
Frame frequency 3
CLKIN input frequency
fFR1
fFR2
fFR3
fCLK
Limit
TYP
64
64
2
MIN
57.6
51.2
45.0
-
MAX
70.4
73.0
64
4
Unit
Condition
Hz
Hz
Hz
MHz
VDD=3.3V, Ta=25degree, fFR=64Hz setting
VDD=2.5~3.6V fFR=64Hz setting
VDD=1.8~2.5V fFR=64Hz setting
○ Load regulation ( Ta=-30~75degree, VDD=1.8V~3.6V, VLCD=3.3V~5.5V, VSS=0 ; unless otherwise specified )
Vreg1
Vreg2
MIN
4.35
4.42
Limit
TYP
4.5
4.5
MAX
4.65
4.58
Vreg
-
-
0.3
Parameter
Symbol
Output voltage 1
Output voltage 2
Load Regulation (**)
Unit
Condition
V
V
4.5V setting (VLCD=5.5V, Ta=-30~75degree)
4.5V setting (VLCD=5.5V, Ta=25degree)
V
Iout = -300uA
Caution : Please use regulator at “Regulator output voltage < VLCD – 0.5V”
**
○ MPU interface Characteristics ( Ta=-30~75degree, VDD=1.8V~3.6V, VLCD=3.3V~5.5V, VSS=0 )
Parameter
Symbol
Input rise time
Input fall time
SCL cycle time
“H” SCL pulse width
“L” SCL pulse width
SD setup time
SD hold time
CSB setup time
CSB hold time
“H” CSB pulse width
tr
tf
tSCYC
tSHW
tSLW
tSDS
tSDH
tCSS
tCSH
tCHW
MIN
250
50
50
50
50
50
50
50
Limit
TYP
-
25
26
27
28
29
30
31
32
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
MAX
50
50
-
Unit
Condition
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
○ Terminal number/name
1
2
3
4
5
6
7
8
CSB
SCL
SD
VDD
TEST1
VSS1
INHb
VLCD
9
10
11
12
13
14
15
16
COM0
COM1
COM2
COM3
SEG0
SEG1
SEG2
SEG3
17
18
19
20
21
22
23
24
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
33
34
35
36
37
38
39
40
REV. A
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
41
42
43
44
45
46
47
48
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
49
50
51
52
53
54
55
56
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
SEG42
SEG43
57
58
59
60
61
62
63
64
SEG44
SEG45
SEG46
SEG47
SEG48
VSS2
PWMOUT
CLKIN
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Cautions on use
(1) Absolute Maximum Ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down devices, thus
making impossible to identify breaking mode such as a short circuit or an open circuit. If any special mode exceeding the absolute maximum ratings is
assumed, consideration should be given to take physical safety measures including the use of fuses, etc.
(2) Operating conditions
These conditions represent a range within which characteristics can be provided approximately as expected. The electrical characteristics are
guaranteed under the conditions of each parameter.
(3) Reverse connection of power supply connector
The reverse connection of power supply connector can break down ICs. Take protective measures against the breakdown due to the reverse connection,
such as mounting an external diode between the power supply and the IC’s power supply terminal.
(4) Power supply line
Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines. In this regard, or the digital block power
supply and the analog block power supply, even though these power supplies has the same level of potential, separate the power supply pattern for the
digital block from that for the analog block, thus suppressing the diffraction of digital noises to the analog block power supply resulting from
impedance common to the wiring patterns. For the GND line, give consideration to design the patterns in a similar manner.
Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At the same time, in order to
use an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to be used present no problem including the occurrence of
capacity dropout at a low temperature, thus determining the constant.
(5) GND voltage
Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state. Furthermore, check to be sure no
terminals are at a potential lower than the GND voltage including an actual electric transient.
(6) Short circuit between terminals and erroneous mounting
In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can break down the ICs.
Furthermore, if a short circuit occurs due to foreign matters entering between terminals or between the terminal and the power supply or the GND
terminal, the ICs can break down.
(7) Operation in strong electromagnetic field
Be noted that using ICs in the strong electromagnetic field can malfunction them.
(8) Inspection with set PCB
On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress. Therefore, be sure to discharge
from the set PCB by each process. Furthermore, in order to mount or dismount the set PCB to/from the jig for the inspection process, be sure to turn
OFF the power supply and then mount the set PCB to the jig. After the completion of the inspection, be sure to turn OFF the power supply and then
dismount it from the jig. In addition, for protection against static electricity, establish a ground for the assembly process and pay thorough attention to
the transportation and the storage of the set PCB.
(9) Input terminals
In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic element can cause
interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal. Therefore, pay thorough attention not to
handle the input terminals, such as to apply to the input terminals a voltage lower than the GND respectively, so that any parasitic element will operate.
Furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the IC. In addition, even if the power supply
voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within the guaranteed value of electrical characteristics.
(10) Ground wiring pattern
If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from the small-signal
GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring pattern and voltage fluctuations due to a
large current will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of
external parts as well.
(11) External capacitor
In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a degradation in the nominal
capacitance due to DC bias and changes in the capacitance due to temperature, etc.
(12) No Connecting input terminals
In terms of extremely high impedance of CMOS gate, to open the input terminals causes unstable state. And unstable state brings the inside
gate voltage of p-channel or n-channel transistor into active. As a result, battery current may increase. And unstable state can also causes
unexpected operation of IC. So unless otherwise specified, input terminals not being used should be connected to the power supply or GND
line.
(13) Rush current
When power is first supplied to the CMOS IC, it is possible that the internal logic may be unstable and rush current may flow instantaneously.
Therefore, give special condition to power coupling capacitance, power wiring, width of GND wiring, and routing of connections.
REV. A
Notice
Notes
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The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
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The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
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The Products specified in this document are intended to be used with general-use electronic
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