1/4 STRUCTURE PRODUCT NAME TYPE FEATURES Silicon Monolithic Integrated Circuit White LED driver for car navigation back light BD８１1８FM ・Step-up DC/DC converter ・Built in UVLO Built in OSC ・Built in OVP ・4 parallel current output （output current is set with external resister） ・LED open detection circuit ・Built in TSD ・PWM adjustment ・Built in OCP ・FAIL output (self diagnosis) ●ABSOLUTE MAXIMUM RATINGS (Ta=25℃) PARAMETER Power supply voltage(Pin : 1） Load switch output voltage(Pin : 2） SYMBOL LIMITS UNIT VCC 36 V VLOADSW 36 V LED output voltage(Pin : 12, 14, 15, 17) VLED 36 V FAIL output voltage(Pin : 3, 20) VOL 7 V VIN -0.3～7 < VCC V VDAC -0.3～7 < VCC V Input voltage(Pin : 5, 6, 10, 11, 24) VDAC input voltage(Pin : 8) Power dissipation ※1 Pd 2.20 Junction Temperature Tjmax 150 ℃ W Operating temperature range Topr -40～+95 ℃ Strage temperature range Tstg -55～+150 ℃ LED drive current(Pin : 12, 14, 15, 17) ILED 150 ※2※3 mA ※1 70mm×70mm×1.6mm glass epoxy mounting. Decline by 17.6mw/℃ ※2 It is correlate LED drive current with VF dispersion each of current outputs. Refer to the technical note. ※3 Current maximum for 1ch. Do not however exceed Pd. ●Operating range(Ta=25℃) SYMBOL LIMITS Power Supply Voltage（Pin : 1） PARAMETER VCC 4.5～30 V Oscillation frequency(Pin : 26) FOSC 50～550 kHz FSYNC fosc～550 kHz External synchronous frequency(Pin : 6) ※4 ※5 UNIT External synchronous pulse(Pin : 6) FSDUTY 40～60 % ※4 SYNC have to be connected to GND when external synchronizing frequency is not needed. ※5 Don’t change external synchronous frequency to internal oscillation frequency when external synchronous frequency is inputted. * This product is not designed for protection against radioactive rays. REV. A 2/4 ●ELECTRICAL CHARACTERISTICS（Unless otherwise specified Ta=25℃, VCC=12V） LIMIT PARAMETER SYMBOL Min Typ Max UNIT CONDITIONS EN=2V, SYNC=VREG, RT=OPEN PWM=OPEN, ISET=OPEN, CIN=1μF EN=Low Circuit current ICC 2.5 6 10 mA Standby current [VREG] (Pin : 4) VREG output voltage [SW] (Pin : 22, 23) SWOUT upper ON resistance SWOUT lower ON resistance Over current protection limited voltage [error amp] (Pin : 12, 14, 15, 17, 27, 28) LED control voltage COMP shink current COMP source current SS charge current SS maximum voltage SS standby current [frequency] (Pin : 23, 26) Oscillation frequency [OVP] (Pin : 25) Over voltage detection voltage OVP hysteresis range [UVLO] (Pin : 4) UVLO detection voltage UVLO Hysteresis range [Load SW] (Pin : 2) Load sw low voltage IST - 0 2 μA VREG 4.5 5 5.5 V IREG=-10mA, CREG=1μF RONH RONL VDCS 0.05 0.05 0.3 3 2 0.4 7 5 0.5 Ω Ω V ION=-10mA ION=10mA VCS=sweep up VLED ISKCP ISCCP ISS VMXSS ISTSS 0.7 40 -200 -14 2 - 0.8 100 -100 -10 2.5 0 0.9 200 -40 -6 3 2 V μA μA μA V μA VLED=2V, Vcomp=1V VLED=0V, Vcomp=1V VSS＝1.0V EN＝High EN＝Low FOSC 250 300 350 KHz RT=100kΩ VDOVP VDOHS 1.86 0.35 2.0 0.45 2.14 0.55 V V VOVP=Sweep up VOVP=Sweep down VDUVLO VDUHS 2.5 50 2.8 100 3.1 200 V mV VREG=Sweep down VREG=Sweep up VLDL 0.05 0.15 0.3 V [LED output] (Pin : 5, 9, 12, 14, 15, 17, 25) LED current relative dispersion width LED current absolute dispersion width ISET voltage PWM frequency PWM adjustment ΔILED1 ΔILED2 VISET Duty FPWM -6 0 1.96 0.38 0 0 3 2.00 - 6 6 2.04 99.5 20 % % V % KHz Open detection voltage1 VDOP1 0.05 0.15 0.3 V Open detection voltage2 VDOP2 1.56 1.7 1.84 V VINH VINL IIN IEN 2.6 GND 18 13 35 25 5.5 0.8 53 38 V V μA μA VFLL 0.05 0.1 0.2 [Logic input] (Pin : 5, 6, 10, 11, 24) Input high voltage Input low voltage Input current Input current [FAIL output] (Pin : 3, 20) FAIL low voltage ◎ This product is not designed for protection against radioactive rays. ● PHYSICAL DIMENSIONS・MARKING Product series Max 18.85 (include BURR) BD8118FM Lot No. HSOP-M28 （UNIT:mm） REV. A V ILOAD=10mA ILED=50mA ILED=50mA ILED=50mA FPWM=150Hz, ILED=50mA ※1, 2, 3 Duty=50%，ILED=50mA ※2, 3 VLED= Sweep down, VOVP＞VDOP2, VSS≧VMXSS VOVP= Sweep up, VLED ＞ VDOP1, VSS≧VMXSS VIN=5V (Pin : 5, 6, 10, 11) VEN=5V (Pin : 24) IOL=1ｍA ※1 0%, 100% input possible ※2 ILED=VDAC÷RISET×3300 ※3 ILED=VISET÷RISET×3300, VDAC＞VISET 3/4 ●BLOCK DIAGRAM VREG LOADSW VCC OVP VREG UVLO TSD OVP FAIL1 EN Driver PW M Comp SWOUT SYNC OSC RT － ＋ ＋ Control Log ic CS － ＋ OCP ERR Amp － － － － ＋ COMP GND LED1 Soft SS Start LED2 LED3 Current driver PWM LED4 ISET VDAC PGND ISET Open Detect FAIL2 LEDEN1 ●Pin No, Pin Name, Function Pin Pin No Name Function Power supply LEDEN2 Pin No Pin Name Function 15 LED3 LED output （Open Drain） 1 VCC 2 LOADSW FET pin for load sw （Open Drain） 16 - 3 FAIL1 Fail signal output （Open Drain） 17 LED4 4 VREG Internal voltage regulator 18 - N.C LED output （Open Drain） N.C. 5 PWM PWM adjustment input 19 - 6 SYNC External synchronizing input 20 FAIL2 Fail signal output (Open det : Open Drain） N.C. LED output GND pin 7 GND Ground pin 21 PGND 8 VDAC DC flexible input 22 CS 9 ISET LED output current set resistor 23 SWOUT 10 LEDEN1 LED output enable pin1 24 EN 11 LEDEN2 LED output enable pin2 25 OVP 12 LED1 LED output （Open Drain） 26 RT Frequency set resistor N.C. 27 SS Softstart pin LED output （Open Drain） 28 COMP 13 - 14 LED2 REV. A DC/DC output current detection pin DC/DC SW output pin Enable pin OVP pin over voltage detection pin Error amp output 4/4 ● Operation Notes (1) Absolute maximum ratings Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may result in IC damage. Assumptions should not be made regarding the state of the IC (short mode or open mode) when such damage is suffered. A physical safety measure such as a fuse should be implemented when use of the IC in a special mode where the absolute maximum ratings may be exceeded is anticipated. (2) Reverse connection of a power supply connector If the connector of power is wrong connected, it may result in IC breakage. In order to prevent the breakage from the wrong connection, the diode should be connected between external power and the power terminal of IC as protection solution. (3) Power supply and ground lines. Fluctuating voltage on the power supply and ground lines may damage the device. Be sure to connect a bypass filter capacitor as close as possible to the IC between the power supply and ground pins. Check that the selected capacitance will not have an adverse influence on any characteristics, such as a drop in the electrolytic capacitor value that can occur at low temperatures. (4) GND potential Ensure a minimum GND pin potential in all operating conditions. (5) Setting of heat Use a setting of heat that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. (6) Pin short and mistake fitting Use caution when orienting and positioning the IC for mounting on printed circuit boards.Improper mounting may result in damage to the IC. Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may result in IC damage. (7) Actions in strong magnetic field Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction. (8) Thermal shutdown circuit(TSD) This IC built-in a Thermal shutdown circuit (TSD circuit). If Chip temperature becomes 175℃(TYP.), make the output an Open state. Eventually, warmly clearing the circuit is decided by the condition of whether the heat excesses over the assigned limit, resulting the cutoff of the circuit of IC, and not by the purpose of preventing and ensuring the IC. Therefore, the warm switch-off should not be applied in the premise of continuous employing and operation after the circuit is switched on. (9) Testing on application boards When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always discharge capacitors after each process or step. Ground the IC during assembly steps as an antistatic measure, and use similar caution when transporting or storing the IC. Always turn the IC's power supply off before connecting it to or removing it from a jig or fixture during the inspection process (10) IC terminal input This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated. P/N junctions are formed at the intersection of these P layers with the N layers of other elements to create a variety of parasitic elements. For example, when a resistor and transistor are connected to pins. (See the chart below.) the P/N junction functions as a parasitic diode when GND > (Pin A) for the resistor or GND > (Pin B) for the transistor (NPN). Similarly, when GND > (Pin B) for the transistor (NPN), the parasitic diode described above combines with the N layer of other adjacent elements to operate as a parasitic NPN transistor. The formation of parasitic elements as a result of the relationships of the potentials of different pins is an inevitable result of the IC's architecture. The operation of parasitic elements can cause interference with circuit operation as well as IC malfunction and damage. For these reasons, it is necessary to use caution so that the IC is not used in a way that will trigger the operation of parasitic elements, such as by the application of voltages lower than the GND (PCB) voltage to input pins. (Pin A) Ｂ (Pin B) Ｃ (Pin B) Ｅ ＧＮＤ Ｂ ＋ Ｐ Ｐ ＋ Ｐ Ｎ ＋ Ｐ Ｎ Ｎ Ｎ P Substrate Parasitic diode ＧＮＤ Ｎ Ｐ Ｃ Ｅ ＋ Ｐ ＧＮＤ near by other element Ｎ Ｎ parasitic diode P Substrate Parasitic diode ＧＮＤ Fig of chart of Parasitic diode (11) Ground wiring patterns When using both small signal and large current GND patterns,it is recommended to isolate the two ground patterns,placing a single ground point at the application's reference point so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND wiring patterns of any external components. (12) LED output terminal Don’t connect Capacitor to LED output terminal (Pin : 12,14,15,17), as doing so may cause LED short detection to malfunction. REV. A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. 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