FAIRCHILD 74ALVCH2245

Revised January 2002
74ALVCH2245
Low Voltage Bidirectional Transceiver with Bushold
and 26Ω Series Resistors in B Outputs
General Description
Features
The ALVCH2245 contains eight non-inverting bidirectional
buffers with 3-STATE outputs and is intended for bus oriented applications. The T/R input determines the direction
of data flow. The OE input disables both the A and B Ports
by placing them in a high impedance state. The
ALVCH2245 data inputs include active bushold circuitry,
eliminating the need for external pull-up resistors to hold
unused or floating data inputs at a valid logic level.
The 74ALVCH2245 is designed for low voltage (1.65V to
3.6V) VCC applications. The ALVCH2245 is also designed
with 26Ω series resistance in the B Port outputs. This
design reduces line noise in applications such as memory
address drivers, clock drivers, and bus transceivers transmitters
The 74ALVCH2245 is fabricated with an advanced CMOS
technology to achieve high-speed operation while maintaining low CMOS power dissipation.
■ 1.65V to 3.6V VCC supply operation
■ 3.6V tolerant control inputs
■ Bushold on data inputs eliminates the need for external
pull-up/pull-down resistors
■ 26Ω series resistors in B Port outputs
■ tPD (A to B)
4.9 ns max for 3.0V to 3.6V VCC
6.1 ns max for 2.3V to 2.7V VCC
9.8 ns max for 1.65V to 1.95V VCC
■ Uses patented Quiet Series noise/EMI reduction
circuitry
■ Latchup conforms to JEDEC JED78
■ ESD performance:
Human body model > 2000V
Machine model > 200V
Ordering Code:
Order Number
Package Number
74ALVCH2245WM
M20B
74ALVCH2245MTC
MTC20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
Quiet Series is a trademark of Fairchild Semiconductor Corporation.
© 2002 Fairchild Semiconductor Corporation
ds500716
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74ALVCH2245 Low Voltage Bidirectional Transceiver with Bushold
January 2002
74ALVCH2245
Pin Descriptions
Pin Names
Truth Table
Description
Inputs
Outputs
OE
Output Enable Input (Active LOW)
OE
T/R
Transmit/Receive Input
L
L
Bus B0–B7 Data to Bus A0–A7
A0–A7
Side A Bushold Inputs or 3-STATE Outputs
L
H
Bus A0–A7 Data to Bus B0–B7
B0–B7
Side B Bushold Inputs or 3-STATE Outputs
H
X
HIGH Z State on A0–A7, B0–B7
T/R
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Logic Diagram
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2
Recommended Operating
Conditions (Note 3)
−0.5V to +4.6V
Supply Voltage (VCC)
−0.5V to 4.6V
DC Input Voltage (VI)
Output Voltage (VO) (Note 2)
Power Supply
−0.5V to VCC +0.5V
Operating
DC Input Diode Current (IIK)
VI < 0V
−50 mA
0V to VCC
Output Voltage (VO)
DC Output Diode Current (IOK)
0V to VCC
Free Air Operating Temperature (TA)
VO < 0V
−50 mA
−40°C to +85°C
Minimum Input Edge Rate (∆t/∆V)
VIN = 0.8V to 2.0V, VCC = 3.0V
DC Output Source/Sink Current
±50 mA
(IOH/IOL)
±100 mA
Supply Pin (ICC or GND)
10 ns/V
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.
DC VCC or GND Current per
Storage Temperature Range (TSTG)
1.65V to 3.6V
Input Voltage
−65°C to +150°C
Note 2: IO Absolute Maximum Rating must be observed.
Note 3: Floating or unused control inputs must be held HIGH or LOW.
DC Electrical Characteristics
Symbol
VIH
VIL
VOH
VOL
II
Parameter
Conditions
HIGH Level Input Voltage
LOW Level Input Voltage
VCC
(V)
Min
1.65 - 1.95
0.65 x VCC
2.3 - 2.7
1.7
2.7 - 3.6
2.0
Max
V
1.65 - 1.95
0.35 x VCC
2.3 - 2.7
0.7
2.7 - 3.6
0.8
HIGH Level Output Voltage
IOH = −100 µA
A Outputs
IOH = −4 mA
1.65
1.2
IOH = −6 mA
2.3
2.0
IOH = −12 mA
2.3
1.7
2.7
2.2
3.0
2.4
1.65 - 3.6
3.0
2
HIGH Level Output Voltage
IOH = −100 µA
1.65 - 3.6
VCC - 0.2
B Outputs
IOH = −2 mA
1.65
1.2
IOH = −4 mA
2.3
1.9
IOH = −6 mA
2.3
1.7
3.0
2.4
IOH = −8 mA
2.7
2
IOH = −12 mA
3.0
2
LOW Level Output Voltage
IOL = 100 µA
1.65 - 3.6
0.2
A Outputs
IOL = 4 mA
1.65
0.45
V
IOL = 6 mA
2.3
0.4
IOL = 12 mA
2.3
0.7
2.7
0.4
IOL = 24 mA
3.0
0.55
LOW Level Output Voltage
IOL = 100 µA
1.65 - 3.6
0.2
B Outputs
IOL = 2 mA
1.65
0.45
IOL = 4 mA
2.3
0.4
IOL = 6 mA
2.3
0.55
3.0
0.55
IOL = 8 mA
2.7
0.6
IOL = 12 mA
3.0
0.8
0 ≤ VI ≤ 3.6V
1.65 - 3.6
±5.0
3
V
VCC - 0.2
IOH = −24 mA
Input Leakage Current
Units
V
µA
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74ALVCH2245
Absolute Maximum Ratings(Note 1)
74ALVCH2245
DC Electrical Characteristics
Symbol
(Continued)
Parameter
VCC
Conditions
Min
Max
Units
(V)
II(HOLD)
Bushold Input Maximum
VIN = 0.58V
1.65
25
Drive Hold Current
VIN = 1.07V
1.65
−25
VIN = 0.7V
2.3
45
VIN = 1.7V
2.3
−45
VIN = 0.8V
3.0
75
VIN = 2.0V
3.0
−75
0 < VO ≤ 3.6V
3.6
±500
1.65 - 3.6
±10
µA
3.6
40
µA
2.7 - 3.6
750
µA
IOZ
3-STATE Output Leakage
0 ≤ VO ≤ 3.6V, VI = VIH or VIL
ICC
Quiescent Supply Current
VI = VCC or GND, IO = 0
∆ICC
Increase in ICC per Input
VIH = VCC − 0.6V
µA
AC Electrical Characteristics
TA = −40°C to +85°C, RL = 500Ω
Symbol
tPHL, tPLH
Parameter
CL = 50 pF
VCC = 3.3V ± 0.3V
CL = 30 pF
VCC = 2.7V
VCC = 2.5 ± 0.2V
VCC = 1.8V ± 0.15V
Min
Max
Min
Max
Min
Max
Min
Max
1.1
4.9
1.3
6.1
0.8
5.6
1.5
9.8
1.1
4.0
1.3
4.7
0.8
4.2
1.5
8.4
1.1
5.5
1.3
7.1
0.8
6.6
1.5
9.8
1.1
5.0
1.3
6.1
0.8
5.6
1.5
9.8
1.1
4.7
1.3
5.2
0.8
4.7
1.5
8.5
1.1
4.1
1.3
4.5
0.8
4.0
1.5
7.2
Units
Propagation Delay
A to B
ns
Propagation Delay
B to A
tPZL, tPZH
Output Enable Time
A to B
ns
Output Enable Time
B to A
tPLZ, tPHZ
Output Disable Time
A to B
ns
Output Disable Time
B to A
Capacitance
Symbol
Parameter
Conditions
TA = +25°C
VCC
Typical
Units
CIN
Input Capacitance
VI = 0V or VCC
3.3
6
pF
CIO
Input, Output Capacitance
VO = 0V or VCC
3.3
7
pF
CPD
Power Dissipation Capacitance
3.3
20
2.5
20
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Outputs Enabled f = 10 MHz, CL = 50 pF
4
pF
TABLE 1. Values for Figure 1
TEST
SWITCH
tPLH, tPHL
Open
tPZL, tPLZ
VL
tPZH, tPHZ
GND
FIGURE 1. AC Test Circuit
TABLE 2. Variable Matrix
(Input Characteristics: f = 1MHz; tr = tf = 2ns; ZO = 50Ω)
Symbol
VCC
3.3V ± 0.3V
2.7V
2.5 ± 0.2V
1.8V ± 0.15V
Vmi
1.5V
1.5V
VCC/2
VCC/2
Vmo
1.5V
1.5V
VCC/2
VCC/2
VX
VOL + 0.3V
VOL + 0.3V
VOL + 0.15V
VOL + 0.15V
VY
VOH − 0.3V
VOH − 0.3V
VOH − 0.15V
VOH − 0.15V
VL
6V
6V
VCC*2
VCC*2
FIGURE 2. Waveform for Inverting and Non-inverting Functions
FIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage Logic
FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic
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74ALVCH2245
AC Loading and Waveforms
74ALVCH2245
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
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74ALVCH2245 Low Voltage Bidirectional Transceiver with Bushold
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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