IRF AUIRLU3114Z Advanced process technology Datasheet

PD - 96381
AUTOMOTIVE GRADE
AUIRLR3114Z
AUIRLU3114Z
HEXFET® Power MOSFET
Features
l
l
l
l
l
l
l
l
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Logic Level
Lead-Free, RoHS Compliant
Automotive Qualified *
VDSS
RDS(on) max @ 10V
D
40V
4.9mΩ
6.5mΩ
130A
42A
max @ 4.5V
G
k
ID (Silicon Limited)
ID (Package Limited)
S
Description
Specifically designed for Automotive applications, this
HEXFET® Power MOSFET utilizes the latest processing
techniques to achieve extremely low on-resistance per
silicon area. Additional features of this design are a 175°C
junction operating temperature, fast switching speed and
improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable
device for use in Automotive applications and a wide variety
of other applications.
D
S
D
G
S
G
I-Pak
AUIRLU3114Z
D-Pak
AUIRLR3114Z
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications
is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal
resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (T A)
is 25°C, unless otherwise specified.
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
Parameter
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Max.
130
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
VGS
EAS (Thermally limited)
Gate-to-Source Voltage
Single Pulse Avalanche Energy
EAS (Tested )
IAR
EAR
Single Pulse Avalanche Energy Tested Value
Avalanche Current
Repetitive Avalanche Energy
TJ
TSTG
Operating Junction and
Storage Temperature Range
c
d
g
h
A
42
c
PD @TC = 25°C
Units
k
k
89
500
140
W
0.95
±16
W/°C
V
130
260
mJ
See Fig.12a, 12b, 15, 16
A
mJ
-55 to + 175
°C
Soldering Temperature, for 10 seconds
300(1.6mm from case)
Thermal Resistance
j
Parameter
RθJC
Junction-to-Case
RθJA
RθJA
Junction-to-Ambient (PCB mount)
Junction-to-Ambient
i
Typ.
–––
–––
Max.
1.05
40
–––
110
Units
°C/W
HEXFET® is a registered trademark of International Rectifier.
*Qualification standards can be found at http://www.irf.com/
www.irf.com
1
06/22/11
AUIRLR/U3114Z
Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
V(BR)DSS
ΔV(BR)DSS/ΔTJ
RDS(on)
VGS(th)
gfs
IDSS
IGSS
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Min.
40
–––
Typ.
–––
0.032
Max.
–––
–––
Units
Conditions
V
VGS = 0V, ID = 250μA
V/°C Reference to 25°C, ID = 1mA
Static Drain-to-Source On-Resistance
–––
–––
3.9
5.2
4.9
6.5
mΩ
Gate Threshold Voltage
Forward Transconductance
1.0
98
–––
–––
2.5
–––
V
S
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
–––
–––
–––
–––
–––
–––
20
250
100
Gate-to-Source Reverse Leakage
–––
–––
-100
μA
nA
VGS = 10V, ID = 42A
VGS = 4.5V, ID = 42A
e
e
VDS = VGS, ID = 100μA
VDS = 10V, ID = 42A
VDS = 40V, VGS = 0V
VDS = 40V, VGS = 0V, TJ = 125°C
VGS = 16V
VGS = -16V
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
LD
–––
–––
40
12
56
–––
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
–––
–––
–––
18
25
140
–––
–––
–––
Turn-Off Delay Time
Fall Time
–––
–––
33
50
–––
–––
Internal Drain Inductance
–––
4.5
–––
Internal Source Inductance
–––
7.5
–––
6mm (0.25in.)
from package
and center of die contact
VGS = 0V
VDS = 25V
ƒ = 1.0MHz
nC
VGS = 4.5V
VDD = 20V
ID = 42A
ns
Ciss
Coss
Crss
Coss
Coss
Coss eff.
RG = 3.7Ω
VGS = 4.5V
e
e
Between lead,
nH
LS
ID = 42A
VDS = 20V
Total Gate Charge
Gate-to-Source Charge
D
G
S
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
3810
650
350
–––
–––
–––
Output Capacitance
Output Capacitance
–––
–––
2390
580
–––
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 32V, ƒ = 1.0MHz
Effective Output Capacitance
–––
820
–––
VGS = 0V, VDS = 0V to 32V
Min.
Typ.
Max.
–––
–––
42
–––
–––
500
–––
–––
1.3
V
p-n junction diode.
TJ = 25°C, IS = 42A, VGS = 0V
–––
–––
30
27
45
41
ns
nC
TJ = 25°C, IF = 42A, VDD = 20V
di/dt = 100A/μs
pF
f
Diode Characteristics
IS
Parameter
Continuous Source Current
ISM
(Body Diode)
Pulsed Source Current
VSD
trr
Qrr
ton
c
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
k
Units
A
Conditions
MOSFET symbol
showing the
integral reverse
D
G
S
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
‚ Limited by TJmax, starting TJ = 25°C, L = 0.15mH
RG = 25Ω, IAS = 42A, VGS =10V. Part not
recommended for use above this value.
ƒ Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
„ Coss eff. is a fixed capacitance that gives the
same charging time as Coss while VDS is rising
from 0 to 80% VDSS .
2
†
‡
ˆ
‰
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
This value determined from sample failure population. 100%
tested to this value in production.
When mounted on 1" square PCB (FR-4 or G-10 Material).
Rθ is measured at TJ approximately 90°C.
Calculated continuous current based on maximum allowable
junction temperature. Package limitation is 42A.
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AUIRLR/U3114Z
Qualification Information†
Automotive
(per AEC-Q101)
Qualification Level
Moisture Sensitivity Level
Machine Model
Human Body Model
ESD
Charged Device
Model
RoHS Compliant
†
††
Comments: This part number(s) passed Automotive
qualification. IR’s Industrial and Consumer qualification
level is granted by extension of the higher Automotive level.
3L-D PAK
MSL1
3L-I-PAK
N/A
†††
Class M4(+/- 425V )
(per AEC-Q101-002)
†††
Class H1C(+/- 2000V )
(per AEC-Q101-001)
†††
Class C5(+/- 1125V )
(per AEC-Q101-005)
Yes
Qualification standards can be found at International Rectifier’s web site: http//www.irf.com/
†† Exceptions to AEC-Q101 requirements are noted in the qualification report.
††† Highest passing voltage
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3
AUIRLR/U3114Z
1000
1000
100
BOTTOM
VGS
15V
10V
8.0V
4.5V
3.5V
3.0V
2.7V
2.5V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
100
10
1
2.5V
10
2.5V
≤60μs PULSE WIDTH
≤60μs PULSE WIDTH
Tj = 175°C
Tj = 25°C
0.1
0.1
BOTTOM
1
1
10
100
0.1
V DS, Drain-to-Source Voltage (V)
10
100
Fig 2. Typical Output Characteristics
1000
200
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current (A)
1
V DS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
100
T J = 175°C
T J = 25°C
10
1
VDS = 15V
≤60μs PULSE WIDTH
0.1
T J = 25°C
150
100
T J = 175°C
50
V DS = 10V
380μs PULSE WIDTH
0
1
2
3
4
5
6
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
4
VGS
15V
10V
8.0V
4.5V
3.5V
3.0V
2.7V
2.5V
7
0
20
40
60
80
100
ID,Drain-to-Source Current (A)
Fig 4. Typical Forward Transconductance
vs. Drain Current
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AUIRLR/U3114Z
100000
6.0
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
ID= 42A
10000
Ciss
Coss
1000
5.0
VGS, Gate-to-Source Voltage (V)
C, Capacitance (pF)
C oss = C ds + C gd
Crss
VDS= 32V
VDS= 20V
VDS= 8.0V
4.0
3.0
2.0
1.0
0.0
100
1
10
0
100
30
40
50
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
1000
10000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
20
QG, Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
T J = 175°C
100
T J = 25°C
10
OPERATION IN THIS AREA
LIMITED BY R DS(on)
1000
100μsec
100
1msec
10msec
10
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
1.0
DC
1
0.0
0.5
1.0
1.5
2.0
2.5
VSD, Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
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10
3.0
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
5
AUIRLR/U3114Z
2.0
ID, Drain Current (A)
120
RDS(on) , Drain-to-Source On Resistance
(Normalized)
140
Limited By Package
100
80
60
40
20
ID = 42A
VGS = 10V
1.5
1.0
0.5
0
25
50
75
100
125
150
-60 -40 -20 0 20 40 60 80 100120140160180
175
T J , Junction Temperature (°C)
T C , Case Temperature (°C)
Fig 10. Normalized On-Resistance
vs. Temperature
Fig 9. Maximum Drain Current vs.
Case Temperature
Thermal Response ( Z thJC ) °C/W
10
1
D = 0.50
0.20
0.10
0.05
0.1
τJ
0.02
0.01
0.01
R1
R1
τJ
τ1
R2
R2
R3
R3
τC
τ
τ1
τ2
τ2
τ3
Ci= τi/Ri
Ci i/Ri
1E-005
τ3
τ4
τ4
τi (sec)
0.0350
0.000013
0.2433
0.000077
0.4851
0.001043
0.2867
0.004658
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
Ri (°C/W)
R4
R4
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
6
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AUIRLR/U3114Z
15V
D.U.T
RG
VGS
20V
DRIVER
L
VDS
+
V
- DD
IAS
A
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
EAS , Single Pulse Avalanche Energy (mJ)
600
ID
9.7A
17A
BOTTOM 42A
TOP
500
400
300
200
100
0
25
V(BR)DSS
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
tp
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
VGS(th) , Gate threshold Voltage (V)
3.0
QG
10 V
QGS
QGD
VG
Charge
Fig 13a. Basic Gate Charge Waveform
2.5
2.0
ID = 150μA
1.5
ID = 250μA
ID = 1.0mA
1.0
ID = 1.0A
0.5
-75 -50 -25 0
25 50 75 100 125 150 175 200
T J , Temperature ( °C )
L
DUT
0
VCC
Fig 14. Threshold Voltage vs. Temperature
1K
Fig 13b. Gate Charge Test Circuit
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7
AUIRLR/U3114Z
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Δ Tj = 150°C and
Tstart =25°C (Single Pulse)
100
0.01
0.05
0.10
10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
EAR , Avalanche Energy (mJ)
150
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 42A
100
50
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
vs. Temperature
8
175
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long as
neither Tjmax nor Iav (max) is exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
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AUIRLR/U3114Z
D.U.T
Driver Gate Drive
ƒ
+
‚
-
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
V DD
• dv/dt controlled by R G
• Driver same type as D.U.T.
• I SD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
„
-
D=
Period
P.W.
+
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
-
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V DS
V GS
RD
D.U.T.
RG
+
-V DD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
VDS
90%
10%
VGS
td(on)
tr
t d(off)
tf
Fig 18b. Switching Time Waveforms
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9
AUIRLR/U3114Z
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
Part Number
AULR3114Z
YWWA
IR Logo
XX
or
Date Code
Y= Year
WW= Work Week
A= Automotive, Lead Free
XX
Lot Code
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10
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AUIRLR/U3114Z
I-Pak (TO-251AA) Package Outline
( Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
Part Number
AULU3114Z
YWWA
IR Logo
XX
or
Date Code
Y= Year
WW= Work Week
A= Automotive, Lead Free
XX
Lot Code
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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11
AUIRLR/U3114Z
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
12
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AUIRLR/U3114Z
Ordering Information
Base part
Package Type
AUIRLR3114Z
DPak
AUIRLU3114Z
IPak
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Standard Pack
Form
Tube
Tape and Reel
Tape and Reel Left
Tape and Reel Right
Tube
Complete Part Number
Quantity
75
2000
3000
3000
75
AUIRLR3114Z
AUIRLR3114ZTR
AUIRLR3114ZTRL
AUIRLR3114ZTRR
AUIRLU3114Z
13
AUIRLR/U3114Z
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the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services
at any time and to discontinue any product or services without notice. Part numbers designated with the “AU” prefix follow
automotive industry and / or customer specific requirements with regards to product discontinuance and process change
notification. All products are sold subject to IR’s terms and conditions of sale supplied at the time of order acknowledgment.
IR warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with IR’s
standard warranty. Testing and other quality control techniques are used to the extent IR deems necessary to support this
warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily
performed.
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