ATMEL ATA5283 Interface ic for 125 khz wake-up function Datasheet

Features
•
•
•
•
•
•
•
•
Wake-up Function for a Microcontroller with Preamble Detection
1 mVrms Sensitivity
1 µA Standby Current
Power Supply: 2 V to 3.8 V
Baud Rate: up to 4 kbps (ASK Modulation)
Operation Temperature: up to 125°C
Withstands +175°C
Few External Components
Application
• Tire Pressure Monitoring (TPM)
Description
The ATA5283 is a 125 kHz ultra-low power receiver used for the wake-up function of
Tire Pressure Monitoring (TPM) application. The sensitive input stage of the IC amplifies and demodulates the carrier signal from the antenna coil to a digital output signal
for a microcontroller. During the standby mode the preamble detection unit monitors
the incoming signal and activates the wake-up output and the data output, if the IC
receives a proper 125 kHz carrier signal.
By combining the IC with an antenna coil, a microcontroller, an RF transmitter/transceiver, a battery, temperature- and pressure sensor, it is possible to design a
complete Tire Pressure Monitoring system (TPM).
Interface IC for
125 kHz
Wake-up
Function
ATA5283
Preliminary
Figure 1. Block Diagram
Battery
VDD
ATA5283
Amplifier
with AGC
Lx
COIL
RESET
N_WAKEUP
Vref
Preamble
check
Conditioner
N_DATA
TST1
TST2
GND
Rev. 4598D–AUTO–03/04
Pin Configuration
Figure 2. Pinning TSSOP8L
COIL
TST1
TST2
VSS
1
2
3
4
8
7
6
5
VDD
N_WAKEUP
N_DATA
RESET
Pin Description
2
Pin
Symbol
Function
1
COIL
Antenna coil input
2
TST1
Test pin (reserved)
3
TST2
Test pin (reserved)
4
VSS
Signal ground
5
RESET
External reset input
6
N_DATA
Data signal
7
N_WAKEUP
8
VDD
Low active wake-up signal for microcontroller
Battery voltage
ATA5283 [Preliminary]
4598D–AUTO–03/04
ATA5283 [Preliminary]
Functional
Description
The ATA5283 is an ultra-low power ASK receiver. Without a carrier signal it operates in
the standby listen mode. In this mode it monitors the coil input with a very low current
consumption. To activate the IC and the connected control unit, the transmitting stage
must send the preamble carrier burst. After a preamble is detected the IC is activated. It
adapts the gain of the input stage and enables the wake-up and the data output. The
first gap at the end of the preamble generates a wake-up signal for the microcontroller.
After that the receiver outputs the data signal at N_DATA. To return the IC into the
standby listen mode it must be reset via the RESET input.
AGC Amplifier
The input stage contains an Automatic Gain Control (AGC) amplifier to amplify the input
signal from the coil. The gain is adjusted by the automatic gain control circuit if a preamble signal is detected. The high dynamic range of the AGC enables the IC to operate
with input signals from 1 mVrms to 1.1 Vrms. After the AGC settling time the amplifier output delivers a 125 kHz signal with an amplitude adjusted for the following evaluation
circuits’ preamble detection, signal conditioner, wake-up.
Preamble Detection
Before data transmission the IC stays in standby listen mode. To prevent the circuit from
unintended operations in a noisy environment the preamble detection circuit checks the
input signal. A valid signal is detected by a counter after 192 carrier periods without
interrupts. Short interrupts which are suppressed by the signal conditioner are tolerated.
When a valid carrier (preamble) is found the circuit starts the automatic gain control. It
requires up to 512 carrier periods to settling. The complete preamble should have 704
carrier periods minimum. The preamble is terminated and the data transfer is started
with the first gap (Start Gap) in the carrier (see Figure 3).
Figure 3. Communication Protocol
Preamble
>5.64 ms
Procedure
192 Periods
of LF
Start
gap
Data
>512 Periods
of LF
Signal
N_DATA
N_WAKEUP
RESET
Gain
control
No gain
control
Current
profile
1 µA
AGC
adjustment
Gain control
active
No Gain Control
2 µA
0.5 µA
3
4598D–AUTO–03/04
Automatic Gain Control
For a correct demodulation the signal conditioner needs appropriate internal signal
amplitude. To control the input signal the ATA5283 has a build in digital AGC. The gain
control circuit regulates the internal signal amplitude to the reference value (Ref2, Figure 4). It decreases the gain by one step if the internal signal exceeds the reference
level for two periods and it increases the gain by one step if eight periods do not achieve
the reference level. In the standby listen mode the gain is reset to the maximum value. If
a valid preamble signal (192 valid carrier clocks) is detected the automatic gain control
is activated.
Note:
With the variation of the gain the coil input impedance changes from high impedance to
minimal 143 kΩ because of the internal regulator circuit (see Figure 10).
Figure 4. Automatic Gain Control
Transmitted
signal
Coil
input
Gain control
reference
Ref.2
100%
Gain controlled
signal
50%
Gap detection Ref.1
reference
Internal comparator
singal
N_DATA
4
ATA5283 [Preliminary]
4598D–AUTO–03/04
ATA5283 [Preliminary]
Signal Conditioner
The signal conditioner demodulates the amplifier output signal and converts it to a
binary signal. It compares the carrier signal with the 50% reference level (see Ref1 in
Figure 5) and delivers a logical 1, if the carrier signal stays below the reference and a
logical 0, if it exceeds the reference level. A smoothing filter suppress the space
between the half-waves as well as a few missing periods in the carrier and glitches during the gaps.
The output signal of the signal conditioner is used as the internal data signal for the data
output, the wake-up logic and the preamble detection.
The timing of the demodulated data signal is delayed related to the signal at the transmitting end. This delay is a function of the carrier frequency, the behavior of the
smoothing filter and the antenna Q-factor. The smoothing filter causes a delay of 3 to
6 periods (see tb and td in Figure 5). The rest of the delay is caused by the build-up time
of the antenna signal and is conditioned on the Q-factor (see ta and tc in Figure 5).
Figure 5. Output Timing
Ref.2
100%
Ref.1
50%
Coil
input
Comparator
output
N_DATA
ta tb
tON
tc
td
tOFF
5
4598D–AUTO–03/04
The following diagrams show the delay of the data signal as a function of the antenna
Q-factor.
Figure 6. Turn On Delay Time (tON) versus Antenna Q-Factor
250
ffield = 125 kHz
200
Typ.
ton (µs)
Max.
150
100
Min.
50
0
0
10
20
30
40
50
Q-factor
Figure 7. Turn Off Delay Time (toff) versus Antenna Q-Factor
200
180
ffield = 125 kHz
160
140
Typ.
Max.
toff (µs)
120
100
80
60
Min.
40
20
0
0
10
20
30
40
50
Q-factor
Data Output
The data output N_DATA outputs the demodulated and digitized LF signal according to
the envelope of the antenna input signal. In the standby mode the N_DATA output is
disabled and set to level 1. It is enabled by the wake-up signal and it outputs 1 level if
the IC detects the carrier signal and a 0 level during the gaps (see Figure 3).
As the circuit does not check the received data (except the preamble), it is up to the user
to choose the kind of encoding (pulse distance, Manchester, bi-phase...) wanted.
Wake-up Signal
The wake-up signal (N_WAKEUP) indicates that the ATA5283 has detected the end of a
preamble signal and has left the standby mode. It can be used as a wake-up or a chip
select signal for an external device (see Figure 3).
After a preamble is detected the first valid gap (Start Gap) sets the N_WAKEUP output
to low and enables the data output N_DATA. The N_WAKEUP holds the low level until
the IC is reset to the standby mode by a reset signal.
6
ATA5283 [Preliminary]
4598D–AUTO–03/04
ATA5283 [Preliminary]
Reset
The IC is reset either by the internal POR circuit during a power on sequence or by a
high pulse at the RESET pin. After the reset all internal counters are in the initial state
and the IC is in the standby listen mode.
The POR circuit generates a reset while the supply voltage VDD is below the power on
reset threshold VPOR and release the function of the IC if VDD exceeds this threshold.
A high signal at the RESET pin resets the complete circuit. If the IC is activated a reset
signal is necessary to activate the standby listen mode.
The RESET pin can also be used to hold the IC in a power down state. In this state the
the IC is out of operation and the current consumption is below the standby current.
Note:
Standby Listen Mode
The RESET pin is high impedance CMOS input. To avoid floating effects like undefined
input states and malfunctions it should not be open.
In the standby listen mode the IC monitors the coil input with a very low current consumption. The automatic gain control is switched off and the gain is set to the maximum
value. The N_DATA and the N_WAKEUP output are set to a high level.
Before the controller enters its standby mode after the communication, it should activate
the standby listen mode of the ATA5283 with a reset signal. This measure ensures that
the IC enters the power saving standby mode and that the IC wakes the controller correctly with the next preamble signal.
Applications
Figure 8 shows a typical TPM application of the ATA5283. Combined with the antenna
resonant circuit the ATA5283 is used as wake-up receiver for the microcontroller and
the connected temperature- and pressure-sensor.
To avoid supply voltage ripples to affect the microcontroller, an RC filter (R1 = 100 Ω,
C1 = 10 nF) is recommended.
Note:
Figure 8. Application
R1
C1
125 kHz
Central
Board
Controller
8
Amplifier
with
AGC
Antenna
Driver
ATA5275
1
LA CA
∫
ATA5283
5
RESET
7
N_WAKEUP
N_DATA
Temp.
Sensor
Micro
controller
Pressure
Sensor
6
Vref
2
4
3
UHF - Rx
T5743
433 MHz
UHF - Tx
ATAR862
7
4598D–AUTO–03/04
Figure 9. Pin Connection and Pin Protection
ATA5283
1
COIL_X
8
VDD
Divider impedance
143 kΩ ... 5 MΩ
VDD
VDD
2
TST1
7
N_WAKEUP
6
N_DATA
5
RESET
2k
VDD
VDD
VDD
3
TST2
2k
VDD
VSS
4
1k
Figure 10. Coil Input Impedance
10000
max.
typ.
Z (k Ω )
min.
1000
100
1
10
100
1000
10000
Coil Input Signal (mV PP )
8
ATA5283 [Preliminary]
4598D–AUTO–03/04
ATA5283 [Preliminary]
Absolute Maximum Ratings
Parameters
Symbol
Value
Unit
Power supply
VDD
-0.3 to +6.5
V
Input voltage (except coil inputs)
VIN
VSS-0.3 < VIN < VDD + 0.3
V
Input current coil
ICI
±10
mA
Input voltage coil
VCI
VDD-3.5 < VCI < VDD + 3.5
V
VESD
4
kV
Operating temperature range
Tamb
-40 to +125
°C
Withstanding 175°C
tTEMP
30
min.
Storage temperature range
Tstg
-40 to +150
°C
Soldering temperature
Tsld
260
°C
Symbol
Value
Unit
RthJA
210
K/W
Symbol
Value
Unit
Power supply range
VDD
2 to 3.8
V
Operating temperature range
TOP
-40 to -125
°C
ESD protection (human body)
Thermal Resistance
Parameters
Thermal resistance junction ambient
Operating Range
Parameters
Electrical Characteristics
VSS = 0 V, VDD = 2 V to 3.8 V, Tamb = -40° C to +105°C, characterized up to 125°C, unless other specified
No.
1
1.1
1.2
1.3
Parameters
Test Conditions
Pin
Symbol
Min.
Typ.
Max.
Unit
Type*
8
VDD
2
3.2
3.8
V
A
Reset supply current -40
0.8
µA
A
Reset supply current +25
0.8
µA
A
0.8
µA
C
Reset supply current +105
1.0
µA
A
Reset supply current +125
1.5
µA
C
Supply current
(standby listen mode) -40
1.4
µA
A
Supply current
(standby listen mode) +25
1.5
µA
A
1.6
µA
C
Supply current
(standby listen mode) +105
1.6
µA
A
Supply current
(standby listen mode) +125
1.7
µA
C
Power Supply and Coil Limiter
Power supply
Reset supply current +85
Supply current
(standby listen mode) +85
1, 2,
3, 8
1, 2,
3, 8
IDDR
IDDL
0.4
1.1
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
9
4598D–AUTO–03/04
Electrical Characteristics (Continued)
VSS = 0 V, VDD = 2 V to 3.8 V, Tamb = -40° C to +105°C, characterized up to 125°C, unless other specified
No.
1.4
1.5
Parameters
Test Conditions
Max.
Unit
Type*
Supply current with carrier
(AGC active) -40
4.0
µA
A
Supply current with carrier
(AGC active) +25
4.1
µA
A
4.2
µA
C
Supply current with carrier
(AGC active) +105
4.2
µA
A
Supply current with carrier
(AGC active) +125
4.2
µA
C
±1.4
Vp
A
±1.6
Vp
A
±1.8
Vp
A
Supply current with carrier
(AGC active) +85
Coil input voltage referred to
VDD (Input coil limiter for
channels X, Y, Z)
Pin
1,2,
3, 8
Symbol
Min.
IDD
2
ICI = ± 1 mA
VDD = 2 V
ICI = ± 1 mA
VDD = 3.2 V
1-3
VC
ICI = ± 1 mA
VDD = 3.8 V
2
Typ.
Amplifiers
2.1
Wake-up sensitivity
125 kHz input signal
7
VSENS
1
mVrms
A
2.2
Bandwidth
Without coil
6
BW
150
kHz
C
2.3
Upper corner frequency
Without coil
6
fu
180
kHz
C
2.4
Lower corner frequency
Without coil
6
fo
30
kHz
C
2.5
Input impedance
f = 125 kHz
1
RIN
kΩ
A
Input capacitance
VIN ≥ 1 mVrms at
125 kHz
1
CIN
10
pF
C
tDAGC
192
Periods
B
tAGC
tAGC
tAGC
tAGC
tAGC
0
48
220
292
450
Periods
C
2.6
3
Automatic Gain Control
3.1
Preamble detection time
VIN ≥ 3 mVrms at
125 kHz
2.2
143
f = 125 kHz
3.2
3.3
3.4
AGC adjustment time
Signal change rate
(gap detection)
AGC correction time
(no gap detection)
VIN = 1 mVrms
VIN = 3 mVrms
VIN = 30 mVrms
VIN = 100 mVrms
VIN = 1 Vrms
512
Coil input signal
100% to 37% (τ )
1
tEOS
20
Periods
C
Coil input signal:
50 to 100% changing
1
tCORR
52
Periods
C
Coil input signal:
100 to 50% changing
1
tCORR
208
Periods
C
3.5
Data rate (Q < 20)
125 kHz ASK
DR
4
kbits/s
A
3.6
Delay time RF signal to data
125 kHz ASK
tON
40
µs
A
3.7
Delay time RF signal to data
125 kHz ASK
tOFF
40
µs
A
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
10
ATA5283 [Preliminary]
4598D–AUTO–03/04
ATA5283 [Preliminary]
Electrical Characteristics (Continued)
VSS = 0 V, VDD = 2 V to 3.8 V, Tamb = -40° C to +105°C, characterized up to 125°C, unless other specified
No.
4
4.1
4.1.1
Parameters
Test Conditions
Pin
Symbol
Min.
5
VHRESET
0.8 ×
VDD
5
tRESET
20
5
VLRESET
0
Typ.
Max.
Unit
Type*
VDD
V
A
µs
A
0.2 ×
VDD
V
C
Interface
Reset input level high
Reset pulse width
VRESET = VDD
4.2
Reset input level low
4.3
Reset input leakage current
low
VRESET = VSS
5
IIL
-0.2
0
µA
A
4.4
Reset input leakage current
high
VRESET = VDD
5
IIH
0
0.2
µA
A
4.5
N_WAKEUP output level
high
INWAKEUP = -100 µA
7
VHNWAKE
0.8 ×
VDD
VDD
V
A
4.6
N_WAKEUP output level low
INWAKEUP = 100 µA
7
VLNWAKE
0
0.2 ×
VDD
V
A
4.7
N_DATA output level high
IN_DATA = -100 µA
6
VHNDATA
0.8 ×
VDD
VDD
V
A
4.8
N_DATA output level low
IN_DATA = 100 µA
6
VLNDATA
0
0.2 ×
VDD
V
A
VPOR
1
1.9
V
A
100
ms
C
200
µs
C
5
Power Supply and Reset
5.1
VDD power on reset
threshold
5.2
Power-up time
Switch on VDD to
circuit active
5.3
RESET reactivation caused
by negative spikes on VDD
tBDN = 500 ns
tPON
7
tRST
10
1.5
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
11
4598D–AUTO–03/04
Ordering Information
Extended Type Number
Package
Remarks
ATA5283P-6AQ
TSSOP8L
Taped and reeled
ATA5283P-6AP
TSSOP8L
Taped and reeled
Package Information
12
ATA5283 [Preliminary]
4598D–AUTO–03/04
ATA5283 [Preliminary]
Revision History
Please note that the following page numbers referred to in this section refer to the
specific revision mentioned, not to this document.
Changes from Rev.
4598C - 08/03 to Rev.
4598D - 03/04
1. Electrical Characteristics table: some values changed
2. Ordering Information changed
13
4598D–AUTO–03/04
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4598D–AUTO–03/04
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