Analogic AAT3244 300ma adjustable dual cmos low voltage ldo linear regulator Datasheet

AAT3244
300mA Adjustable Dual CMOS
Low Voltage LDO Linear Regulator
General Description
Features
The AAT3244 is a dual, low input voltage, low
dropout (LDO) linear regulator with two Power OK
(POK) outputs. Two integrated regulators provide
high power outputs of 300mA from an input voltage
range of 1.8V to 5.5V.
•
•
•
Two POK pins provide open drain signals when
their respective regulator is within regulation. The
AAT3244 has independent voltage inputs and
enable pins for increased design flexibility. The
device features a very low quiescent current (typically 85µA) and low dropout voltages (200mV at
full load), making it ideal for portable applications
where battery life is critical.
•
•
•
•
•
•
•
PowerLinear™
Low Input Voltage
— 1.8V to 5.5V
Ultra-Low Adjustable Output Voltage
— 3.6V to 0.6V
High Output Current
— 300mA per LDO
Low Dropout Voltage
— Typ 200mV @ 300mA
Low 85µA Quiescent Current (Both LDOs On)
High Output Accuracy: ±1.5%
Independent Input Supply and Enable Pins
Over-Temperature Protection
12-Pin TSOPJW Package
-40°C to +85°C Temperature Range
The AAT3244 is available in a space-saving, Pb-free
12-pin TSOPJW package and is capable of operation over the -40°C to +85°C temperature range.
Applications
•
•
•
•
•
Cellular Phones
Digital Cameras
Handheld Instruments
Microprocessor/DSP Core/IO Power
PDAs and Handheld Computers
Typical Application
VIN = 3.6V
V OUTA = 1.8V
VCC
INA
OUTA
100kΩ
Enable A
ENA
INB
59kΩ
POKA
POKA
OUTB
CIN
1μF
100kΩ
POKB
Enable B
118kΩ
FBA
267kΩ
GND
2.2μF
POKB
FBB
ENB
VOUTB = 3.3V
2.2μF
59kΩ
GND
3244.2007.08.1.1
1
AAT3244
300mA Adjustable Dual CMOS
Low Voltage LDO Linear Regulator
Pin Descriptions
Pin #
Symbol
1
OUTA
2
3
INA
FBA
4
FBB
5
6
INB
OUTB
7
POKB
8
9
10
11
12
ENB
VCC
GND
ENA
POKA
Function
300mA regulator output pin; should be closely decoupled with a low equivalent series
resistance (ESR) ceramic capacitor.
Input voltage pin for LDOA; should be closely decoupled.
Feedback input pin for LDOA. This pin is connected to OUTA. It is used to see the output
of LDOA to regulate to the desired value via an external resistor divider.
Feedback input pin for LDOB. This pin is connected to OUTB. It is used to see the output
of LDOB to regulate to the desired value via an external resistor divider.
Input voltage pin for LDOB; should be closely decoupled.
300mA regulator output pin; should be closely decoupled with a low ESR ceramic
capacitor.
Power OK pin with open drain output. It is pulled low when the OUTB pin is outside the
regulation window of ±10%. Place a pull-up resistor between POKB and OUTB.
Enable pin for LDOB. Active high. VEN must be less than or equal to VCC.
Input bias supply. Connect to an "always ON" supply voltage between 2.7V and 5.5V.
Ground connection pin.
Enable pin for LDOA. Active high. VEN must be less than or equal to VCC.
Power OK pin with open drain output. It is pulled low when the OUTA pin is outside the
regulation window of ±10%. Place a pull-up resistor between POKA and OUTA.
Pin Configuration
TSOPJW-12
(Top View)
OUTA
INA
FBA
FBB
INB
OUTB
2
1
12
2
11
3
10
4
9
5
8
6
7
POKA
ENA
GND
VCC
ENB
POKB
3244.2007.08.1.1
AAT3244
300mA Adjustable Dual CMOS
Low Voltage LDO Linear Regulator
Absolute Maximum Ratings1
Symbol
Description
VCC, VIN
VFB
VEN
TJ
Input Voltage, LDO Input Voltage to GND
FB to GND
EN to GND
Operating Junction Temperature Range
Maximum Soldering Temperature (at leads,
10 sec)
TLEAD
Value
Units
6.0
-0.3 to VIN + 0.3
-0.3 to 6.0
-40 to 150
V
V
V
°C
300
°C
Thermal Information
Symbol
PD
θJA
Description
Maximum Power Dissipation (TA = 25°C)
Thermal Resistance2
Value
Units
625
160
mW
°C/W
1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum Rating should be applied at any one time.
2. Mounted on an FR4 board.
3244.2007.08.1.1
3
AAT3244
300mA Adjustable Dual CMOS
Low Voltage LDO Linear Regulator
Electrical Characteristics1
VCC = VINA = VINB = 3.6V; TA = -40°C to +85°C, unless otherwise noted. Typical values are TA = 25°C.
Symbol
Bias Power
VCC
IQ
ISHDN
UVLO
Description
Supply
Bias Power Supply Input
Quiescent Current
Shutdown Current
Under-Voltage Lockout Voltage
Conditions
Min
2.7
VENA = VENB = VIN; ILOAD = 0
VENA = VENB = GND
VCC Rising
Hysteresis
LDOA, LDOB; IOUT = 300mA
VIN
Input Voltage
VOUT
VFB
VDO
ΔVOUT/
VOUT /ΔVIN
VEN(L)
VEN(H)
tEN
VPOK
VPOKHYS
VPOK(LO)
IPOK
IOUT
ISD
TSD
THYS
Output Voltage Tolerance
IOUT = 1mA
to 300mA
TA = 25°C
TA = -40°C to +85°C
Feedback Voltage
Dropout Voltage2
IOUT = 300mA
Line Regulation3
VIN = VOUT + 1.0V to 5.0V
Enable Threshold Low
Enable Threshold High
Turn-On Enable Time
Power OK Trip Threshold
Power OK Hysteresis
Power OK Output Voltage Low
POK Output Leakage Current
Output Current
Shutdown Current
Over-Temperature Shutdown
Threshold
Over-Temperature Shutdown
Hysteresis
Typ
85
Max
Units
5.5
160
1.0
2.6
V
µA
µA
V
mV
5.5
2.0
3.5
0.606
300
V
V
mV
0.09
%/V
0.6
VCC
V
V
µs
% of VOUT
% of VOUT
V
µA
mA
µA
200
1.8
-2.0
-3.5
0.594
0.6
200
1.5
100
VOUT Rising, TA = 25°C
80
98
1.0
ISINK = 1mA
VPOK < 5.5V, VOUT in Regulation
VIN(MIN) = 2.5V
VIN = 5V
0.4
1.0
300
1.0
%
140
°C
15
°C
1. The AAT3244 is guaranteed to meet performance specifications over the -40°C to +85°C operating temperature range and is assured
by design, characterization, and correlation with statistical process controls.
2. VDO is defined as VIN - VOUT when VOUT is 98% of nominal.
3. CIN = 10µF.
4. To calculate minimum input voltage, use the following equation: VIN(MIN) = VOUT(MAX) + VDO(MAX) as long as VIN ≥ 1.8V.
4
3244.2007.08.1.1
AAT3244
300mA Adjustable Dual CMOS
Low Voltage LDO Linear Regulator
Typical Characteristics
Output Voltage vs. Input Voltage
Dropout Voltage vs. Temperature
(VOUT = 2.5V)
220
2.60
200
2.55
Output Voltage (V)
Dropout Voltage (mV)
(VOUT = 2.5V; IOUT = 300mA)
180
160
140
120
100
80
60
-40
-15
10
35
60
100mA
2.45
2.40
2.35
150mA
300mA
250mA
200mA
2.30
2.25
2.20
2.5
85
50mA
2.50
2.6
2.7
Dropout Voltage vs. Output Current
(VOUT = 2.5V)
120
160
Quiescent Current (µA)
Dropout Voltage (mV)
180
85°C
140
120
25°C
100
80
60
40
-40°C
20
0
50
100
150
200
250
110
85°C
100
80
70
60
-40°C
50
40
300
2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
Input Voltage (V)
Quiescent Current vs. Temperature
Output Voltage vs. Temperature
(VOUT = 2.5V)
(VIN = 3.6V; VOUT = 2.5V)
2.60
VIN = 3.0V
2.58
Output Voltage (V)
Quiescent Current (µA)
88
86
VIN = 3.6V
84
VIN = 4.2V
80
78
76
74
-40
-15
10
35
Temperature (°C)
3244.2007.08.1.1
25°C
90
Output Current (mA)
72
3.0
Quiescent Current vs. Input Voltage
(VOUT = 2.5V)
82
2.9
Input Voltage (V)
Temperature (°C)
0
2.8
60
85
2.56
2.54
100mA
200mA
50mA
2.52
300mA
2.50
2.48
2.46
2.44
2.42
-40
-15
10
35
60
85
Temperature (°C)
5
AAT3244
300mA Adjustable Dual CMOS
Low Voltage LDO Linear Regulator
Typical Characteristics
Turn-On Time
Load Regulation
(VOUT = 2.5)
3.0
4
2.5
2
2.0
0
1.5
1.0
0.5
0.0
2.00
Output Voltage Error (%)
6
Output Voltage (bottom) (V)
Enable (top) (V)
(VOUT = 1.8V)
1.50
1.00
-2.00
1
10
100
1000
Load Transient
(1mA–200mA; VOUT = 1.8V)
0.1
50
25
0
-25
-50
Output Current (top) (A)
0.2
0.3
0.2
0.1
150
0.0
100
50
0
-50
-100
Output Voltage (AC coupled)
(bottom) (mV)
0.3
Output Voltage (AC coupled)
(bottom) (mV)
Output Current (top) (A)
0
Output Current (mA)
0.4
Time (50µs/div)
Time (50µs/div)
Line Transient
Over-Current Protection
(3.6V– 4.2V; VOUT = 1.8V)
3.5
3.0
2.5
100
2.0
50
1.5
0
1.0
-50
0.5
-100
3.5
3.0
2.5
Current (A)
4.0
Output Voltage (AC coupled)
(bottom) (mV)
4.5
Input Voltage (top) (V)
VIN = 4.2V
-1.50
Load Transient
6
VIN = 3.6V
-1.00
(200mA–300mA; VOUT = 1.8V)
Time (50µs/div)
VIN = 3.0V
0.00
-0.50
Time (50µs/div)
0.0
VIN = 2.7V
0.50
2.0
1.5
1.0
0.5
0.0
Time (50ms/div)
3244.2007.08.1.1
AAT3244
300mA Adjustable Dual CMOS
Low Voltage LDO Linear Regulator
Typical Characteristics
POK Output Response
Enable Threshold Voltage vs. Input Voltage
1.4
Enable Voltage (V)
VIN
(2V/div)
VOUT
(1V/div)
VPOK
(2V/div)
1.3
1.2
1.1
VIH
1.0
0.9
0.8
0.7
VIL
0.6
2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
Time (200µs/div)
Input Voltage (V)
Ground Current vs. Input Voltage
Ground Current (µA)
130
120
110
100
IOUT = 300mA
IOUT = 100mA
90
80
IOUT = 50mA
IOUT = 10mA
70
60
2.5
3
3.5
4
4.5
5
5.5
Input Voltage (V)
3244.2007.08.1.1
7
AAT3244
300mA Adjustable Dual CMOS
Low Voltage LDO Linear Regulator
Functional Block Diagram
OUTA
INA
ENA
FBA
POKA
94%
VCC
LDO
Bias
Voltage
Reference
Over-Temperature
Protection
POKB
FBB
ENB
INB
OUTB
GND
Functional Description
The AAT3244 is a high performance, low input voltage, dual LDO linear regulator. Both LDOA and
LDOB are capable of delivering 300mA of current,
within power dissipation limits. The LDOs are
designed to operate with low-cost ceramic capacitors. For added flexibility, both regulators have
independent input voltages operating from 1.8V to
5.5V, but share a common bias voltage, VCC. The
VCC voltage should be tied to the highest system
voltage available and should be available at all
times. Each regulator has an independent enable
8
pin. An external feedback pin for each LDO allows
programming the output voltage from 3.6V to 0.6V.
The regulators have thermal protection in case of
adverse operating conditions.
A power OK comparator for each output is also
integrated, which indicates when the output is within regulation. The POK is an open drain output and
is held low when the AAT3244 is in shutdown
mode.
Refer to the Thermal Considerations section of this
datasheet for details on device operation at maximum output current loads.
3244.2007.08.1.1
AAT3244
300mA Adjustable Dual CMOS
Low Voltage LDO Linear Regulator
Applications Information
To assure the maximum possible performance is
obtained from the AAT3244, please refer to the following application recommendations.
Input Capacitor
A 1µF or larger capacitor is typically recommended
for CIN in most applications. A CIN capacitor is not
required for basic LDO regulator operation; however, if the AAT3244 is physically located more than
three centimeters from an input power source, a
CIN capacitor will be needed for stable operation.
CIN should be located as closely to the device supply pin as practically possible. CIN values greater
than 1µF will offer superior input line transient
response and will assist in maximizing the highest
possible power supply ripple rejection.
Ceramic, tantalum, or aluminum electrolytic capacitors may be selected for CIN. There is no specific
capacitor ESR requirement for CIN; however, for
300mA LDO regulator output operation, ceramic
capacitors are recommended for CIN due to their
inherent capability over tantalum capacitors to withstand input current surges from low impedance
sources, such as batteries in portable devices.
cations where output load is less than 10mA, the
minimum value for COUT can be as low as 0.47µF.
Capacitor Characteristics
Ceramic composition capacitors are highly recommended over all other types of capacitors for use
with the AAT3244. Ceramic capacitors offer many
advantages over their tantalum and aluminum electrolytic counterparts. A ceramic capacitor typically
has very low ESR, is lower cost, has a smaller PCB
footprint, and is non-polarized. Line and load transient response of the LDO regulator is improved by
using low ESR ceramic capacitors. Since ceramic
capacitors are non-polarized, they are not prone to
incorrect connection damage.
Equivalent Series Resistance
ESR is a very important characteristic to consider
when selecting a capacitor. ESR is the internal
series resistance associated with a capacitor that
includes lead resistance, internal connections,
size and area, material composition, and ambient
temperature.
Typically, capacitor ESR is measured in milliohms
for ceramic capacitors and can range to more than
several ohms for tantalum or aluminum electrolytic
capacitors.
Output Capacitor
For proper load voltage regulation and operational
stability, a capacitor is required between pins OUT
and GND. The COUT capacitor connection to the
LDO regulator ground pin should be made as
direct as practically possible for maximum device
performance.
The AAT3244 has been specifically designed to function with very low ESR ceramic capacitors. For best
performance, ceramic capacitors are recommended.
Typical output capacitor values for maximum output current conditions range from 1µF to 10µF.
Applications requiring low output noise and optimum power supply ripple rejection should use
2.2µF or greater for COUT. If desired, COUT may be
increased without limit. In low output current appli-
3244.200708.0.66 (ADVANCED INFORMATION)
Ceramic Capacitor Materials
Ceramic capacitors less than 0.1µF are typically
made from NPO or C0G materials. NPO and C0G
materials generally have tight tolerance and are
very stable over temperature. Larger capacitor values are usually composed of X7R, X5R, Z5U, or
Y5V dielectric materials. These two material types
are not recommended for use with LDO regulators
since the capacitor tolerance can vary more than
±50% over the operating temperature range of the
device. A 2.2µF Y5V capacitor could be reduced to
1µF over temperature; this could cause problems
for circuit operation. X7R and X5R dielectrics are
much more desirable. The temperature tolerance
of X7R dielectric is better than ±15%. Capacitor
area is another contributor to ESR. Capacitors
9
AAT3244
300mA Adjustable Dual CMOS
Low Voltage LDO Linear Regulator
which are physically large in size will have a lower
ESR when compared to a smaller sized capacitor
of an equivalent material and capacitance value.
These larger devices can improve circuit transient
response when compared to an equal value capacitor in a smaller package size. Consult capacitor
vendor datasheets carefully when selecting capacitors for LDO regulators.
POK Output
The AAT3244 features integrated Power OK comparators which can be used as an error flag. The
POK open drain output goes low when output voltage is 6% (typical) below its nominal regulation
voltage. Additionally, any time one of the regulators
is in shutdown, the respective POK output is pulled
low. Connect a 100kΩ pull up resistor from POKA
to either INA or OUTA, and POKB to either INB or
OUTB.
Enable Function
The AAT3244 features an LDO regulator enable/ disable function. Each LDO has its own dedicated
enable pin. These pins (ENA, ENB) are active high
and are compatible with CMOS logic. To assure the
LDO regulators will switch on,
1.5V ≤ VEN ≤ VCC
In shutdown, the AAT3244 will consume less than
1.0µA of current. If the enable function is not needed
in a specific application, it may be tied to VCC to
keep the LDO regulator in a continuously on state.
Thermal Protection
The AAT3244 has an internal thermal protection circuit which will activate when the device die temperature exceeds 140°C. The LDO regulator output will
remain in a shutdown state until the internal die
temperature falls back approximately 15°C below
the trip point.
10
No-Load Stability
The AAT3244 is designed to maintain output voltage regulation and stability under operational noload conditions. This is an important characteristic
for applications where the output current may drop
to zero.
Reverse Output-to-Input Voltage
Conditions and Protection
Under normal operating conditions, a parasitic
diode exists between the output and input of the
LDO regulator. The input voltage should always
remain greater than the output load voltage, maintaining a reverse bias on the internal parasitic
diode.
Conditions where VOUT might exceed VIN should be
avoided since this would forward bias the internal
parasitic diode and allow excessive current flow
into the OUTA/B pins, possibly damaging the LDO
regulator. In applications where there is a possibility of VOUT exceeding VIN for brief amounts of time
during normal operation, the use of a larger value
CIN capacitor is highly recommended. A larger
value of CIN with respect to COUT will result in a
slower CIN decay rate during shutdown, thus preventing VOUT from exceeding VIN. In applications
where there is a greater danger of VOUT exceeding
VIN for extended periods of time, it is recommended to place a Schottky diode across INA/B to
OUTA/B (connecting the cathode to INA/B and
anode to OUTA/B). The Schottky diode forward
voltage should be less than 0.45V.
Low Voltage Input Bias Considerations
The input voltage of both LDOs is designed to
operate down to 1.8V input. However, to operate
the LDO to its full potential, the AAT3244 requires
a minimum bias voltage (VCC) of 2.7V for all LDO
input voltages between 1.8V and 2.7V. In portable
systems utilizing single-cell Lithium-ion batteries,
the VCC pin may be connected directly to the battery. In non-portable applications, the voltage can
be connected to any supply from 2.7V to 5.5V. In
the event that one of the input supplies is above
2.7V, this can also be connected to VCC, assuming
that the supply will always be available.
3244.2007.08.1.1
AAT3244
300mA Adjustable Dual CMOS
Low Voltage LDO Linear Regulator
VCC
R6
100K
R5
100K
12
POKA
TSOPJW-12
VCC
OUTA
C1
1uF
ENA
FBA
ENA
22pF
C4
3
2.2uF
INA
11
OUTA
C6
R1
Adj.
POKB
2
(Optional)
1
7
POKB
INA
9
POKA
R2
59K
AAT3244
ON/OFF
OUTB
INB
FBB
1uF
8
ENB
ENB
ON/OFF
OUTB
R3
Adj.
INB
C2
(Optional)
6
5
GND
10
C7
22pF
4
C5
2.2uF
R4
59K
Figure 1: AAT3244 Schematic.
Adjustable Output Resistor Selection
Resistors R1, R2 and R3, R4 of Figure 1 program
the outputs to regulate at a voltage higher than
0.6V. To limit the bias current required for the external feedback resistor string while maintaining good
noise immunity, the suggested value for R2 and R4
is 59kΩ. Decreased resistor values are necessary
to maintain noise immunity on the FB pin, resulting
in increased quiescent current. Table 1 summarizes
the resistor values for various output voltages.
⎛ VOUT ⎞
R1 = V
- 1 · R2
⎝ REF ⎠
With enhanced transient response for extreme
pulsed load application, an external feed-forward
capacitor, (C6 and C7 in Figure 1), can be added.
VOUT (V)
R2 = 59kΩ
R1 (kΩ)
R2 = 221kΩ
R1 (kΩ)
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.8
1.85
2.0
2.5
3.3
3.6
19.6
29.4
39.2
49.9
59.0
68.1
78.7
88.7
118
124
137
187
267
295
75
113
150
187
221
261
301
332
442
464
523
715
1000
1105
Table 1. Adjustable Resistor Values For LDO
Regulator.
3244.2007.08.1.1
11
AAT3244
300mA Adjustable Dual CMOS
Low Voltage LDO Linear Regulator
Thermal Considerations and High
Output Current Applications
The AAT3244 is designed to deliver continuous output load currents of 300mA under normal operating
conditions and can supply up to 600mA during circuit
start-up conditions. This is desirable for applications
where there might be a brief high inrush current during a power-on event. The limiting characteristic for
the maximum output load current safe operating
area is essentially package power dissipation and
the internal preset thermal limit of the device. In
order to obtain high operating currents, careful
device layout and circuit operating conditions need
to be taken into account. The following discussions
will assume the LDO regulator is mounted on a printed circuit board utilizing the minimum recommended
footprint as stated in the layout considerations section of this document. At any given ambient temperature (TA), the maximum package power dissipation
can be determined by the following equation:
PD(MAX) =
TJ(MAX) - TA
θJA
Constants for the AAT3244 are TJ(MAX) (the maximum junction temperature for the device, which is
125°C) and θJA = 160°C/W (the package thermal
resistance). Typically, maximum conditions are calculated at the maximum operating temperature of
TA = 85°C and under normal ambient conditions
where TA = 25°C. Given TA = 85°C, the maximum
package power dissipation is 250mW. At TA =
25°C, the maximum package power dissipation is
625mW. The maximum continuous output current
for the AAT3244 is a function of the package power
dissipation and the input-to-output voltage drop
across the LDO regulator. To determine the maximum output current for a given output voltage, refer
to the following equation. This calculation accounts
for the total power dissipation of the LDO regulator,
including that caused by ground current.
PD(MAX) = [(VIN - VOUTA)IOUTA + (VIN · IGND)] + [(VIN - VOUTB)IOUTB + (VIN · IGND)]
This formula can be solved for IOUTA to determine
the maximum output current for LDOA:
IOUTA(MAX) =
12
PD(MAX) - (2 · VIN · IGND) - (VIN - VOUTB) · IOUTB
VIN - VOUTA
The following is an example for a 2.5V output:
VOUTA = 2.5V
VOUTB = 1.5V
IOUTB = 150mA
VIN = 4.2V
IGND = 125µA
IOUTA(MAX) =
625mW - (2 · 4.2V · 125µA) - (4.2 - 1.5) · 150mA
4.2 - 2.5
IOUTA(MAX) = 129mA
From the discussion above, PD(MAX) was determined to equal 625mW at TA = 25°C.
Therefore, with Regulator B delivering 150mA at
1.5V, Regulator A can sustain a constant 2.5V output at a 129mA load current at an ambient temperature of 25°C. Higher input-to-output voltage differentials can be obtained with the AAT3244, while
maintaining device functions within the thermal
safe operating area. To accomplish this, the device
thermal resistance must be reduced by increasing
the heat sink area or by operating the LDO regulator in a duty-cycled mode.
For example, an application requires VIN = 4.2V
while VOUTA = 1.5V at a 300mA load, VOUTB = 1.5V
at a 200mA load, and TA = 25°C. To maintain this
high input voltage and output current level, the
LDO regulator must be operated in a duty-cycled
mode.
Refer to the following calculation for duty-cycle
operation:
IGND = 125μA
IOUTA = 300mA
IOUTB = 200mA
VIN = 4.2V
VOUT = 1.5V
PD(MAX) is assumed to be 625mW
%DC =
100(PD(MAX))
[(VIN - VOUTA)IOUTA + (VIN · IGND)] + [(VIN - VOUTB)IOUTB + (VIN · IGND)]
%DC =
100 · 625mW
[(4.2V - 1.5V)300mA + (4.2V · 125µA)] + [(4.2V - 1.5V)200mA + (4.2V · 125µA)]
%DC = 46.3%
(ADVANCED INFORMATION) 3244.200708.0.66
AAT3244
300mA Adjustable Dual CMOS
Low Voltage LDO Linear Regulator
For a 300mA output current and a 2.7V drop across
the AAT3244 at an ambient temperature of 25°C,
the maximum on-time duty cycle for the device
would be 46.3%.
Under-Voltage Lockout
Under-voltage lockout (UVLO) guarantees sufficient VCC bias and proper operation of all internal
circuits prior to activation.
Printed Circuit Board Layout
Recommendations
The suggested PCB layout for the AAT3244 in a
TSOPJW-12 package is shown in Figures 2 and 3.
The following guidelines should be used to help
ensure a proper layout.
1. The input capacitors (C1and C2) should connect as closely as possible to input pins (Pin 2
and Pin 5) and GND (Pin 10).
2. The output traces of the feedback resistors (R1
and R3) should be separate from any power
trace and connect as closely as possible to the
load point. Sensing along a high-current load
trace will degrade DC load regulation. Feedback
resistors should be placed as closely as possible
to the FB pin (Pin 3 and Pin 4) to minimize the
length of the high impedance feedback trace.
Figure 2: AAT3244 Evaluation Board
Top Side Layout.
3244.2007.08.1.1
4. The resistance of the trace from the load returns
to GND (Pin 10) should be kept to a minimum.
This will help to minimize any error in DC regulation due to differences in the potential of the
internal signal ground and the power ground.
5. The feedback node is connected directly to the
non-inverting input of the error amplifier, thus
any noise or ripple from the divider resistors
will be subsequently amplified by the gain of
the error amplifier. This effect can increase
noise seen on the LDO regulator output, as
well as reduce the maximum possible power
supply ripple rejection. For low output noise
and highest possible power supply ripple rejection performance, it is critical to connect the
divider resistors (R2 and R4) and output
capacitors (C4 and C5) directly to the LDO regulator ground pin. This method will eliminate
any load noise or ripple current feedback
through the LDO regulator.
Evaluation Board Layout
The AAT3244 evaluation layout follows the recommend printed circuit board layout procedures and
can be used as an example for good application
layouts (See Figures 2 and 3).
Note: Board layout shown is not to scale.
Figure 3: AAT3244 Evaluation Board
Bottom Side Layout.
13
AAT3244
300mA Adjustable Dual CMOS
Low Voltage LDO Linear Regulator
Ordering Information
Voltage
Package
LDO A
LDO B
Marking1
Part Number (Tape and Reel)2
TSOPJW-12
0.6V
0.6V
WTXYY
AAT3244ITP-AA-T1
All AnalogicTech products are offered in Pb-free packaging. The term “Pb-free” means
semiconductor products that are in compliance with current RoHS standards, including
the requirement that lead not exceed 0.1% by weight in homogeneous materials. For more
information, please visit our website at http://www.analogictech.com/pbfree.
Legend
Voltage
Code
Adjustable
(0.6V)
A
1. XYY = assembly and date code.
2. Sample stock is generally held on part numbers listed in BOLD.
14
3244.2007.08.1.1
AAT3244
300mA Adjustable Dual CMOS
Low Voltage LDO Linear Regulator
Package Information
TSOPJW-12
2.85 ± 0.20
2.40 ± 0.10
0.20 + 0.10
- 0.05
0.50 BSC 0.50 BSC 0.50 BSC 0.50 BSC 0.50 BSC
7° NOM
0.055 ± 0.045
0.04 REF
0.15 ± 0.05
+ 0.10
1.00 - 0.065
0.9625 ± 0.0375
3.00 ± 0.10
4° ± 4°
0.45 ± 0.15
0.010
2.75 ± 0.25
All dimensions in millimeters.
© Advanced Analogic Technologies, Inc.
AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work
rights, or other intellectual property rights are implied. AnalogicTech reserves the right to make changes to their products or specifications or to discontinue any product or service without notice. Except as provided in AnalogicTech’s terms and conditions of sale, AnalogicTech assumes no liability whatsoever, and AnalogicTech disclaims any express or implied warranty relating to the sale and/or use of AnalogicTech products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent,
copyright or other intellectual property right. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the
customer to minimize inherent or procedural hazards. Testing and other quality control techniques are utilized to the extent AnalogicTech deems necessary to support this warranty.
Specific testing of all parameters of each device is not necessarily performed. AnalogicTech and the AnalogicTech logo are trademarks of Advanced Analogic Technologies Incorporated.
All other brand and product names appearing in this document are registered trademarks or trademarks of their respective holders.
Advanced Analogic Technologies, Inc.
830 E. Arques Avenue, Sunnyvale, CA 94085
Phone (408) 737-4600
Fax (408) 737-4611
3244.2007.08.1.1
15
Similar pages