Aeroflex ACT15530CI Cmos manchester encoder / decoder Datasheet

ACT15530
CMOS Manchester Encoder / Decoder
Features
• MIL-STD-1553 Compatible
CIRCUIT TECHNOLOGY
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• 1.25 Megabit/sec Maximum Data Rate
• Sync Identification and Lock-in
• Clock Recovery
• Manchester II Encode / Decode
• Separate Encoder and Decoder Sections
• Low Operating Power
• Military Temperature Range -55°C to +125°C
• Monolithic – Single Chip – Construction
Valid Word
Encoder Shift Clock
Take Data
Serial Data Out
Decoder Clock
Bipolar Zero In
Bipolar One In
Unipolar Data In
Decoder Shift Clock
Command/Data Sync
Decoder Reset
VSS
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
VDD
Encoder Clock
Send Clock In
Send Data
Sync Select
Encoder Enable
Serial Data In
Bipolar One Out
Output Inhibit
Bipolar Zero Out
÷ 6 Out
Master Reset
Figure 1: Pin Assignments
(24-Pin DIP/Flat Package – See Figure 18 for LCC Pkg)
• Available in Commercial and Industrial Temperature Ranges
• Several Package and Quality Options (Consult Factory for Details)
• Direct Replacement for the Obsolete Harris HD15530-9/-2/8 and GEC Plessey Marconi
MA15530 / MAS15530 parts
1
General Description
The ACT15530 is a high performance CMOS integrated circuit used to implement MIL-STD-1553 and
similar Manchester II encoded, time division multiplexed, serial data protocols. The device is divided into
two independent sections, encoder and decoder, with a common master reset. The function of the encoder
section is to produce the sync pulse and parity bit, and encode the data bits. The decoder section recognizes
the sync pulse, decodes the data bits and checks for parity.
The ACT15530 is fully guaranteed to support the 1 MHz data rate of MIL-STD-1553 over the full
temperature and supply voltage ranges. The device interfaces with CMOS, TTL or N-Channel support
circuitry and operates from a standard 5 volt supply. The circuit can also be used in many party line digital
data communications applications where high reliability command and control signals are required. Using
Aeroflex transceivers products (4400 Series) the Bit Error Rates (BER) and Word Error Rates (WER) of
MIL-STD-1553 can be achieved (Refer to MIL-STD-1553 Multiplex Applications Handbook
"MIL-HDBK-1553").
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12
13
22
14
Vss
VDD
Master Reset
Send Clock In
Output Inhibit
÷ 6 Out
17
÷2
Character
Former
÷6
23
15
24
16
Bipolar One Out
Bipolar Zero Out
Encoder
Clock
Bit
Counter
21
2
18
Send
Data
19
20
Send
Data In
Encoder
Shift
Clock
Sync
Select
Encoder
Enable
Note: All Pin designations are for 24-Pin DIP & Flatpak
Figure 2: Encoder Block Diagram
Unipolar Data In
Bipolar One In
Bipolar Zero In
8
7
6
3
Character
Identifier
Transition
Finder
10
4
Decoder Clock
Master Reset
5
Bit Rate
Clock
Synchronizer
Parity
Check
1
9
13
Decoder Reset
11
Take Data
Command / Data Sync
Serial Data Out
Valid Word
Decoder Shift Clock
Bit Counter
Note: All Pin designations are for 24-Pin DIP & Flatpak
Figure 3: Decoder Block Diagram
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Pin Designations
Pin
Input
Output
1
✓
2
✓
3
✓
4
✓
Enc
Dec
✓
Function
Comment
Valid word
A 'high' signals the receipt of a valid word
Encoder Shift Clock
Shifts data into the encoder on a 'low' to 'high'
transition
✓
Take Data
'high' during data reception after the sync pulse is
identified
✓
Serial Data Out
NRZ output of received data
✓
5
✓
✓
Decoder clock
Clock for the transition finder and synchronizer which
generates the clock for the rest of the decoder
6
✓
✓
Bipolar Zero In
Should be 'high' when the bus is in a negative state.
Must be tied 'high' when the unipolar input is used
7
✓
✓
Bipolar One In
Should be 'high' when the bus is in a positive state.
Must be tied 'low' when the unipolar input is used
8
✓
✓
Unipolar Data In
Input for unipolar data to the transition finder. Must be
tied 'low' when not used
9
✓
✓
Decoder Shift Clock
Provides the DECODER CLOCK divided by 12,
synchronized by the recovered serial data
10
✓
✓
Command/Data Sync
This output indicates the type of synchronizing
character received as follows: If a data synchronizing
character was received, this pin is low while the data
is decoded. If a command synchronizing character
was received, this pin is high during data decoding
✓
Decoder Reset
A 'high' during a DECODER SHIFT CLOCK rising
edge resets the bit counter
✓
✓
VSS
Ground
✓
✓
Master Reset
A 'high" clears the counters in both sections
11
✓
12
–
13
✓
–
14
✓
✓
÷ 6 Out
Provides the ENCODER CLOCK divided by 6
15
✓
✓
Bipolar Zero Out
Provides an active 'low' output to the zero or negative
sense of a bipolar line driver
✓
Output Inhibit
A 'low' inhibits the BIPOLAR ZERO OUT and
BIPOLAR ONE OUT by forcing them to inactive, 'high',
states
✓
Bipolar One Out
Provides an active 'low' output to the one or positive
sense of a bipolar line driver
16
✓
✓
17
18
✓
✓
Serial Data In
Receives serial data at the rate of the ENCODER
SHIFT CLOCK
19
✓
✓
Encoder Enable
A 'high' starts the encode cycle provided that the
previous cycle is complete
20
✓
✓
Sync Select
A 'high' selects the command sync and a 'low' selects
the data sync
✓
Send Data
Provides an active 'high' to enable the external serial
data source
21
✓
22
✓
✓
Send Clock In
Clock input at 2 times the data rate
23
✓
✓
Encoder Clock
Input to the divide by 6 circuit
24
–
VDD
Positive Supply
–
✓
✓
Figure 4: Pin Designations (24-Pin Dip/FlatPack)
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DC Characteristics and Ratings
Absolute Maximum Ratings
Parameter
Min
Max
Units
3
7
V
Vss - 0.3
VDD + 0.3V
V
Operating Temperature
-55
+125
°C
Storage Temperature
-65
+150
°C
VDD
Input Voltage
Figure 5: Absolute Maximum Ratings
DC Characteristics
Sym
Parameter
Min
Typ
Max
Units
VIH
Logic "1" Input Voltage
70%VDD
-
-
V
VIL
Logic "0" Input Voltage
-
-
30%VDD
V
Test
Conditions
VIHC
Logic "1" Input Voltage (Clock)
VDD - 0.5V
-
-
V
VILC
Logic "0" Input Voltage (Clock)
-
-
VSS + 0.5V
V
+1.0
µA
0V < VIN < VDD
IIL
Input Leakage Current
-1.0
VOH
Logic "1" Output Voltage
2.4
-
-
V
IOH = -3 mA
VOL
Logic "0" Output Voltage
-
-
0.4
V
IOL = 1.8 mA
IDDSB
Standby Supply Current
-
0.5
2.0
mA
Output Open
VIN = VDD =
5.5V
IDDOP
Operating Supply Current
-
8.0
10.0
mA
VDD = 5.5V,
f = 1MHz
Input Capacitance
-
5.0
7.0
pF
Output Capacitance
-
8.0
10.0
pF
CIN
COUT
VDD = 5V ±10%, over full operating temperature range.
Figure 6: DC Characteristics
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AC Characteristics
Sym
fEC
fESC
tECR
tECF
fED
tMR
tE1
tE2
tE3
tE4
tE5
tE6
tE7
tE8
tE9
Parameter
Encoder clock frequency
Send clock frequency
Encoder clock rise time
Encoder clock fall time
Data rate
Master reset pulse width
Shift clock delay
Serial data setup time
Serial data hold time
Enable setup time
Enable pulse width
Sync setup time
Sync pulse width
Send data delay
Bipolar output delay
Min
Limits
Max
Units
0
15
MHz
0
2.5
MHz
-
8
ns
-
8
ns
0
1.25
MHz
150
-
ns
-
125
ns
75
-
ns
75
-
ns
90
-
ns
100
-
ns
55
-
ns
150
-
ns
0
50
ns
-
130
ns
Figure 7: Encoder Electrical
Characteristics
1. VDD = 5V ±10%, over full operating temperature range. 2. CL=50pF.
Sym
Parameter
Limits
Min
Typ
Max
Units
fDC
Decoder clock frequency
0
-
15
MHz
tDCR
Decoder clock rise time
-
-
8
MHz
tDCF
Decoder clock fall time
-
-
8
ns
fDD
Data rate
0
-
1.25
MHz
tDR
Decoder reset pulse width
150
-
-
ns
tDRS
Decoder reset setup time
75
-
-
ns
tMR
Master reset pulse width
150
-
-
ns
t D1
Bipolar data pulse width
tDC + 10
-
-
ns
t D2
Sync transition span
-
18tDC
-
ns
t D3
One-Zero overlap
-
-
tDC - 10
ns
t D4
Short data transition span
-
6tDC
-
ns
t D5
Long data transition span
-
12tDC
-
ns
t D6
Sync delay (on)
-20
-
110
ns
t D7
Take data delay (on)
0
-
110
ns
t D8
Serial data out delay
-
-
80
ns
t D9
Sync delay (off)
0
-
110
ns
tD10
Take data delay (off)
0
-
110
ns
tD11
Valid word delay
0
-
110
ns
Figure 8: Decoder Electrical
Characteristics
1. VDD = 5V ±10%, over full operating temperature range. 2. CL=50pF.
3. tDC = Decoder clock period = 1/fDC
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Encoder Operation
The Encoder requires a single clock with a
frequency of twice the desired data rate applied
at the SEND CLOCK input. An auxiliary
divide by six counter is provided on chip which
can be utilised to produce the SEND CLOCK
by dividing the DECODER CLOCK.
The Encoder's cycle begins when
ENCODER ENABLE is high during a failing
edge of ENCODER SHIFT CLOCK ①. This
cycle lasts for one word length or twenty
ENCODER SHIFT CLOCK periods. At the
next low-to-high transition of the ENCODER
SHIFT CLOCK, a high at SYNC SELECT
input actuates a command sync or a low will
produce a data sync for that word ②. When the
Encoder is ready to accept data, the SEND
DATA output will go high and remain high for
sixteen ENCODER SHIFT CLOCK periods ③.
Timing
0 1
2
3
During these sixteen periods the data should be
clocked into the SERIAL DATA input with
every low-high transition of the ENCODER
SHIFT CLOCK ③ - ④. After the sync and the
Manchester II coded data are chip transmitted
through the BIPOLAR ONE and BIPOLAR
ZERO outputs, the Encoder adds on an
additional bit which is the parity for that word
⑤. At any time a low in OUTPUT INHIBIT
input will force both bipolar outputs to a high
state but will not affect the Encoder in any other
way. To abort the Encoder transmission a
positive pulse must be applied at MASTER
RESET. Anytime after or during this pulse, a
low to high transition on SEND CLOCK clears
the internal counters and initializes the Encoder
for a new word.
4
5
6
7
15 16 17 18 19
Send Clock
Encoder
Shift Clock
Encoder
Enable
Sync Select
Don’t Care
Valid
Don’t Care
Send Data
15 14 13 12 11 10
3 2
15 14 13 12 11
3
2
1
0
P
Sync Sync 15 14 13 12 11
3
2
1
0
P
4
5
Serial Data In
Bipolar
One Out
1st
2nd
1
0
Half Half
Bipolar
Zero Out
1
2
3
Figure 9: Encoder Operation
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Decoder Operation
The Decoder requires a single clock with a
frequency of 12 times the desired data rate
applied at the DECODER CLOCK input. The
Manchester II coded data can be presented to the
Decoder in one of two ways. The BIPOLAR
ONE and BIPOLAR ZERO inputs will accept
data from a comparator sensed transformer
coupled bus as specified in MIL-STD-1553. The
UNIPOLAR DATA input can only accept
non-inverted Manchester II coded data (e.g.from
BIPOLAR ZERO OUT of an Encoder).
The Decoder is free running and continuously
monitors its data input lines for a valid sync
character and two valid Manchester data bits to
start an output cycle.. When a valid sync is
recognized ①, the type of sync is indicated on
COMMAND/DATA SYNC output. if the sync
character was a command sync, this output will
go high ② and remain high for sixteen
DECODER SHIFT CLOCK periods ③,
otherwise it will remain low. The TAKE DATA
Timing
0
1 2
3
4
output will go high and remain high ② - ③
while the Decoder is transmitting the decoded
data through SERIAL DATA OUT. The decoded
data available at SERIAL DATA OUT is in a
NRZ format. The DECODER SHIFT CLOCK is
provided so that the decoded bits can get shifted
into an external register on every low-to-high
transition of this clock ② - ③.
After all sixteen decoded bits have been
transmitted ③ the data is checked for odd parity.
A high on VALID WORD output ④ indicates a
successful reception of a word without any
Manchester or parity errors. At this time the
Decoder is looking for a new sync character to
start another output sequence.
At any time in the above sequence, a high
input on DECODER RESET during a
low-to-high transition of DECODER SHIFT
CLOCK will abort transmission and initialize
the Decoder to start looking for a new sync
character.
5
6
7
8
16 17 18 19
Decoder
Shift Clock
Bipolar
One In
1st 2nd 15 14 13 12 11 10
2
1
0
P
2
1
0
P
Half Half
Bipolar
Zero In
Sync Sync 15 14 13 12 11 10
Take Data
Command/Data
Sync
Serial Data Out
Undefined
Valid Word
(From Previous
Reception)
15 14 13 12
1
2
4
3
2
1
0
3
4
Figure 10: Decoder Operation
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Send Clock
tE1
Encoder Shift Clock
tE2
Serial Data In
Valid
Valid
tE3
Send Clock
tE1
Encoder Shift Clock
tE4
tE6
Encoder Enable
tE5
Valid
Sync Select
tE8
tE7
Encoder Shift Clock
Send Clock
tE9
Send Clock
Bipolar One Out
or
Bipolar Zero Out
Figure 11: Encoder Timing Diagram
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ONE BIT PER.
ZERO BIT PER.
ONE BIT PER.
1/ Bipolar One In
tD1
Command Sync
tD3
tD3
tD2
1/ Bipolar Zero In
tD2
tD1
1/ Bipolar One In
tD3
tD3
tD2
Data Sync
1/ Bipolar Zero In
tD2
tD1
tD3
tD3
1/ Bipolar One In
tD3
tD3
tD3
tD3
1/ Bipolar Zero In
tD4
tD1
tD1
tD4
tD5
tD5
2/ Unipolar In
tD2
tD2
tD2
tD2
Command Sync
2/ Unipolar In
tD4
Data Sync
2/ Unipolar In
tD4
tD5
tD5
tD4
ZERO
ONE
ONE
ONE
Notes: 1. Unipolar In = 0
2. Bipolar One In = 0
Bipolar Zero In = 1
Figure 12: Decoder Timing Diagram
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tD7
tD6
Decoder Shift Clock
Command / Data Sync
Take Data
Decoder Shift Clock
tD8
Data Bit
Serial Data Out
Decoder Shift Clock
tD9
Command / Data Sync
tD10
tD11
Take Data
Valid Word
Decoder Shift Clock
tDRS
Decoder Reset
tDR
Figure 13: Decoder Timing Details
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Command Sync
Data Sync
Bit
Period
Bit
Period
Bit
Period
Logical One Data
Logical Zero Data
Figure 14: Character Formats
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
Command Word (From Controller to Terminal)
Sync
5
1
5
5
1
Terminal
Address
R/T
Subaddress
Mode
Data Word
Count
P
Data Word (Sent Either Direction)
1
16
Sync
Data Word
P
Status Word (From Terminal to Controller)
Sync
5
1
Terminal
Address
ME
9
Code for Failure Modes
1
1
TF
P
Figure 15: Word Formats
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D
Pin 1
Notch
e
W
ME
Seating Plane
A
A1
H
0-15°
Alernative Pin Shapes
c
b
Valid Word
Encoder Shift Clock
Take Data
Serial Data Out
Decoder Clock
Bipolar Zero In
Bipolar One In
Unipolar Data In
Decoder Shift Clock
Command/Data Sync
Decoder Reset
VSS
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
0-15°
e1
VDD
Encoder Clock
Send Clock In
Send Data
Sync Select
Encoder Enable
Serial Data In
Bipolar One Out
Output Inhibit
Bipolar Zero Out
÷ 6 Out
Master Reset
Ref.
Min.
Nom.
Max.
5.60 (0.220)
A
-
-
A1
0.38 (0.015)
-
1.53 (0.060)
b
0.35 (0.014)
-
0.59 (0.023)
c
0.20 (0.008)
-
0.36 (0.014)
D
-
-
30.79 (1.212)
e
-
2.54 (0.100) Typ
-
e1
-
15.24 (0.600) Typ
-
H
4.71 (0.185)
-
5.38 (0.212)
ME
-
-
15.90 (0.626)
W
-
-
1.53 (0.060)
Dimensions in mm (inches)
Figure 16: 24-Lead Ceramic DIL (Solder Seal) - Package Style C
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M
b
D
Z
e
L
A
c
A1
ME
Ref.
Pin 1 Index
Min.
Nom.
Max.
A
-
-
2.67 (0.105)
A1
0.25 (0.010)
-
1.02 (0.040)
b
0.38 (0.015)
-
0.48 (0.019)
c
0.10 (0.004)
-
0.18 (0.007)
D
14.86 (0.585)
-
15.62 (0615)
e
-
1.275 (0.050)
-
L
6.73 (0..265)
-
7.75 (0.305)
10.41 (0.410)
M
9.91 (0.390)
-
ME
7.6 (0.30)
-
-
Z
0.13 (0.005)
-
1.14 (0.045)
Dimensions in mm (inches)
VDD
Encoder Clock
Send Clock In
Send Data
Sync Select
Encoder Enable
Serial Data In
Bipolar One Out
Output Inhibit
Bipolar Zero Out
÷ 6 Out
Master Reset
24
1
23
2
22
3
21
4
20
19
18
5
Bottom
View
6
7
17
8
16
9
15
10
14
11
13
12
Valid Word
Encoder Shift Clock
Take Data
Serial Data Out
Decoder Clock
Bipolar Zero In
Bipolar One In
Unipolar Data In
Decoder Shift Clock
Command/Data Sync
Decoder Reset
VSS
Figure 17: 24-Lead Ceramic Flatpack (Solder Seal) - Package Style CF
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ENCODER SHIFT CLK
VALID WORD
Vcc
3
2
1
28 27 26
SEND CLK IN
TAKE DATA
4
ENCODER CLK
SERIAL DAA OUT
TOP VIEW
25 SEND DATA
DECODER CLK 5
NC 6
24 NC
23 NC
NC 7
BIPOLAR ZERO IN 8
22 SYNC SELECT
21 ENCODER ENABLE
BIPOLAR ONE IN 9
20 SERIAL DATA IN
UNIPOLAR DATA IN 10
19 BIPOLAR ONE OUT
DECODER SHIFT CLOCK 11
OUTPUT INHIBIT
BIPOLAR ZERO
OUT
6 OUT
÷
MASTER RESET
GROUND
DECODER RESET
13 14 15 16 17 18
COMMAND /
DATA SYNC
12
BOTTOM VIEW
.003
.075
.015
.095
.006
.022
.442
.458
.022
.028
.015
MIN
.045
.050
BSC
.055
.442
.458
.090
MAX
.074
.088
Figure 18: 28-Leadless Ceramic Chip Carrier - Package Style L
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CIRCUIT TECHNOLOGY
Ordering Information
Model Number
Part Number
ACT15530XX
See Below or Contact Factory
Part Number Breakdown
ACT15530 X X
Package Type
C Ceramic DIL (Figure 16)
CF Flatpack (Figure 17)
L LCC (Figure 18)
N Naked Die *
P Plastic DIP *
Rel Level
B Class B Operating Temperature (Figure 5) -55°C to +125°C
C Commercial (0°C to+70°C)
I Industrial (-40°C to +85°C)
S Space *
* Contact Factory for Details
Aeroflex Circuit Technology
35 South Service Road
Plainview New York 11803
Telephone: (516) 694-6700
FAX:
(516) 694-6715
Toll Free Inquiries: 1-(800)THE-1553
Specifications subject to change without notice.
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