Intersil EL5150IW-T7A 200mhz amplifier Datasheet

EL5150, EL5151, EL5250, EL5251, EL5451
®
Data Sheet
April 4, 2006
FN7384.5
200MHz Amplifiers
Features
The EL5150, EL5151, EL5250, EL5251, and EL5451 are
200MHz bandwidth -3dB voltage mode feedback amplifiers
with DC accuracy of 0.01%, 1mV offsets and 10kV/V open
loop gains. These amplifiers are ideally suited for
applications ranging from precision measurement
instrumentation to high speed video and monitor
applications. Capable of operating with as little as 1.4mA of
current from a single supply ranging from 5V to 12V, dual
supplies ranging from ±2.5V to ±5.0V, these amplifiers are
also well suited for handheld, portable and battery-powered
equipment.
• 200MHz -3dB bandwidth
Single amplifiers are offered in SOT-23 packages and duals
in a 10 Ld MSOP package for applications where board
space is critical. Quad amplifiers are available in a 14 Ld SO
package. Additionally, singles and duals are available in the
industry-standard 8 Ld SO package. All parts operate over
the industrial temperature range of -40°C to +85°C.
• Pb-free plus anneal available (RoHS compliant)
• 67V/µs slew rate
• Very high open loop gains 50kV/V
• Low supply current = 1.4mA
• Single supplies from 5V to 12V
• Dual supplies from ±2.5V to ±5V
• Fast disable on the EL5150 and EL5250
• Low cost
Applications
• Imaging
• Instrumentation
• Video
• Communications devices
Pinouts
NC 1
IN- 2
IN+ 3
+
VS- 4
8 CE
OUT 1
7 VS+
VS- 2
6 OUT
IN+ 3
INA+ 1
INB+ 5
OUT 1
5 CE
VS- 2
4 IN-
IN+ 3
5 VS+
+ 4 IN-
+
-
EL5451
(14 LD SO)
TOP VIEW
EL5251
(8 LD MSOP)
TOP VIEW
10 INA-
+
VS- 3
CEB 4
+ -
6 VS+
5 NC
EL5250
(10 LD MSOP)
TOP VIEW
CEA 2
EL5151
(5 LD SOT-23)
TOP VIEW
EL5150
(6 LD SOT-23)
TOP VIEW
EL5150
(8 LD SO)
TOP VIEW
OUTA 1
9 OUTA
INA- 2
8 VS+
INA+ 3
7 OUTB
6 INB-
VS- 4
8 VS+
+
+
OUTA 1
7 OUTB
INA- 2
6 INB-
INA+ 3
5 INB+
VS+ 4
- +
+ -
OUTB 7
13 IND12 IND+
11 VS-
INB+ 5
INB- 6
1
14 OUTD
10 INC+
- +
+ -
9 INC8 OUTC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004-2006. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
EL5150, EL5151, EL5250, EL5251, EL5451
Ordering Information (Continued)
Ordering Information
PART
PART NUMBER MARKING
TAPE &
REEL
PACKAGE
PKG.
DWG. #
PART
PART NUMBER MARKING
TAPE &
REEL
PACKAGE
PKG.
DWG. #
EL5150IS
5150IS
-
8 Ld SO
MDP0027
EL5250IY
BAEAA
-
10 Ld MSOP MDP0043
EL5150IS-T7
5150IS
7”
8 Ld SO
MDP0027
EL5250IY-T7
BAEAA
7”
10 Ld MSOP MDP0043
EL5150IS-T13
5150IS
13”
8 Ld SO
MDP0027
EL5250IY-T13
BAEAA
13”
10 Ld MSOP MDP0043
EL5150ISZ
(See Note)
5150ISZ
-
8 Ld SO
(Pb-free)
MDP0027
EL5251IS
5251IS
-
8 Ld SO
MDP0027
EL5251IS-T7
5251IS
7”
8 Ld SO
MDP0027
EL5150ISZ-T7
(See Note)
5150ISZ
7”
8 Ld SO
(Pb-free)
MDP0027
EL5251IS-T13
5251IS
13”
8 Ld SO
MDP0027
EL5150ISZ-T13
(See Note)
5150ISZ
13”
8 Ld SO
(Pb-free)
MDP0027
EL5251IY
BAFAA
-
8 Ld MSOP
MDP0043
EL5251IY-T7
BAFAA
7”
8 Ld MSOP
MDP0043
EL5150IW-T7
BEAA
EL5251IY-T13
BAFAA
13”
8 Ld MSOP
MDP0043
EL5451IS
5451IS
-
14 Ld SO
MDP0027
EL5150IW-T7A
BEAA
EL5451IS-T7
5451IS
7”
14 Ld SO
MDP0027
EL5150IWZ-T7
(See Note)
BAAJ
EL5451IS-T13
5451IS
13”
14 Ld SO
MDP0027
EL5451ISZ
(See Note)
5451ISZ
-
14 Ld SO
(Pb-free)
MDP0027
EL5451ISZ-T7
(See Note)
5451ISZ
7”
14 Ld SO
(Pb-free)
MDP0027
EL5451ISZ-T13
(See Note)
5451ISZ
13”
14 Ld SO
(Pb-free)
MDP0027
EL5150IWZ-T7A BAAJ
(See Note)
EL5151IW-T7
BFAA
EL5151IW-T7A
BFAA
EL5151IWZ-T7
(See Note)
BAAK
EL5151IWZ-T7A BAAK
(See Note)
7”
(3k pcs)
6 Ld SOT-23 MDP0038
7”
6 Ld SOT-23 MDP0038
(250 pcs)
7”
(3k pcs)
6 Ld SOT-23 MDP0038
(Pb-free)
7”
6 Ld SOT-23 MDP0038
(250 pcs) (Pb-free)
7”
(3k pcs)
5 Ld SOT-23 MDP0038
7”
5 Ld SOT-23 MDP0038
(250 pcs)
7”
(3k pcs)
5 Ld SOT-23 MDP0038
(Pb-free)
7”
5 Ld SOT-23 MDP0038
(250 pcs) (Pb-free)
2
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
FN7384.5
April 4, 2006
EL5150, EL5151, EL5250, EL5251, EL5451
Absolute Maximum Ratings (TA = 25°C)
Supply Voltage between VS and VS- . . . . . . . . . . . . . . . . . . . . 13.2V
Slewrate of Voltage between VS and VS- . . . . . . . . . . . . . . . . 1V/µs
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 40mA
Pin Voltages . . . . . . . . . . . . . . . . . . . . . . . . . GND -0.5V to VS +0.5V
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Current into IN+, IN-, CE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER
VS+ = +5V, VS- = -5V, RL = 150Ω, TA = 25°C, unless otherwise specified.
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
AC PERFORMANCE
BW
-3dB Bandwidth
AV = +1, RL = 500Ω
200
MHz
AV = +2, RL = 150Ω
40
MHz
GBWP
Gain Bandwidth Product
AV = 500
40
MHz
BW1
0.1dB Bandwidth
AV = +1, RL = 500Ω
10
MHz
SR
Slew Rate
VO = ±2.5V, AV = +2
67
V/µs
VO = ±3.0V, AV = 1, RL = 500Ω
100
V/µs
80
ns
50
tS
0.1% Settling Time
VOUT = -1V to +1V, AV = -2
dG
Differential Gain Error (Note 1)
AV = +2, RL = 150Ω
0.04
%
dP
Differential Phase Error (Note 1)
AV = +2, RL = 150Ω
0.9
°
VN
Input Referred Voltage Noise
12
nV/√Hz
IN
Input Referred Current Noise
1.0
pA/√Hz
DC PERFORMANCE
VOS
Offset Voltage
TCVOS
Input Offset Voltage Temperature
Coefficient
AVOL
Open Loop Gain
-1
Measured from TMIN to TMAX
15
0.5
1
mV
-2
µV/°C
56
kV/V
INPUT CHARACTERISTICS
CMIR
Common Mode Input Range
CMRR
Common Mode Rejection Ratio
IB
Guaranteed by CMRR test
-3.5
+3.5
V
85
100
dB
Input Bias Current
-100
20
+100
nA
IOS
Input Offset Current
-30
6
30
nA
RIN
Input Resistance
80
170
MΩ
CIN
Input Capacitance
1
pF
OUTPUT CHARACTERISTICS
VOUT
IOUT
Output Voltage Swing Low
Output Current
3
RL = 150Ω to GND
±2.5
±2.8
V
RL = 500Ω to GND
±3.1
±3.4
V
RL = 10Ω to GND
±40
±70
mA
FN7384.5
April 4, 2006
EL5150, EL5151, EL5250, EL5251, EL5451
Electrical Specifications
PARAMETER
VS+ = +5V, VS- = -5V, RL = 150Ω, TA = 25°C, unless otherwise specified. (Continued)
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
ENABLE (SELECTED PACKAGES ONLY)
tEN
Enable Time
EL5150
210
ns
tDIS
Disable Time
EL5150
620
ns
IIHCE
CE Pin Input High Current
CE = VS+
1
5
25
µA
IILCE
CE Pin Input Low Current
CE = VS+ - 5V
-1
0
+1
µA
VIHCE
CE Input High Voltage for Powerdown
Disable
VILCE
CE Input Low Voltage for Powerdown
Enable
ISON
Supply Current - Enabled (per amplifier)
No load, VIN = 0V, CE = +5V
ISOFF+
VS+ -1
V
VS+ -3
V
SUPPLY
1.12
1.35
1.6
mA
Supply Current - Disabled (per amplifier)
-10
-1
+5
µA
ISOFF-
Supply Current - Disabled (per amplifier) No load, VIN = 0V
-25
-14
0
µA
PSRR
Power Supply Rejection Ratio
80
110
DC, VS = ±3.0V to ±6.0V
dB
NOTE:
1. Standard NTSC test, AC signal amplitude = 286mVP-P, f = 3.58MHz, VOUT is swept from 0.8V to 3.4V, RL is DC coupled.
Typical Performance Curves
100
-45
60
45
40
90
20
0
1K
135
10K
100K
1M
10M
100M
FREQUENCY (Hz)
FIGURE 1. EL5150 FREQUENCY vs OPEN LOOP
GAIN/PHASE
4
180
1G
90
PHASE (°)
0
PHASE (°)
GAIN (dB)
80
180
AV=+1
RL=500Ω
RF=0Ω
0
-90
AV=+2
RL=150Ω
RF=400Ω
-180
-270
100K
1M
AV=+5
RL=500Ω
RF=1.5KΩ
10M
100M
1G
FREQUENCY (Hz)
FIGURE 2. PHASE vs FREQUENCY FOR VARIOUS GAINS
FN7384.5
April 4, 2006
EL5150, EL5151, EL5250, EL5251, EL5451
Typical Performance Curves
5
AV=+1
CL=5pF
3
1
RL=500Ω
-1
RL=200Ω
RL=300Ω
-3
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
5
(Continued)
VS=±5V
AV=+2
3 RF=RG=402Ω
1
RL=1kΩ
-1
RL=500Ω
RL=150Ω
-3
RL=100Ω
-5
100K
1M
10M
RL=100Ω
100M
-5
0.1
1G
1
FREQUENCY (Hz)
FIGURE 4. EL5150 GAIN vs FREQUENCY FOR VARIOUS RL
5
AV=+5
RF=1.5kΩ
2 CL=5pF
RL=500Ω
0
RL=400Ω
RL=200Ω
-4
NORMALIZED GAIN (dB)
4
NORMALIZED GAIN (dB)
100
FREQUENCY (Hz)
FIGURE 3. EL5150 GAIN vs FREQUENCY FOR VARIOUS RL
-2
10
AV=+1
RL=500Ω
CL=15pF
3
CL=8.2pF
1
CL=3.9pF
-1
CL=0pF
-3
RL=100Ω
-6
100K
1M
10M
-5
100K
100M
FREQUENCY (Hz)
5
CL=68pF
CL=47pF
CL=22pF
1
-1
CL=0pF
-3
-5
100K
1M
10M
100M
FREQUENCY (Hz)
FIGURE 7. EL5150 GAIN vs FREQUENCY FOR VARIOUS CL
5
100M 300M
FIGURE 6. EL5150 GAIN vs FREQUENCY FOR VARIOUS CL
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
AV=+2
RL=500Ω
3 RF=RG=400Ω
10M
FREQUENCY (Hz)
FIGURE 5. EL5150 GAIN vs FREQUENCY FOR VARIOUS RL
5
1M
AV=+5
RF=1.5kΩ
3 RL=500Ω
CL=82pF
CL=68pF
1
CL=47pF
-1
CL=15pF
-3
-5
100K
CL=0pF
1M
10M
30M
FREQUENCY (Hz)
FIGURE 8. EL5150 GAIN vs FREQUENCY FOR VARIOUS CL
FN7384.5
April 4, 2006
EL5150, EL5151, EL5250, EL5251, EL5451
Typical Performance Curves
(Continued)
4
AV=+1
RL=500Ω
3 CL=5pF
CIN-=4.7pF
CIN-=18pF
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
5
CIN-=12pF
CIN-=8.2pF
1
CIN-=3.3pF
-1
CIN-=0pF
-3
CIN-=1pF
-5
100K
1M
100M
10M
AV=+2
RL=500Ω
2 CL=5pF
RF=RG=400Ω
0
CIN=8.2pF
-2
CIN=3.9pF
CIN=0pF
-4
-6
100K
400M
CIN=12pF
1M
FREQUENCY (Hz)
CIN-=68pF
0
CIN-=8.2pF
CIN-=8pF
CIN-=3.3pF
CIN-=0pF
-4
-6
100K
4
CIN-=33pF
CIN-=100pF
-2
FIGURE 10. EL5150 GAIN vs FREQUENCY FOR VARIOUS CIN
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
2
AV=+5
RF=1.5kΩ
RL=500Ω
CL=5pF
1M
10M
AV=+5
RF=1.5kΩ
2 RL=500Ω
CL=5pF
0
RL=500Ω
RL=300Ω
-2
RL=200Ω
-4
RL=100Ω
-6
100K
40M
RF=RG=2kΩ
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
4
RF=RG=3kΩ
1
RF=RG=1kΩ
-5
100K
RF=RG=500Ω
RF=RG=100Ω
1M
10M
100M
FREQUENCY (Hz)
FIGURE 13. EL5150 GAIN vs FREQUENCY FOR VARIOUS
RF/RG
6
30M
FIGURE 12. EL5250 GAIN vs FREQUENCY FOR VARIOUS RL
5
-3
10M
FREQUENCY (Hz)
FIGURE 11. EL5150 GAIN vs FREQUENCY FOR VARIOUS CIN-
-1
RL=50Ω
1M
FREQUENCY (Hz)
AV=+2
RL=500Ω
3 CL=5pF
100M
FREQUENCY (Hz)
FIGURE 9. EL5150 GAIN vs FREQUENCY FOR VARIOUS CIN4
10M
RL=500Ω
CL=5pF
2
AV=+1
0
AV=+2
-2
-4
-6
100K
AV=+3
1M
10M
100M 300M
FREQUENCY (Hz)
FIGURE 14. EL5250 GAIN vs FREQUENCY FOR VARIOUS
GAINS
FN7384.5
April 4, 2006
EL5150, EL5151, EL5250, EL5251, EL5451
Typical Performance Curves
0
BOTH CHANNELS SHOWN
RL=500Ω
CL=5pF
2
AV=+1
POSITIVE SUPPLY
20
AV=+1
0
AV=+2
-2
PSRR (dB)
NORMALIZED GAIN (dB)
4
(Continued)
40
60
AV=+3
-4
80
-6
100K
1M
10M
100
1K
100M
10K
FREQUENCY (Hz)
100M
-40
AV=+1
NEGATIVE SUPPLY
CROSSTALK (dB)
PSRR (dB)
10M
FIGURE 16. PSRR vs FREQUENCY
20
40
60
80
AV=+2
RL=500Ω
-50 CL=5pF
IN CHANNEL A
OUT CHANNEL B
-60
-70
-80
100
1K
10K
100K
1M
10M
-90
100K
100M
1M
FREQUENCY RESPONSE (Hz)
100M
FIGURE 18. EL5250 CROSSTALK vs FREQUENCY
40
1K
AV=+2
RL=500Ω
50 CL=5pF
IN CHANNEL B
OUT CHANNEL A
AV=+2
IMPEDANCE (Ω)
100
60
70
80
90
100K
10M
FREQUENCY (Hz)
FIGURE 17. PSRR vs FREQUENCY
CROSSTALK (dB)
1M
FREQUENCY RESPONSE (Hz)
FIGURE 15. EL5250 GAIN vs FREQUENCY FOR VARIOUS
GAINS
0
100K
10
1
0.1
1M
10M
100M
FREQUENCY (Hz)
FIGURE 19. EL5250 CROSSTALK vs FREQUENCY
7
0.001
1K
10K
100K
1M
10M
100M
FREQUENCY (Hz)
FIGURE 20. OUTPUT IMPEDANCE
FN7384.5
April 4, 2006
EL5150, EL5151, EL5250, EL5251, EL5451
Typical Performance Curves
0
(Continued)
2500
NORMALIZED GROUP DELAY
(500ps/DIV)
AV=+2
CMRR (dB)
20
40
60
80
100
100
10K
1K
100K
10M
1M
AV=+1
RL=500Ω
1500 CL=5pF
500
-500
-1500
-2500
1M
100M
10M
FREQUENCY (Hz)
FIGURE 22. GROUP DELAY
100
AV=+1
RL=500Ω
2.5 C =5pF
L
VOLTAGE NOISE (nV/√Hz)
CURRENT NOISE (pA/√Hz)
SUPPLY CURRENT (mA)
3
2
1.5
1
0.5
1
1.5
2
2.5
3
3.5
4
4.5
10
1
0.1
100
5
10K
1K
SUPPLY VOLTAGE (V)
100K
FREQUENCY (Hz)
FIGURE 23. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 24. VOLTAGE + CURRENT NOISE vs FREQUENCY
105
90
80
100
70
3RD HD
60
2ND HD
SLEW RATE (V/µs)
DISTORTION (dBc)
600M
FREQUENCY (Hz)
FIGURE 21. CMRR
0
100M
50
40
30
AV=+1
RL=500Ω
10 CL=2.2pF
FREQ=1.9MHz
0
0
1
2
3
95
90
85
80
20
75
4
5
6
7
8
9
OUTPUT SWING (VP-P)
FIGURE 25. DISTORTION vs OUTPUT AMPLITUDE
8
70
2.2
2.7
3.2
3.7
4.2
4.7
5.2
5.7
6.2
SPLIT POWER SUPPLY (V)
FIGURE 26. SLEW RATE vs POWER SUPPLY
FN7384.5
April 4, 2006
EL5150, EL5151, EL5250, EL5251, EL5451
Typical Performance Curves
(Continued)
-20
-30
HARMONIC DISTORTION (dBc)
AV=+5
VS=±5V
RL=500Ω
-40 RF=402Ω
THD (dBc)
THD_Fin=2MHz
-50
THD_Fin=500kHz
-60
-70
0
1
2
3
4
5
7
8
AV=+5
VS=±5V
-30 RL=500Ω
RF=402Ω
VOUT=2VP-P
-40
2ND HD
-50
3RD HD
-60
-70
0.5
OUTPUT VOLTAGE (VP-P)
AV=+1
RL=500Ω
CL=2.2pF
20%-80%
CH3 RISE
1.874ns
80%-20%
CH3 FALL
3.106ns
1
FIGURE 28. HARMONIC DISTORTION vs FREQUENCY
AV=+1
RL=500Ω
CL=2.2pF
20%-80%
CH3 RISE
11.72ns
TIME (40ns/DIV)
AV=+2
RL=150Ω
CL=2.2pF
20%-80%
CH3 RISE
4.337ns
80%-20%
CH3 FALL
6.229ns
TIME (40ns/DIV)
FIGURE 31. SMALL SIGNAL STEP RESPONSE
9
80%-20%
CH3 FALL
15.28ns
TIME (40ns/DIV)
FIGURE 30. LARGE SIGNAL STEP RESPONSE
VOLTAGE (500mV/DIV)
VOLTAGE (50mV/DIV)
FIGURE 29. SMALL SIGNAL STEP RESPONSE
10
FUNDAMENTAL FREQUENCY (MHz)
VOLTAGE (500mV/DIV)
VOLTAGE (50mV/DIV)
FIGURE 27. TOTAL HARMONIC DISTORTION vs OUTPUT
VOLTAGE
THD
AV=+2
RL=150Ω
CL=2.2pF
20%-80%
CH3 RISE
12.87ns
80%-20%
CH3 FALL
15.67ns
TIME (40ns/DIV)
FIGURE 32. LARGE SIGNAL STEP RESPONSE
FN7384.5
April 4, 2006
EL5150, EL5151, EL5250, EL5251, EL5451
Typical Performance Curves
(Continued)
AV=+1
RL=500Ω
RL=500Ω
SUPPLY=±5.0V, ±2.7mA
CH 1
CH 2
CH 4
210ns
ENABLE
620ns
DISABLE
800ns
ENABLE
TIME (400ns/DIV)
TIME (1µs/DIV)
0.06
0.04
0.02
0
-0.02
-0.04
FIGURE 34. EL5250 ENABLE/DISABLE
DIFFERENTIAL
PHASE (°)
DIFFERENTIAL
GAIN (%)
FIGURE 33. EL5150 ENABLE/DISABLE
0
1.5
1.0
0.5
0
-0.5
-1.0
10 20 30 40 50 60 70 80 90 100
0
10 20 30 40 50 60 70 80 90 100
IRE
IRE
FIGURE 35. DIFFERENTIAL GAIN
FIGURE 36. DIFFERENTIAL PHASE
-50
AV=+1
RL=500Ω
2 CL=5pF
AV=+1
RL=500Ω
-70 CL=2.7pF
0
±2.0V
-2
±6.0V
-4
ISOSLATION (dB)
NORMALIZED GAIN (dB)
4
-6
100K
520ns
DISABLE
-90
-110
-130
10M
1M
100M 300M
FREQUENCY (Hz)
FIGURE 37. SMALL SIGNAL FREQUENCY vs SUPPLY
10
-150
100K
1M
10M
100M 300M
FREQUENCY (Hz)
FIGURE 38. INPUT-TO-OUTPUT ISOLATION WITH PART
DISABLED
FN7384.5
April 4, 2006
EL5150, EL5151, EL5250, EL5251, EL5451
Typical Performance Curves
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1
SO14
θJA=88°C/W
1 909mW
SO8
θJA=110°C/W
0.8 870mW
0.6
435mW
MSOP8/10
θJA=115°C/W
0.4
SOT23-5/6
θJA=230°C/W
0.2
0
0
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.9 833mW
1.2 1.136W
POWER DISSPIATION (W)
POWER DISSPIATION (W)
1.4
(Continued)
25
0.8
0.4
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 39. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
Product Description
The EL5150, EL5151, EL5250, EL5251 and EL5451 are
wide bandwidth, low power, low offset voltage feedback
operational amplifiers capable of operating from a single or
dual power supplies. This family of operational amplifiers are
internally compensated for closed loop gain of +1 or greater.
Connected in voltage follower mode, driving a 500Ω load
members of this amplifier family demonstrate a -3dB
bandwidth of about 200MHz. With the loading set to
accommodate typical video application, 150Ω load and gain
set to +2, bandwidth reduces to about 40MHz with a 67V/µs
slew rate. Power down pins on the EL5151 and EL5251
reduce the already low power demands of this amplifier
family to 12µA typical while the amplifier is disabled.
Input, Output and Supply Voltage Range
The EL5150 and family members have been designed to
operate with supply voltage ranging from 5V to 12V. Supply
voltages range from ±2.5V to ±5V for split supply operation.
And of course split supply operation can easily be achieved
using single supplies with by splitting off half of the single
supply with a simple voltage divider as illustrated in the
application circuit section.
Input Common Mode Range
These amplifiers have an input common mode voltage
ranging from 3.5V above the negative supply (VS- pin) to
3.5V below the positive supply (VS+ pin). If the input signal is
driven beyond this range the output signal will exhibit
distortion.
Maximum Output Swing & Load Resistance
The outputs of the EL5150 and family members exhibit
maximum output swing ranges from -4V to 4V for VS = ±5V
with a load resistance of 500Ω. Naturally, as the load
resistance becomes lower, the output swing lowers
11
MSOP8/10
θJA=206°C/W
SOT23-5/6
θJA=265°C/W
0.2
0
SO8
θJA=160°C/W
391mW
0.3
0.1
50
SO14
θJA=120°C/W
0.7 625mW
0.6
486mW
0.5
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 40. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
accordingly; for instance, if the load resistor is 150Ω, the
output swing ranges from -3.5V to 3.5V. This response is a
simple application of Ohms law indicating a lower value
resistance results in greater current demands of the
amplifier. Additionally, the load resistance affects the
frequency response of this family as well as all operational
amplifiers; as clearly indicated by the Gain Vs Frequency For
Various RL curves clearly indicate. In the case of the
frequency response reduced bandwidth with decreasing
load resistance is a function of load resistance in conjunction
with the output zero response of the amplifier.
Choosing A Feedback Resistor
A feedback resistor is required to achieve unity gain; simply
short the output pin to the inverting input pin. Gains greater
than +1 require a feedback and gain resistor to set the
desired gain. This gets interesting because the feedback
resistor forms a pole with the parasitic capacitance at the
inverting input; as the feedback resistance increases the
position of the pole shifts in the frequency domain, the
amplifier's phase margin is reduced and the amplifier
becomes less stable. Peaking in the frequency domain and
ringing in the time domain are symptomatic of this shift in
pole location. So we want to keep the feedback resistor as
small as possible. You may want to use a large feedback
resistor for some reason; in this case to compensate the shift
of the pole and maintain stability a small capacitor in the few
Pico farad range in parallel with the feedback resistor is
recommended.
For the gains greater than unity it has been determined a
feedback resistance ranging from 500Ω to 750Ω provides
optimal response.
FN7384.5
April 4, 2006
EL5150, EL5151, EL5250, EL5251, EL5451
Gain Bandwidth Product
The EL5150 and family members have a gain bandwidth
product of 40MHz for a gain of +5. Bandwidth can be
predicted by the following equation:
(Gain) x (BW) = GainBandwidthProduct
Video Performance
For good video performance, an amplifier is required to
maintain the same output impedance and same frequency
response as DC levels are changed at the output; this
characteristic is widely referred to as “diffgain-diffphase”.
Many amplifiers have a difficult time with this especially while
driving standard video loads of 150Ω, as the output current
has a natural tendency to change with DC level. The dG and
dP for these families is a respectable 0.04% and 0.9°, while
driving 150Ω at a gain of 2. Driving high impedance loads
would give a similar or better dG and dP performance as the
current output demands placed on the amplifier lessen with
increased load.
Driving Capacitive Loads
These devices can easily drive capacitive loads as
demanding as 27pF in parallel with 500Ω while holding
peaking to within 5dB of peaking at unity gain. Of course if
less peaking is desired, a small series resistor (usually
between 5Ω to 50Ω) can be placed in series with the output
to eliminate most peaking; however, there will be a small
sacrifice of gain which can be recovered by simply adjusting
the value of the gain resistor.
Driving Cables
Both ends of all cables must always be properly terminated;
double termination is absolutely necessary for reflection-free
performance. Additionally, a back-termination series resistor
at the amplifier's output will isolate the amplifier from the
cable and allow extensive capacitive drive. However, other
applications may have high capacitive loads without a backtermination resistor. Again, a small series resistor at the
output can help to reduce peaking.
Disable/Power-Down
ranging from 70mA and 95mA can be expected and
naturally, if the output is shorted indefinitely the part can
easily be damaged from overheating; or excessive current
density may eventually compromise metal integrity.
Maximum reliability is maintained if the output current is
always held below ±40mA. This limit is set and limited by the
design of the internal metal interconnect. Note that in
transient applications, the part is extremely robust.
Power Dissipation
With the high output drive capability of these devices, it is
possible to exceed the 125°C absolute maximum junction
temperature under certain load current conditions.
Therefore, it is important to calculate the maximum junction
temperature for an application to determine if load conditions
or package types need to be modified to assure operation of
the amplifier in a safe operating area.
The maximum power dissipation allowed in a package is
determined according to:
T JMAX – T AMAX
PD MAX = -------------------------------------------Θ JA
Where:
TJMAX = Maximum junction temperature
TAMAX = Maximum ambient temperature
qJA = Thermal resistance of the package
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
For sourcing:
n
PD MAX = V S × I SMAX +
V OUTi
∑ ( VS – VOUTi ) × ---------------R Li
i=1
For sinking:
n
PD MAX = V S × I SMAX +
∑ ( VOUTi – VS ) × ILOADi
i=1
Devices with disable can be disabled with their output placed
in a high impedance state. The turn off time is about 330ns
and the turn on time is about 130ns. When disabled, the
amplifier's supply current is reduced to 17µA typically;
essentially eliminating power consumption. The amplifier's
power down is controlled by standard TTL or CMOS signal
levels at the ENABLE pin. The applied logic signal is relative
to VS- pin. Letting the ENABLE pin float or the application of
a signal that is less than 0.8V above VS- enables the
amplifier. The amplifier is disabled when the signal at
ENABLE pin is above VS+ -1.5V.
Output Drive Capability
Members of the EL5150 family do not have internal short
circuit protection circuitry. Typically, short circuit currents
12
Where:
VS = Supply voltage
ISMAX = Maximum quiescent supply current
VOUT = Maximum output voltage of the application
RLOAD = Load resistance tied to ground
ILOAD = Load current
N = number of amplifiers (Max = 2)
By setting the two PDMAX equations equal to each other, we
can solve the output current and RLOAD to avoid the device
overheat.
FN7384.5
April 4, 2006
EL5150, EL5151, EL5250, EL5251, EL5451
Power Supply Bypassing Printed Circuit Board
Layout
compromised performance. Minimizing parasitic capacitance
at the amplifier's inverting input pin is very important. The
feedback resistor should be placed very close to the
inverting input pin. Strip line design techniques are
recommended for the signal traces.
As with any high frequency device, a good printed circuit
board layout is necessary for optimum performance. Lead
lengths should be as short as possible. The power supply
pin must be well bypassed to reduce the risk of oscillation.
For normal single supply operation, where the VS- pin is
connected to the ground plane, a single 4.7µF tantalum
capacitor in parallel with a 0.1µF ceramic capacitor from VS+
to GND will suffice. This same capacitor combination should
be placed at each supply pin to ground if split supplies are to
be used. In this case, the VS- pin becomes the negative
supply rail.
Application Circuits
Sullen Key Low Pass Filter
A common and easy to implement filter taking advantage of
the wide bandwidth, low offset and low power demands of
the EL5150. A derivation of the transfer function is provided
for convenience. (see Figure 39)
Sullen Key High Pass Filter
Printed Circuit Board Layout
Again, this useful filter benefits from the characteristics of the
EL5150. The transfer function is very similar to the low pass
so only the results are presented.(see Figure 40)
For good AC performance, parasitic capacitance should be
kept to a minimum. Use of wire wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance that can result in
K = 1+
5V
1
V1
R2C2s + 1
Vo
V1 − Vi
Vo − Vi
1 + K − V1 +
=0
1
R1
R2
C1s
K
H(s) =
R1C1R2C2s 2 + ((1 − K )R1C1 + R1C2 + R21C2)s + 1
1
H( jw ) =
2
1 − w R1C1R2C2 + jw ((1 − K )R1C1 + R1C2 + R2C2)
V2
Vo = K
0.1µF
C1
R1
1K
V1
1n
R2
3
1K
C2
1n
2
Holp = K
U1A 4
+
1
V+
VOUT
V-
-
RB
RA
R7
11
1K
1K
wo =
Q=
1
R1C1R2C2
1
R1C1
R1C2
R2C2
(1 − K )
+
+
R2C2
R2C1
R1C1
RB
RA
1K
Holp = K
1
RC
1
Q=
3 −K
wo =
0.1µF
5V
Equations simplify if we let all
components be equal R=C
V3
FIGURE 41. SULLEN KEY LOW PASS FILTER
13
FN7384.5
April 4, 2006
EL5150, EL5151, EL5250, EL5251, EL5451
5V
V2
0.1µF
Holp = K
R8
C7
1n
1K
C9
3
1n
V1
C2
1n
2
1
wo =
R1C1R2C2
U1A 4
+
1
V+
V-
-
Q=
VOUT
R7
11
1
R1C1
R1C2
R2C2
(1 − K )
+
+
R2C2
R2C1
R1C1
1K
1K
RB
RA
1K
Holp =
K
4 −K
2
wo =
RC
0.1µF
Q=
5V
Equations simplify if we let
all components be equal R=C
2
4 −K
V3
FIGURE 42. SULLEN KEY HIGH PASS FILTER
Differential Output Instrumentation Amplifier
The addition of a third amplifier to the conventional three
amplifier Instrumentation Amplifier introduces the benefits of
differential signal realization; specifically the advantage of
using common mode rejection to remove coupled noise and
ground –potential errors inherent in remote transmission.
This configuration also provides enhanced bandwidth, wider
output swing and faster slew rate than conventional three
amplifier solutions with only the cost of an additional
amplifier and few resistors.
e1
A1
+
-
R3
R3
A3
R2
+
RG
R3
R3
R3
R3
A4
R2
A2
e2
+
+
R3
e o3 = – ( 1 + 2R 2 ⁄ R G ) ( e 1 – e 2 )
eo3
+
REF
eo
eo4
R3
e o4 = ( 1 + 2R 2 ⁄ R G ) ( e 1 – e 2 )
e o = – 2 ( 1 + 2R 2 ⁄ R G ) ( e 1 – e 2 )
2f C1, 2
BW = ----------------A Di
14
A Di = – 2 ( 1 + 2R 2 ⁄ R G )
FN7384.5
April 4, 2006
EL5150, EL5151, EL5250, EL5251, EL5451
Strain Gauge
The strain gauge is an ideal application to take advantage of
the moderate bandwidth and high accuracy of the EL5150.
The operation of the circuit is very straight-forward. As the
strain variable component resistor in the balanced bridge is
subjected to increasing strain, its resistance changes
resulting in an imbalance in the bridge. A voltage variation
from the referenced high accuracy source is generated and
translated to the difference amplifier through the buffer
stage. This voltage difference as a function of the strain is
converted into an output voltage.
5V
V2
0.1µF
VARIABLE SUBJECT TO STRAIN
1K
V5
0V
R15
R15
1K
R14
22
4
22
4
1K
R17
1K
R18
3
U1A 4
+
2
1
V+
VOUT (V1+V2+V3+V4)
V-
-
RL
11
1K
1K
1K
RF
0.1µF
5V
V4
15
FN7384.5
April 4, 2006
EL5150, EL5151, EL5250, EL5251, EL5451
MSOP Package Outline Drawing
16
FN7384.5
April 4, 2006
EL5150, EL5151, EL5250, EL5251, EL5451
SO Package Outline Drawing
17
FN7384.5
April 4, 2006
EL5150, EL5151, EL5250, EL5251, EL5451
SOT-23 Package Outline Drawing
NOTE: The package drawing shown here may not be the latest version. To check the latest revision, please refer to the Intersil website at
http://www.intersil.com/design/packages/index.asp
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
18
FN7384.5
April 4, 2006
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