Cirrus CS3302A-IS High-z, programmable gain, differential amplifier Datasheet

CS3302A
High-Z, Programmable Gain, Differential Amplifier
Features & Description
Description
z Signal
The CS3302A is a high input-impedance, differential input, differential output amplifier with programmable
gain, optimized for amplifying signals from high-impedance sensors such as hydrophones. The gain settings
are binary weighted (x1, x2, x4, x8, x16, x32, x64) and
are selected using simple pin settings. Two sets of external inputs, INA and INB, simplify system design as
inputs from a sensor and test DAC. An internal 800Ω
termination can also be selected for noise tests.
Bandwidth: DC to 2 kHz
z Selectable Gain: x1, x2, x4, x8, x16, x32, x64
z Differential Inputs, Differential Outputs
•
•
•
•
Multiplexed inputs: INA, INB, 800Ω termination
Rough / fine charge outputs for CS5371A / 72A / 73A
Max signal amplitude: 5 Vpp differential
Ultra-low input bias: < 1 pA
z Excellent Noise Performance
• 1 µVp-p between 0.1 Hz and 10 Hz
• 8.5 nV/ √Hz from 200 Hz to 2 kHz
z Low Total Harmonic Distortion
• -118 dB THD typical (0.000126%)
• -112 dB THD maximum (0.000251%)
z Low Power Consumption
• Normal operation: 5 mA
• Power down: 10 µA
z Dual Power Supply Configuration
• VA+ = +2.5 V; VA- = -2.5 V; VD = +3.3 V
VA+
INA+
INB+
Amplifier input impedance is very high, requiring less
than 1 pA of input current. Noise performance is very
good at 1 µVp-p between 0.1 Hz and 10 Hz, and a noise
density of 8.5 nV/ √Hz over the 200 Hz to 2 kHz bandwidth. Distortion performance is also extremely good,
typically -118 dB THD. Low input current, low noise, and
low total harmonic distortion make this amplifier ideal for
high-impedance differential sensors requiring maximum
dynamic range.
ORDERING INFORMATION
See page 15.
GUARD
VD
+
OUTR+
OUTF+
400 Ω
-
GAIN0
GAIN1
GAIN2
400 Ω
MUX0
MUX1
+
VA-
Preliminary Product Information
http://www.cirrus.com
OUTFOUTR-
-
INAINB-
PWDN
GND
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright © Cirrus Logic, Inc. 2007
(All Rights Reserved)
NOV '07
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TABLE OF CONTENTS
1. CHARACTERISTICS AND SPECIFICATIONS ....................................................................... 4
SPECIFIED OPERATING CONDITIONS ................................................................................ 4
ABSOLUTE MAXIMUM RATINGS .......................................................................................... 4
THERMAL CHARACTERISTICS ............................................................................................. 5
ANALOG CHARACTERISTICS ............................................................................................... 5
DIGITAL CHARACTERISTICS ................................................................................................ 8
POWER SUPPLY CHARACTERISTICS ................................................................................. 9
2. GENERAL DESCRIPTION..................................................................................................... 10
2.1. Analog Signals .............................................................................................................. 10
2.2.1.Analog Inputs ....................................................................................................... 10
2.3.2.Analog Outputs .................................................................................................... 11
2.4.3.Differential Signals ............................................................................................... 11
2.5.4.Guard Output ....................................................................................................... 11
2.6. Digital Signals ............................................................................................................... 12
2.7.1.Gain Selection...................................................................................................... 12
2.8.2.Mux Selection....................................................................................................... 12
2.9.3.Power Down Selection ......................................................................................... 12
2.10. Power Supplies ............................................................................................................. 12
2.11.1.Analog Power Supplies ...................................................................................... 12
2.12.2.Digital Power Supplies ....................................................................................... 12
2.13. Connection Diagram ..................................................................................................... 13
3. PIN DESCRIPTION ................................................................................................................ 14
4. ORDERING INFORMATION ................................................................................................. 15
5. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION ........................... 15
6. PACKAGE DIMENSIONS ...................................................................................................... 16
LIST OF FIGURES
Figure 1. CS3302A Noise Performance.......................................................................................... 5
Figure 2. Digital Input Rise and Fall Times ..................................................................................... 8
Figure 3. System Architecture....................................................................................................... 10
Figure 4. System Architecture....................................................................................................... 11
Figure 5. CS3302A Amplifier Connections.................................................................................... 13
Figure 6. CS3302A Pin Assignments............................................................................................ 14
LIST OF TABLES
Table 1. Digital Selection for Gain and Input Mux Control ............................................................. 8
Table 2. Pin Descriptions ............................................................................................................. 14
2
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REVISION HISTORY
Revision
Date
PP1
NOV 2007
Changes
Initial release.
Contacting Cirrus Logic Support
For all product questions and inquiries contact a Cirrus Logic Sales Representative.
To find one nearest you go to www.cirrus.com
IMPORTANT NOTICE
"Preliminary" product information describes products that are in production, but for which full characterization data is not yet available.
Cirrus Logic, Inc. and its subsidiaries (“Cirrus”) believe that the information contained in this document is accurate and reliable. However, the information is subject
to change without notice and is provided “AS IS” without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant
information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale
supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus
for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third
parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights,
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or service marks of their respective owners.
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CS3302A
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1.
CS3302A
CHARACTERISTICS AND SPECIFICATIONS
•
Min/Max characteristics and specifications are guaranteed over the Specified Operating Conditions.
•
Typical performance characteristics and specifications are derived from measurements taken at nominal supply voltages and TA = 25°C.
•
GND = 0 V, all voltages with respect to 0 V.
•
Device connected as shown in Figure 5 on page 12 unless otherwise noted.
SPECIFIED OPERATING CONDITIONS
Parameter
Symbol
Min
Nom
Max
Unit
VA+
2.45
2.50
2.55
V
Bipolar Power Supplies
Positive Analog
+2%
Negative Analog
(Note 1) +2%
VA-
-2.55
-2.50
-2.45
V
Positive Digital
(Note 2) +3%
VD
3.20
3.30
3.40
V
Industrial (-IS, -ISZ)
TA
-40
25
85
°C
Thermal
Ambient Operating Temperature
Notes: 1. VA- must be the most negative voltage to avoid potential SCR latch-up conditions.
2. VD must conform to Digital Supply Differential under Absolute Maximum Ratings.
ABSOLUTE MAXIMUM RATINGS
CS3302A
Parameter
DC Power Supplies
Positive Analog
Negative Analog
Digital
Symbol
Min
Max
Unit
VA+
VAVD
-0.3
-6.8
-0.3
6.8
0.3
6.8
V
V
V
Analog Supply Differential
[(VA+) - (VA-)]
VADIFF
-
6.8
V
Digital Supply Differential
[(VD) - (VA-)]
VDDIFF
-
6.8
V
Input Current, Any Pin Except Supplies
(Note 3)
IIN
-
+10
mA
Input Current, Power Supplies
(Note 3)
IPWR
-
+50
mA
Output Current
(Note 3)
IOUT
-
+25
mA
PD
-
500
mW
VINA
(VA-)-0.5
(VA+)+0.5
V
Digital Input Voltages
VIND
-0.5
(VD)+0.5
V
Storage Temperature Range
TSTG
-65
150
ºC
Power Dissipation
Analog Input Voltages
WARNING: Operation at or beyond these limits may result in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
Notes: 3. Transient currents up to 100mA will not cause SCR latch-up.
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THERMAL CHARACTERISTICS
CS3302A
Parameter
Storage Temperature Range
Symbol
Min
Typ
Max
Unit
TSTR
-65
-
150
ºC
-
-
125
ºC
Allowable Junction Temperature
Junction to Ambient Thermal Impedance
ΘJA
-
65
-
ºC / W
Ambient Operating Temperature
TA
-40
-
+85
ºC
ANALOG CHARACTERISTICS
CS3302A
Parameter
Symbol
Min
Typ
Max
Unit
Noise Performance
Input Voltage Noise
f0 = 0.1 Hz to 10 Hz
VNPP
-
1
3
µVpp
Input Voltage Noise Density
f0 = 200 Hz to 2 kHz
VND
-
8.5
12
nV/ Hz
Input Current Noise Density
(Note 4)
IND
-
20
-
fA/ Hz
THD
-
-118
-119
-119
-119
-118
-115
-112
-112
-
dB
LIN
-
0.0001259
0.0001122
0.0001122
0.0001122
0.0001259
0.0001778
0.0002512
0.0002512
-
%
Distortion Performance
Total Harmonic Distortion (Note 5)
Linearity (Note 5)
x1
x2
x4
x8
x16
x32
x64
x1
x2
x4
x8
x16
x32
x64
Notes: 4. Guaranteed by design and/or characterization.
5. Tested with a 31.25 Hz sine wave at -1 dB amplitude.
CS3302A Wide Band Noise
CS3302A In-Band Noise
300
20
250
15
10
5
0
0
200
400
600
800 1000 1200 1400 1600 1800 2000
Noise Density (nV/rtHz)
Noise Density (nV/rtHz)
200
150
100
50
0
0.1
1
Frequency (Hz)
10
100
1000
10000 100000 1E+06
Frequency (Hz)
Figure 1. CS3302A Noise Performance
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ANALOG CHARACTERISTICS (CONT.)
CS3302A
Parameter
Symbol
Min
Typ
Max
GAIN
x1
-
x64
Unit
Gain
Gain, Differential
Gain, Common Mode
(Note 6)
GAINCM
-
x1
-
Gain Accuracy, Absolute
(Note 7)
GAINABS
-
±1
±2
-0.4
-
-0.2
-0.2
-0.2
-0.2
-0.2
-0.2
0
-
Gain Accuracy, Relative (Note 8)
Gain Drift
x2
x4
x8
x16
x32
x64
LIN
%
%
(Note 4, 9)
GAINTC
-
5
-
ppm / ºC
Offset Voltage, Input Referred
(Note 10)
OFST
-
+250
+750
µV
Offset After Calibration, Absolute
(Note 11) OFSTCAL
-
+1
-
µV
Offset Calibration Range
(Note 12) OFSTRNG
-
100
-
% F.S.
-
1
-
µV / ºC
Offset
Offset Voltage Drift
(Note 4, 9)
OFSTTC
Notes: 6. Common mode signals pass unchanged through the differential amplifier architecture and are rejected
by the CS5371A / 72A / 73A modulator CMRR.
7. Absolute gain accuracy tests the matching of x1 gain across multiple CS3302A devices.
8. Relative gain accuracy tests the tracking of x1,x2, x4,x16,x32,x64 gain relative to x1 gain on a single
CS3302A device.
9. Specification is for the parameter over the specified temperature range and is for the CS3302A device
only. It does not include the effects of external components.
10. Offset voltage is tested with the amplifier inputs connected to the internal 800Ω termination.
11. The absolute offset after calibration specification applies to the effective offset voltage of the CS3302A
output when used with the CS5371A / 72A / 73A modulator and the CS5376A / 78 digital filter, and is
measured from the digitally calibrated output codes of the CS5376A / 78.
12. The CS3302A offset calibration is performed digitally with the CS5371A / 72A / 73A modulator and
CS5376A / 78 digital filter and includes the full scale signal range. Calibration offsets of greater than +
5% of full scale will begin to subtract from system dynamic range.
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ANALOG CHARACTERISTIC (Cont.)
CS3302A
Parameter
Symbol
Min
Typ
Max
Unit
BW
DC
-
2000
Hz
VIN
(VA-)+0.7
(VA-)+0.7
-
(VA+)-1.25
(VA+)-1.75
V
VINFS
-
-
5
2.5
1.25
625
312.5
156.25
78.125
Vp-p
Vp-p
Vp-p
mVp-p
mVp-p
mVp-p
mVp-p
Input Impedance, Differential
ZINDIFF
-
1, 20
-
TΩ, pF
Input Impedance, Common Mode
ZINCM
-
0.5, 40
-
TΩ, pF
IIN
-
1
40
pA
XT
-
-130
-
dB
CDMR
90
100
-
dB
Vpp
Analog Input Characteristics
Input Signal Frequencies
Input Voltage Range (Signal + Vcm)
Full Scale Input, Differential
x1
x2 - x64
x1
x2
x4
x8
x16
x32
x64
Input Bias Current
Crosstalk, Multiplexed Inputs
Common to Differential Mode Rejection
(Note 4)
(Note 4, 13)
Analog Output Characteristics
Full Scale Output, Differential
VOUT
-
-
5
Output Voltage Range (Signal + Vcm)
V
VRNG
(VA-)+0.5
-
(VA+)-0.5
Output Impedance
(Note 14)
ZOUT
-
40
-
Ω
Output Impedance Drift
(Note 14)
ZTC
-
0.38
-
Ω/°C
IOUT
-
-
+25
mA
CL
-
-
100
nF
Guard Output Voltage
VGUARD
-
Vcm
-
V
Guard Output Impedance
ZGOUT
-
500
-
Ω
Guard Output Current
IGOUT
-
40
-
µA
CGL
-
-
100
pF
Output Current
Load Capacitance
Guard Output Characteristics
Guard Load Capacitance
Notes: 13. Ratio of common mode input amplitude vs. differential mode output amplitude for a perfectly matched
common mode input signal. Characterized with a 50 Hz, 500 mVpeak common mode sine wave applied
to the analog inputs.
14. Output impedance characteristics are approximate and can vary up to +/- 30% depending on process
parameters.
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DIGITAL CHARACTERISTICS
CS3302A
Parameter
Symbol
Min
Typ
Max
Unit
-
VD
V
Digital Characteristics
High-level Input Drive Voltage
(Note 15)
VIH
0.6*VD
Low-level Input Drive Voltage
(Note 15)
VIL
0.0
-
0.8
V
Input Leakage Current
IIN
-
+1
+10
µA
Digital Input Capacitance
CIN
-
9
-
pF
Rise Times
tRISE
-
-
100
ns
Fall Times
tFALL
-
-
100
ns
Notes: 15. Device is intended to be driven with CMOS logic levels.
t rise
t fall
0.9 * VD
0.1 * VD
Figure 2. Digital Input Rise and Fall Times
Input Selection
MUX1
MUX0
Gain Selection
GAIN2
GAIN1
GAIN0
800 Ω termination
0
0
x1
0
0
0
INA only
1
0
x2
0
0
1
INB only
0
1
x4
0
1
0
INA + INB
1
1
x8
0
1
1
x16
1
0
0
x32
1
0
1
x64
1
1
0
Reserved
1
1
1
Table 1. Digital Selection for Gain and Input Mux Control
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POWER SUPPLY CHARACTERISTICS
CS3302A
Parameter
Symbol
Min
Typ
Max
Unit
Power Supply Current, Normal Mode
Analog Power Supply Current
(Note 16)
IA
-
5.0
5.75
mA
Digital Power Supply Current
(Note 16)
ID
-
0.1
0.2
mA
Analog Power Supply Current, PWDN = 1
(Note 16)
IA
-
9
11
µA
Digital Power Supply Current, PWDN = 1
(Note 16)
ID
-
2
8
µA
PSRR
95
120
-
dB
Power Supply Current, Power Down Mode
Power Supply Rejection
Power Supply Rejection Ratio
(Note 4, 17)
Notes: 16. All outputs unloaded. Analog inputs connected to the internal 800 Ω termination. Digital inputs forced
to VD or GND respectively.
17. Power supply rejection characterized with a 50 Hz, 400 mVpp sine wave applied separately to each
supply.
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CS3302A
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2.
CS3302A
GENERAL DESCRIPTION
The CS3302A is a high-impedance, low-noise
CMOS differential input, differential output amplifier for precision analog signals between DC and
2 kHz. It has multiplexed inputs, rough/fine charge
outputs, and programmable gains of x1, x2, x4, x8,
x16, x32, and x64.
The performance of this amplifier makes it ideal
for low-frequency, high-dynamic-range applications requiring low distortion and minimal power
consumption. It is optimized for use in acquisition
systems designed around the CS5371A/72A single/dual ∆Σ modulators and the CS5376A quad
digital filter or the CS5373A ∆Σ modulator and
CS5378 digital filter. Figure 3 shows the systemlevel architecture of a 4-channel acquisition system
using four CS3302A, two CS5372A, one
CS4373A, and one CS5376A. Figure 4 shows the
Geophone
or
Hydrophone
Sensor
Geophone
or
Hydrophone
Sensor
M
U
X
M
U
X
system architecture of a single channel acquisition
system using a CS3302A, CS5373A, and CS5378.
2.1
Analog Signals
2.1.1
Analog Inputs
The amplifier analog inputs are designed for highimpedance differential sensors. Input multiplexing
simplifies system connections by providing separate inputs for a sensor and test DAC (INA, INB) as
well as an internal termination for noise tests. The
MUX0, MUX1 digital pins determine which multiplexed input is connected to the amplifier.
2.1.2
Analog Outputs
The amplifier analog outputs are separated into rough
charge / fine charge signals to easily connect to the
CS5371A/72A/73A inputs. Each differential output
CS3301A
CS3302A
CS5371A
CS5372A
AMP
CS3301A
CS3302A
System Telemetry
∆Σ
Modulator
AMP
CS5376A
µController
or
Configuration
EEPROM
Digital Filter
Geophone
or
Hydrophone
Sensor
Geophone
or
Hydrophone
Sensor
M
U
X
M
U
X
CS3301A
CS3302A
CS5371A
CS5372A
AMP
CS3301A
CS3302A
Communication
Interface
∆Σ
Modulator
AMP
CS4373A
Switch
Switch
MUX
MUX
Test
DAC
Figure 3. System Architecture
10
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CS3302A
DS765PP1
CS3302A
CS5373A
Differential
Sensor
CS3301A
CS3302A
M
U
X
AMP
CS5378
∆Σ
Modulator
µController
or
Configuration
EEPROM
Digital Filter
System
Telemetry
Test
DAC
Figure 4. System Architecture
requires two series resistors and a differential capacitor to create the modulator anti-alias RC filter.
2.1.3
Differential Signals
Analog signals into and out of the CS3302A are
differential, consisting of two halves with equal but
opposite magnitude varying about a common mode
voltage.
A full scale 5 Vpp differential signal centered on a
-0.15 V common mode can have:
SIG+ = -0.15 V + 1.25 V = 1.1 V
SIG- = -0.15 V - 1.25 V = -1.4 V
SIG+ is +2.5 V relative to SIGFor the reverse case:
SIG+ = -0.15 V - 1.25 V = -1.4 V
SIG- = -0.15 V + 1.25 V = 1.1 V
SIG+ is -2.5 V relative to SIGThe total swing for SIG+ relative to SIG- is
(+2.5 V) - (-2.5 V) = 5 Vpp. A similar calculation
can be done for SIG- relative to SIG+. Note that a
5 Vpp differential signal centered on a -0.15 V
common mode voltage never exceeds 1.1 V and
never drops below -1.4 V on either half of the signal.
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By definition, differential voltages are to be measured with respect to the opposite half, not relative
to ground. A multimeter differentially measuring
between SIG+ and SIG- in the above example
would properly read 1.767 Vrms, or 5 Vpp.
2.1.4
Guard Output
The GUARD pin outputs the common mode voltage of the currently selected analog signal input. It
can be used to drive the cable shield between a
high-impedance sensor and the amplifier inputs.
Driving the cable shield with the analog signal
common mode voltage minimizes leakage and improves signal integrity from high-impedance sensors.
The GUARD output is defined as the midpoint
voltage between the + and - halves of the currently
selected differential input signal, and will vary as
the signal common mode varies. The GUARD output will not drive a significant load, it only provides a shielding voltage.
2.2
Digital Signals
2.2.1
Gain Selection
The CS3302A supports gain ranges of x1, x2, x4,
x8, x16, x32, and x64. They are selected using the
GAIN0, GAIN1, and GAIN2 pins as shown in
Table 1 on page 8.
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CS3302A
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2.2.2
Mux Selection
The analog inputs to the amplifier are multiplexed,
with external signals applied to the INA+, INA- or
INB+, INB- pins. An internal termination is also
available for noise tests. Input mux selection is
made using the MUX0 and MUX1 pins as shown
in Table 1 on page 8.
Although a mux selection is provided to enable the
INA and INB switches simultaneously, significant
current should not be driven through them in this
mode. The CS3302A mux switches will maintain
good linearity only with minimal signal current.
2.2.3
Power Down Selection
A power-down mode is available to shut down the
amplifier when not in use. When enabled, all internal circuitry is disabled, the analog inputs and outputs go high-impedance, and the device enters a
micro-power state. Power down mode is selected
using the PWDN pin, which is active high.
12
2.3
2.3.1
CS3302A
Power Supplies
Analog Power Supplies
The analog power pins of the CS3302A are to be
supplied with a total of 5 V between VA+ and VA. This voltage is typically from a bipolar ±2.5 V
supply. When using bipolar supplies the analog
signal common mode voltage should be biased to 0
V. The analog power supplies are recommended to
be bypassed to system ground using 0.1 µF X7R
type capacitors.
The VA- supply is connected to the CMOS substrate and as such must remain the most negative
applied voltage to prevent potential latch-up conditions. It is recommended to clamp the VA- supply
to system ground using a reverse biased Schottky
diode to prevent possible latch-up conditions related to mismatched supply rail initialization.
2.3.2
Digital Power Supplies
The digital power supply across the VD and GND
pins is specified for a +3.3 V power supply. The
digital power supply should be bypassed to system
ground using a 0.01 µF X7R type capacitor.
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2.4
Connection Diagram
Figure 5 shows a connection diagram for the CS3302A amplifier when used with the CS5372A dual ∆Σ
modulator, the CS4373A test DAC and the CS5376A digital filter. The diagram shows differential sensors,
a test DAC, and analog outputs with anti-alias capacitors; power supply connections including recommended bypassing; and digital control connections back to the CS5376A GPIO pins.
GPIO (x3)
GPIO (x2)
GPIO
3
2
To CS5376A
Digital Control
A
GAIN
MUX
PWDN
VA+
VD
VA+
VA+
VD
0.1 µF
0.01 µF
VD
0.1 µF
CS3302A
Differential
Amplifier
0.01 µF
VA+
VAVA0.1 µF
INA+
VD
GND
INA-
GUARD INB-
INB+ OUTR-
OUTF-
OUTF+
MDATA1
MFLAG1
PWDN1
OUTR+
680 Ω
680 Ω
INR+
INF+
0.02 µF
C0G
0.02µF
C0G
680 Ω
INFINR-
Differential
Sensor
MCLK
MSYNC
680 Ω
VREF+
CS4373A
Test
DAC
2.5 V
Reference
CS5372A
∆Σ Modulator
VREF-
Differential
Sensor
LPWR
OFST
680 Ω
INRINF-
680 Ω
0.02 µF
C0G
680 Ω
0.02 µF
C0G
INF+
INR+
680 Ω
INA+
INA-
GUARD INB-
INB+ OUTR-
OUTF-
OUTF+
MDATA2
MFLAG2
PWDN2
OUTR+
VA+
VD
VA+
VD
VA-
0.1 µF
CS3302A
Differential
Amplifier
0.01 µF
VAVA0.1 µF
MUX
VA0.1µF
GND
GAIN
GND
PWDN
A
2
3
GPIO
GPIO (x2)
GPIO (x3)
To CS5376A
Digital Control
Figure 5. CS3302A Amplifier Connections
DS765PP1
13
CS3302A
DS765PP1
3.
CS3302A
PIN DESCRIPTION
Pin Name
Pin #
I/O
VA+
1
I
Positive analog supply voltage.
VA-
4
I
Negative analog supply voltage.
VD
16
I
Positive digital supply voltage.
Pin Description
15, 18
I
Ground.
INA+, INA-
5, 6
I
Channel A differential analog inputs. Selected via MUX pins.
INB+, INB-
8, 7
I
Channel B differential analog inputs. Selected via MUX pins.
13
O
Guard voltage output.
GND
GUARD
OUTR+, OUTR-
11, 2
O
Rough charge differential analog outputs.
OUTF+, OUTF-
10, 3
O
Fine charge differential analog outputs.
GAIN0, GAIN1,
GAIN2
22, 21,
20
I
Gain range select. See Gain Selection table in Digital Characteristics section.
19
I
Power down mode enable. Active high.
24, 23
I
Analog input select. See Input Selection table in Digital Characteristics section.
12
I
17, 14
I
Test mode select, factory use only. Connect to VA- during normal operation.
Test mode select, factory use only. Connect to GND during normal operation.
9
O
Test mode output, factory use only. Do not connect during normal operation.
PWDN
MUX0, MUX1
TEST0
TEST1, TEST2
TESTOUT
Table 2. Pin Descriptions
Positive Analog Power Supply
VA+
1
24
MUX0
Input Mux Select
Negative Analog Rough Output
OUTR-
2
23
MUX1
Input Mux Select
Negative Analog Fine Output
OUTF-
3
22
GAIN0
Gain Range Select
Negative Analog Power Supply
VA-
4
21
GAIN1
Gain Range Select
Non-Inverting Input A
INA+
5
20
GAIN2
Gain Range Select
Inverting Input A
INA-
6
19
PWDN
Power Down Mode Enable
Inverting Input B
INB-
7
18
GND
Ground
Non-Inverting Input B
INB+
8
17
TEST1
Test Mode Select
Test Mode Output
TESTOUT
9
16
VD
Positive Digital Power Supply
Positive Analog Fine Output
OUTF+
10
15
GND
Ground
Positive Analog Rough Output
OUTR+
11
14
TEST2
Test Mode Select
Test Mode Select
TEST0
12
13
GUARD
Guard Voltage Output
Figure 6. CS3302A Pin Assignments
14
DS765PP1
CS3302A
DS765PP1
4.
ORDERING INFORMATION
Model
CS3302A-IS
CS3302A-ISZ, lead (Pb) free
5.
CS3302A
Temperature
Package
-40 to +85 °C
24-pin SSOP
ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION
Model Number
Peak Reflow Temp
MSL Rating*
Max Floor Life
CS3302A-IS
240 °C
2
365 Days
CS3302A-ISZ, lead (Pb) free
260 °C
3
7 Days
* MSL (Moisture Sensitivity Level) as specified by IPC/JEDEC J-STD-020.
DS765PP1
15
CS3302A
DS765PP1
6.
CS3302A
PACKAGE DIMENSIONS
24 PIN SSOP PACKAGE DRAWING
N
D
E11
A2
E
b2
e
SIDE VIEW
A
A1
L
END VIEW
SEATING
PLANE
1 2 3
TOP VIEW
INCHES
DIM
A
A1
A2
b
D
E
E1
e
L
∝
MIN
-0.002
0.064
0.009
0.311
0.291
0.197
0.024
0.025
0°
MAX
0.084
0.010
0.074
0.015
0.335
0.323
0.220
0.027
0.040
8°
MILLIMETERS
MIN
MAX
-2.13
0.05
0.25
1.62
1.88
0.22
0.38
7.90
8.50
7.40
8.20
5.00
5.60
0.61
0.69
0.63
1.03
0°
8°
NOTE
2,3
1
1
Notes: 1. “D” and “E1” are reference datums and do not included mold flash or protrusions, but do include mold
mismatch and are measured at the parting line, mold flash or protrusions shall not exceed 0.20 mm per
side.
2. Dimension “b” does not include dambar protrusion/intrusion. Allowable dambar protrusion shall be
0.13 mm total in excess of “b” dimension at maximum material condition. Dambar intrusion shall not
reduce dimension “b” by more than 0.07 mm at least material condition.
3. These dimensions apply to the flat section of the lead between 0.10 and 0.25 mm from lead tips.
16
DS765PP1
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