MICROCHIP 93AA66CTIPG

93AA66A/B/C, 93LC66A/B/C,
93C66A/B/C
4K Microwire Compatible Serial EEPROM
Device Selection Table
Part Number
VCC Range
ORG Pin
Word Size
Temp Ranges
Packages
93AA66A
1.8-5.5
No
8-bit
I
P, SN, ST, MS, OT
93AA66B
1.8-5-5
No
16-bit
I
P, SN, ST, MS, OT
93LC66A
2.5-5.5
No
8-bit
I, E
P, SN, ST, MS, OT
93LC66B
2.5-5.5
No
16-bit
I, E
P, SN, ST, MS, OT
93C66A
4.5-5.5
No
8-bit
I, E
P, SN, ST, MS, OT
93C66B
4.5-5.5
No
16-bit
I, E
P, SN, ST, MS, OT
93AA66C
1.8-5.5
Yes
8 or 16-bit
I
P, SN, ST, MS
93LC66C
2.5-5.5
Yes
8 or 16-bit
I, E
P, SN, ST, MS
93C66C
4.5-5.5
Yes
8 or 16-bit
I, E
P, SN, ST, MS
Features
Description
•
•
•
•
The Microchip Technology Inc. 93XX66A/B/C devices
are 4K bit low voltage serial Electrically Erasable
PROMs (EEPROM). Word-selectable devices such as
the 93AA66C, 93LC66C or 93C66C are dependent
upon external logic levels driving the ORG pin to set
word size. For dedicated 8-bit communication, the
93AA66A, 93LC66A or 93C66A devices are available,
while the 93AA66B, 93LC66B and 93C66B devices
provide dedicated 16-bit communication. Advanced
CMOS technology makes these devices ideal for low
power, non-volatile memory applications. The entire
93XX Series is available in standard packages including 8-lead PDIP and SOIC, and advanced packaging
including 8-lead MSOP, 6-lead SOT-23, and 8-lead
TSSOP. Pb-free (Pure Matte Sn) finish is also
available.
•
•
•
•
•
•
•
•
•
Low-power CMOS technology
ORG pin to select word size for ‘66C version
512 x 8-bit organization ‘A’ ver. devices (no ORG)
256 x 16-bit organization ‘B’ ver. devices (no
ORG)
Self-timed ERASE/WRITE cycles (including
auto-erase)
Automatic ERAL before WRAL
Power on/off data protection circuitry
Industry standard 3-wire serial I/O
Device Status signal (READY/BUSY)
Sequential READ function
1,000,000 E/W cycles
Data retention > 200 years
Temperature ranges supported:
- Industrial (I)
-40°C to +85°C
- Automotive (E)
-40°C to +125°C
Package Types (not to scale)
ROTATED SOIC
(ex: 93LC66BX)
Pin Function Table
NC
Name
Function
CS
Chip Select
CLK
Serial Data Clock
DI
Serial Data Input
DO
Serial Data Output
VSS
Ground
NC
No internal connection
ORG
Memory Configuration
VCC
Power Supply
 2003 Microchip Technology Inc.
PDIP/SOIC
(P, SN)
VCC
1
2
8
7
ORG*
VSS
CS
3
6
CLK
4
5
CS
CLK
1
2
8
7
VCC
NC
DO
DI
3
6
ORG*
DI
DO
4
5
VSS
TSSOP/MSOP
(ST, MS)
CS
CLK
DI
DO
1
2
3
4
8
7
6
5
SOT-23
(OT)
VCC
NC
ORG*
VSS
DO
1
6
VCC
VSS
2
5
CS
DI
3
4
CLK
* ORG pin is NC on A/B devices
DS21795B-page 1
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings(†)
VCC .............................................................................................................................................................................7.0V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied ................................................................................................-40°C to +125°C
ESD protection on all pins ......................................................................................................................................................≥ 4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.
TABLE 1-1:
DC CHARACTERISTICS
All parameters apply over the specified
ranges unless otherwise noted.
Param.
Symbol
No.
Parameter
VCC = range by device (see Table on Page 1)
Industrial (I):
TA = -40°C to +85°C
Automotive (E): TA = -40°C to +125°C
Min
Typ
Max
Units
Conditions
D1
VIH1
VIH2
High-level input voltage
2.0
0.7 VCC
—
—
VCC +1
VCC +1
V
V
VCC ≥ 2.7V
VCC < 2.7V
D2
VIL1
VIL2
Low-level input voltage
-0.3
-0.3
—
—
0.8
0.2 VCC
V
V
VCC ≥ 2.7V
VCC < 2.7V
D3
VOL1
VOL2
Low-level output voltage
—
—
—
—
0.4
0.2
V
V
IOL = 2.1 mA, VCC = 4.5V
IOL = 100 µA, VCC = 2.5V
D4
VOH1
VOH2
High-level output voltage
2.4
VCC - 0.2
—
—
—
—
V
V
IOH = -400 µA, VCC = 4.5V
IOH = -100 µA, VCC = 2.5V
D5
ILI
Input leakage current
—
—
±1
µA
VIN = VSS to VCC
D6
ILO
Output leakage current
—
—
±1
µA
VOUT = VSS to VCC
D7
CIN,
COUT
Pin capacitance (all inputs/
outputs)
—
—
7
pF
VIN/VOUT = 0V (Note 1)
TA = 25°C, FCLK = 1 MHz
D8
ICC write Write current
—
—
—
500
2
—
mA
µA
FCLK = 3 MHz, Vcc = 5.5V
FCLK = 2 MHz, Vcc = 2.5V
D9
ICC read Read current
—
—
—
—
—
100
1
500
—
mA
µA
µA
FCLK = 3 MHz, VCC = 5.5V
FCLK = 2 MHz, VCC = 3.0V
FCLK = 2 MHz, VCC = 2.5V
D10
ICCS
Standby current
—
—
—
—
1
5
µA
µA
I – Temp
E – Temp
CLK = Cs = 0V
ORG = DI = VSS or VCC
(Note 2) (Note 3)
D11
VPOR
VCC voltage detect
93AA66A/B/C, 93LC66A/B/C
93C66A/B/C
—
—
1.5V
3.8V
—
—
V
V
(Note 1)
Note 1:
2:
3:
This parameter is periodically sampled and not 100% tested.
ORG pin not available on ‘A’ or ‘B’ versions.
READY/BUSY status must be cleared from DO, see Section 3.4 "Data Out (DO)".
DS21795B-page 2
 2003 Microchip Technology Inc.
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
TABLE 1-2:
AC CHARACTERISTICS
All parameters apply over the specified
ranges unless otherwise noted.
Param.
Symbol
No.
Parameter
VCC = range by device (see Table on Page 1)
Industrial (I):
TA = -40°C to +85°C
Automotive (E): TA = -40°C to +125°C
Min
Max
Units
Conditions
A1
FCLK
Clock frequency
—
3
2
1
MHz
MHz
MHz
4.5V ≤ VCC < 5.5V, 93XX66C only
2.5V ≤ VCC < 5.5V
1.8V ≤ VCC < 2.5V
A2
TCKH
Clock high time
200
250
450
—
ns
ns
ns
4.5V ≤ VCC < 5.5V, 93XX66C only
2.5V ≤ VCC < 5.5V
1.8V ≤ VCC < 2.5V
A3
TCKL
Clock low time
100
200
450
—
ns
ns
ns
4.5V ≤ VCC < 5.5V, 93XX66C only
2.5V ≤ VCC < 5.5V
1.8V ≤ VCC < 2.5V
A4
TCSS
Chip Select setup time
50
100
250
—
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
A5
TCSH
Chip Select hold time
0
—
ns
1.8V ≤ VCC < 5.5V
A6
TCSL
Chip Select low time
250
—
ns
1.8V ≤ VCC < 5.5V
A7
TDIS
Data input setup time
50
100
250
—
ns
ns
ns
4.5V ≤ VCC < 5.5V, 93XX66C only
2.5V ≤ VCC < 5.5V
1.8V ≤ VCC < 2.5V
A8
TDIH
Data input hold time
50
100
250
—
ns
ns
ns
4.5V ≤ VCC < 5.5V, 93XX66C only
2.5V ≤ VCC < 5.5V
1.8V ≤ VCC < 2.5V
A9
TPD
Data output delay time
—
200
250
400
ns
ns
ns
4.5V ≤ VCC < 5.5V, CL = 100 pF
2.5V ≤ VCC < 4.5V, CL = 100 pF
1.8V ≤ VCC < 2.5V, CL = 100 pF
A10
TCZ
Data output disable time
—
100
200
ns
ns
4.5V ≤ VCC < 5.5V, (Note 1)
1.8V ≤ VCC < 4.5V, (Note 1)
A11
TSV
Status valid time
—
200
300
500
ns
ns
ns
4.5V ≤ VCC < 5.5V, CL = 100 pF
2.5V ≤ VCC < 4.5V, CL = 100 pF
1.8V ≤ VCC < 2.5V, CL = 100 pF
A12
TWC
Program cycle time
—
6
ms
Erase/Write mode (AA and LC versions)
A13
TWC
—
2
ms
Erase/Write mode
(93C versions)
A14
TEC
—
6
ms
ERAL mode, 4.5V ≤ VCC ≤ 5.5V
A15
TWL
—
15
ms
WRAL mode, 4.5V ≤ VCC ≤ 5.5V
A16
—
1M
—
Note 1:
2:
Endurance
cycles 25°C, VCC = 5.0V, (Note 2)
This parameter is periodically sampled and not 100% tested.
This application is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which may be obtained from
www.microchip.com.
 2003 Microchip Technology Inc.
DS21795B-page 3
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
FIGURE 1-1:
CS
SYNCHRONOUS DATA TIMING
VIH
TCSS
VIL
TCKH
TCKL
TCSH
VIH
CLK
VIL
TDIS
TDIH
VIH
DI
VIL
TPD
TPD
DO
(READ)
VOH
VOL
TCZ
TSV
DO VOH
(PROGRAM)
VOL
Note:
TCZ
STATUS VALID
TSV is relative to CS.
TABLE 1-3: INSTRUCTION SET FOR X 16 ORGANIZATION (93XX66B OR 93XX66C WITH ORG = 1)
Instruction
SB
Opcode
Address
Data In
Data Out
Req. CLK Cycles
ERASE
1
11
A7 A6 A5 A4 A3 A2 A1 A0
—
(RDY/BSY)
11
ERAL
1
00
1
0
X
X
X
X
X
X
—
(RDY/BSY)
11
EWDS
1
00
0
0
X
X
X
X
X
X
—
HIGH-Z
11
EWEN
1
00
1
1
X
X
X
X
X
X
—
HIGH-Z
11
READ
1
10
A7 A6 A5 A4 A3 A2 A1 A0
—
D15 – D0
27
WRITE
1
01
A7 A6 A5 A4 A3 A2 A1 A0
D15 – D0
(RDY/BSY)
27
WRAL
1
00
D15 – D0
(RDY/BSY)
27
0
1
X
X
X
X
X
X
TABLE 1-4: INSTRUCTION SET FOR X 8 ORGANIZATION (93XX66A OR 93XX66C WITH ORG = 0)
SB
Opcode
Address
Data In
Data Out
Req. CLK
Cycles
ERASE
1
11
A8 A7 A6 A5 A4 A3 A2 A1 A0
—
(RDY/BSY)
12
ERAL
1
00
1
0
X
X
X
X
X
X
X
—
(RDY/BSY)
12
EWDS
1
00
0
0
X
X
X
X
X
X
X
—
HIGH-Z
12
EWEN
1
00
1
1
X
X
X
X
X
X
X
—
HIGH-Z
12
READ
1
10
A8 A7 A6 A5 A4 A3 A2 A1 A0
—
D7 – D0
20
WRITE
1
01
A8 A7 A6 A5 A4 A3 A2 A1 A0
D7 – D0
(RDY/BSY)
20
WRAL
1
00
D7 – D0
(RDY/BSY)
20
Instruction
DS21795B-page 4
0
1
X
X
X
X
X
X
X
 2003 Microchip Technology Inc.
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
2.0
FUNCTIONAL DESCRIPTION
2.2
Data In/Data Out (DI/DO)
When the ORG* pin is connected to VCC, the (x16)
organization is selected. When it is connected to
ground, the (x8) organization is selected. Instructions,
addresses and write data are clocked into the DI pin on
the rising edge of the clock (CLK). The DO pin is
normally held in a HIGH-Z state except when reading
data from the device, or when checking the READY/
BUSY status during a programming operation. The
READY/BUSY status can be verified during an Erase/
Write operation by polling the DO pin; DO low indicates
that programming is still in progress, while DO high
indicates the device is ready. DO will enter the HIGH-Z
state on the falling edge of CS.
It is possible to connect the Data In and Data Out pins
together. However, with this configuration it is possible
for a “bus conflict” to occur during the “dummy zero”
that precedes the Read operation, if A0 is a logic high
level. Under such a condition the voltage level seen at
Data Out is undefined and will depend upon the relative
impedances of Data Out and the signal source driving
A0. The higher the current sourcing capability of A0,
the higher the voltage at the Data Out pin. In order to
limit this current, a resistor should be connected
between DI and DO.
2.1
All modes of operation are inhibited when VCC is below
a typical voltage of 1.5V for '93AA' and '93LC' devices
or 3.8V for '93C' devices.
Start Condition
The Start bit is detected by the device if CS and DI are
both high with respect to the positive edge of CLK for
the first time.
Before a Start condition is detected, CS, CLK, and DI
may change in any combination (except to that of a
Start condition), without resulting in any device
operation (READ, WRITE, ERASE, EWEN, EWDS,
ERAL, or WRAL). As soon as CS is high, the device is
no longer in Standby mode.
An instruction following a Start condition will only be
executed if the required opcode, address and data bits
for any particular instruction are clocked in.
2.3
Data Protection
The EWEN and EWDS commands give additional
protection against accidentally programming during
normal operation.
Note:
For added protection, an EWDS command
should be performed after every write
operation.
After power-up, the device is automatically in the
EWDS mode. Therefore, an EWEN instruction must be
performed before the initial ERASE or WRITE instruction
can be executed.
Block Diagram
VCC
VSS
Memory
Array
Address
Decoder
Address
Counter
Data Register
Output
Buffer
DO
DI
ORG*
CS
CLK
Mode
Decode
Logic
Clock
Register
*ORG input is not available on A/B devices
 2003 Microchip Technology Inc.
DS21795B-page 5
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
2.4
ERASE
The DO pin indicates the READY/BUSY status of the
device if CS is brought high after a minimum of 250 ns
low (TCSL). DO at logical ‘0’ indicates that programming
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been erased and
the device is ready for another instruction.
The ERASE instruction forces all data bits of the specified address to the logical ‘1’ state. CS is brought low
following the loading of the last address bit. This falling
edge of the CS pin initiates the self-timed programming cycle, except on ‘93C’ devices where the rising
edge of CLK before the last address bit initiates the
write cycle.
FIGURE 2-1:
Note:
Issuing a Start bit and then taking CS low
will clear the READY/BUSY status from
DO.
ERASE TIMING FOR 93AA AND 93LC DEVICES
TCSL
CS
CHECK STATUS
CLK
1
DI
1
1
AN
AN-1
AN-2
•••
A0
TSV
DO
HIGH-Z
TCZ
BUSY
READY
HIGH-Z
TWC
FIGURE 2-2:
ERASE TIMING FOR 93C DEVICES
TCSL
CS
CHECK STATUS
CLK
1
DI
1
1
AN
AN-1
AN-2
•••
A0
TSV
DO
HIGH-Z
BUSY
TCZ
READY
HIGH-Z
TWC
DS21795B-page 6
 2003 Microchip Technology Inc.
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
2.5
ERASE ALL (ERAL)
The DO pin indicates the READY/BUSY status of the
device, if CS is brought high after a minimum of 250 ns
low (TCSL).
The Erase All (ERAL) instruction will erase the entire
memory array to the logical ‘1’ state. The ERAL cycle is
identical to the ERASE cycle, except for the different
opcode. The ERAL cycle is completely self-timed and
commences at the falling edge of the CS, except on
‘93C’ devices where the rising edge of CLK before the
last data bit initiates the write cycle. Clocking of the
CLK pin is not necessary after the device has entered
the ERAL cycle.
FIGURE 2-3:
Note:
Issuing a Start bit and then taking CS low
will clear the READY/BUSY status from
DO.
VCC must be ≥ 4.5V for proper operation of ERAL.
ERAL TIMING FOR 93AA AND 93LC DEVICES
TCSL
CS
CHECK STATUS
CLK
1
DI
0
0
1
0
X
•••
X
TSV
DO
HIGH-Z
BUSY
TCZ
READY
HIGH-Z
VCC must be ≥ 4.5V for proper operation of ERAL.
TEC
FIGURE 2-4:
ERAL TIMING FOR 93C DEVICES
TCSL
CS
CHECK STATUS
CLK
1
DI
0
0
1
0
X
•••
X
TSV
DO
HIGH-Z
BUSY
TCZ
READY
HIGH-Z
TEC
 2003 Microchip Technology Inc.
DS21795B-page 7
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
2.6
ERASE/WRITE DISABLE And ENABLE (EWDS/EWEN)
The 93XX66A/B/C powers up in the ERASE/WRITE
Disable (EWDS) state. All Programming modes must be
preceded by an ERASE/WRITE Enable (EWEN) instruction. Once the EWEN instruction is executed, programming remains enabled until an EWDS instruction is
executed or Vcc is removed from the device.
FIGURE 2-5:
To protect against accidental data disturbance, the
EWDS instruction can be used to disable all ERASE/
WRITE functions and should follow all programming
operations. Execution of a READ instruction is independent of both the EWEN and EWDS instructions.
EWDS TIMING
TCSL
CS
CLK
1
DI
FIGURE 2-6:
0
0
0
0
•••
X
X
EWEN TIMING
TCSL
CS
CLK
1
DI
2.7
0
0
1
1
•••
X
READ
devices) output string. The output data bits will toggle on
the rising edge of the CLK and are stable after the
specified time delay (TPD). Sequential read is possible
when CS is held high. The memory data will automatically cycle to the next register and output sequentially.
The READ instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit precedes the 8-bit (If ORG pin is low or A-Version
devices) or 16-bit (If ORG pin is high or B-version
FIGURE 2-7:
X
READ TIMING
CS
CLK
DI
DO
DS21795B-page 8
1
HIGH-Z
1
0
An
•••
A0
0
Dx
•••
D0
Dx
•••
D0
Dx
•••
D0
 2003 Microchip Technology Inc.
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
2.8
WRITE
The DO pin indicates the READY/BUSY status of the
device, if CS is brought high after a minimum of 250 ns
low (TCSL). DO at logical ‘0’ indicates that programming
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been written with
the data specified and the device is ready for another
instruction.
The WRITE instruction is followed by 8 bits (If ORG is
low or A-version devices) or 16 bits (If ORG pin is high
or B-version devices) of data which are written into the
specified address. For 93AA66A/B/C and 93LC66A/B/C
devices, after the last data bit is clocked into DI, the
falling edge of CS initiates the self-timed auto-erase and
programming cycle. For 93C66A/B/C devices, the selftimed auto-erase and programming cycle is initiated by
the rising edge of CLK on the last data bit.
FIGURE 2-8:
Note:
Issuing a Start bit and then taking CS low
will clear the READY/BUSY status from
DO.
WRITE TIMING FOR 93AA AND 93LC DEVICES
TCSL
CS
CLK
DI
1
0
1
An
•••
A0
Dx
•••
D0
TSV
HIGH-Z
DO
BUSY
TCZ
READY
HIGH-Z
Twc
FIGURE 2-9:
WRITE TIMING FOR 93C DEVICES
TCSL
CS
CLK
DI
1
0
1
An
•••
A0
Dx
•••
D0
TSV
DO
HIGH-Z
BUSY
TCZ
READY
HIGH-Z
Twc
 2003 Microchip Technology Inc.
DS21795B-page 9
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
2.9
WRITE ALL (WRAL)
automatic ERAL cycle for the device. Therefore, the
WRAL instruction does not require an ERAL instruction
but the chip must be in the EWEN status.
The Write All (WRAL) instruction will write the entire
memory array with the data specified in the command.
For 93AA66A/B/C and 93LC66A/B/C devices, after the
last data bit is clocked into DI, the falling edge of CS
initiates the self-timed auto-erase and programming
cycle. For 93C66A/B/C devices, the self-timed autoerase and programming cycle is initiated by the rising
edge of CLK on the last data bit. Clocking of the CLK
pin is not necessary after the device has entered the
WRAL cycle. The WRAL command does include an
FIGURE 2-10:
The DO pin indicates the READY/BUSY status of the
device if CS is brought high after a minimum of 250 ns
low (TCSL).
Note:
Issuing a Start bit and then taking CS low
will clear the READY/BUSY status from
DO.
VCC must be ≥ 4.5V for proper operation of WRAL.
WRAL TIMING FOR 93AA AND 93LC DEVICES
TCSL
CS
CLK
DI
1
0
0
0
1
X
•••
X
Dx
•••
D0
TSV
HIGH-Z
DO
BUSY
TCZ
READY
HIGH-Z
TWL
VCC must be ≥ 4.5V for proper operation of WRAL.
FIGURE 2-11:
WRAL TIMING FOR 93C DEVICES
TCSL
CS
CLK
DI
1
0
0
0
1
X
•••
X
Dx
•••
D0
TSV
DO
HIGH-Z
BUSY
TCZ
READY
HIGH-Z
TWL
DS21795B-page 10
 2003 Microchip Technology Inc.
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
3.0
PIN DESCRIPTIONS
TABLE 3-1:
3.1
PIN DESCRIPTIONS
Name
SOIC/PDIP/
MSOP/TSSOP
SOT-23
Rotated SOIC
CS
1
5
3
Chip Select
CLK
2
4
4
Serial Clock
DI
3
3
5
Data In
DO
4
1
6
Data Out
VSS
5
2
7
Ground
ORG/NC
6
N/A
8
Organization / 93XX66C
No Internal Connection / 93XX66A/B
NC
7
N/A
1
No Internal Connection
VCC
8
6
2
Power Supply
Chip Select (CS)
A high level selects the device; a low level deselects
the device and forces it into Standby mode. However, a
programming cycle which is already in progress will be
completed, regardless of the Chip Select (CS) input
signal. If CS is brought low during a program cycle, the
device will go into Standby mode as soon as the
programming cycle is completed.
CS must be low for 250 ns minimum (TCSL) between
consecutive instructions. If CS is low, the internal
control logic is held in a Reset status.
3.2
Function
Serial Clock (CLK)
data bits before an instruction is executed. CLK and DI
then become don't care inputs waiting for a new Start
condition to be detected.
3.3
Data In (DI)
Data In (DI) is used to clock in a Start bit, opcode,
address and data synchronously with the CLK input.
3.4
Data Out (DO)
Data Out (DO) is used in the READ mode to output
data synchronously with the CLK input (TPD after the
positive edge of CLK).
The Serial Clock is used to synchronize the communication between a master device and the 93XX series
device. Opcodes, address and data bits are clocked in
on the positive edge of CLK. Data bits are also clocked
out on the positive edge of CLK.
This pin also provides READY/BUSY status information during ERASE and WRITE cycles. READY/BUSY
status information is available on the DO pin if CS is
brought high after being low for minimum Chip Select
low time (TCSL) and an Erase or Write operation has
been initiated.
CLK can be stopped anywhere in the transmission
sequence (at high or low level) and can be continued
anytime with respect to clock high time (TCKH) and
clock low time (TCKL). This gives the controlling master
freedom in preparing opcode, address and data.
The Status signal is not available on DO, if CS is held
low during the entire ERASE or WRITE cycle. In this
case, DO is in the HIGH-Z mode. If status is checked
after the ERASE/WRITE cycle, the data line will be high
to indicate the device is ready.
CLK is a “Don't Care” if CS is low (device deselected).
If CS is high, but the Start condition has not been
detected (DI = 0), any number of clock cycles can be
received by the device without changing its status (i.e.,
waiting for a Start condition).
CLK cycles are not required during the self-timed Write
(i.e., auto ERASE/WRITE) cycle.
After detection of a Start condition the specified number
of clock cycles (respectively low-to-high transitions of
CLK) must be provided. These clock cycles are
required to clock in all required opcode, address and
 2003 Microchip Technology Inc.
Note:
3.5
Issuing a Start bit and then taking CS low
will clear the READY/BUSY status from
DO.
Organization (ORG)
When the ORG pin is connected to VCC or Logic HI, the
(x16) memory organization is selected. When the ORG
pin is tied to VSS or Logic LO, the (x8) memory
organization is selected. For proper operation, ORG
must be tied to a valid logic level.
93XX66A devices are always x8 organization and
93XX66B devices are always x16 organization.
DS21795B-page 11
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
4.0
PACKAGING INFORMATION
4.1
Package Marking Information
8-Lead MSOP (150 mil)
Example:
3L66BI
2281L7
XXXXXXT
YWWNNN
Example:
6-Lead SOT-23
3EL7
XXNN
MSOP 1st Line Marking Codes
Device
93AA66A
93AA66B
93AA66C
93LC66A
93LC66B
93LC66C
93C66A
93C66B
93C66C
std mark
3A66AT
3A66BT
3A66CT
3L66AT
3L66BT
3L66CT
3C66AT
3C66BT
3C66CT
Pb-free
mark
GA66AT
GA66BT
GA66CT
GL66AT
GL66BT
GL66CT
GC66AT
GC66BT
GC66CT
T = blank for commercial, “I” for Industrial,
“E” for Extended.
SOT23 Marking Codes
8-Lead PDIP
Example:
XXXXXXXX
XXXXXNNN
YYWW
93LC66B
I/P 1L7
0228
Device
93AA66A
93AA66B
93LC66A
93LC66B
93C66A
93C66B
I-temp
3BNN
3LNN
3ENN
3PNN
3HNN
3TNN
E-temp
–
–
3FNN
3RNN
3JNN
3UNN
Pb-free topside mark is same; Pb-free
noted only on carton label.
8-Lead SOIC
Example:
XXXXXXXX
XXXXYYWW
NNN
93LC66B
I/SN 0228
1L7
8-Lead TSSOP
Example:
L66B
I228
1L7
XXXX
TYWW
NNN
TSSOP 1st Line Marking Codes
Device
93AA66A
93AA66B
93AA66C
93LC66A
93LC66B
93LC66C
93C66A
93C66B
93C66C
std mark
A66A
A66B
A66C
L66A
L66B
L66C
C66A
C66B
C66C
Pb-free
mark
GACA
GACB
GACC
GLCA
GLCB
GLCC
GCCA
GCCB
GCCC
Temperature grade is marked on line 2.
Legend:
XX...X
T
Blank
I
E
YY
WW
NNN
Note:
DS21795B-page 12
Part number
Temperature
Commercial
Industrial
Extended
Year code (last 2 digits of calendar year) except TSSOP
and MSOP which use only the last 1 digit
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Custom marking available.
 2003 Microchip Technology Inc.
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)
E
E1
p
D
2
B
n
1
α
A2
A
c
φ
A1
(F)
L
β
Units
Dimension Limits
n
p
MIN
INCHES
NOM
MAX
MILLIMETERS*
NOM
8
0.65 BSC
0.75
0.85
0.00
4.90 BSC
3.00 BSC
3.00 BSC
0.40
0.60
0.95 REF
0°
0.08
0.22
5°
5°
-
MIN
8
Number of Pins
Pitch
.026 BSC
A
.043
Overall Height
A2
Molded Package Thickness
.030
.033
.037
A1
.000
.006
Standoff
E
Overall Width
.193 TYP.
E1
.118 BSC
Molded Package Width
D
.118 BSC
Overall Length
L
.016
.024
.031
Foot Length
Footprint (Reference)
F
.037 REF
φ
0°
8°
Foot Angle
c
.003
.006
.009
Lead Thickness
B
.009
.012
.016
Lead Width
α
5°
15°
Mold Draft Angle Top
β
5°
15°
Mold Draft Angle Bottom
*Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
exceed .010" (0.254mm) per side.
MAX
1.10
0.95
0.15
0.80
8°
0.23
0.40
15°
15°
JEDEC Equivalent: MO-187
Drawing No. C04-111
 2003 Microchip Technology Inc.
DS21795B-page 13
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
6-Lead Plastic Small Outline Transistor (OT) (SOT-23)
E
E1
B
p1
n
D
1
α
c
A
A2
φ
L
β
Units
Dimension Limits
n
p
MIN
A1
INCHES*
NOM
MAX
MILLIMETERS
NOM
6
0.95
1.90
0.90
1.18
0.90
1.10
0.00
0.08
2.60
2.80
1.50
1.63
2.80
2.95
0.35
0.45
0
5
0.09
0.15
0.35
0.43
0
5
0
5
MIN
Number of Pins
6
Pitch
.038
p1
Outside lead pitch (basic)
.075
Overall Height
A
.035
.046
.057
Molded Package Thickness
.035
.043
.051
A2
Standoff
.000
.003
.006
A1
Overall Width
E
.102
.110
.118
Molded Package Width
.059
.064
.069
E1
Overall Length
D
.110
.116
.122
Foot Length
L
.014
.018
.022
φ
Foot Angle
0
5
10
c
Lead Thickness
.004
.006
.008
Lead Width
B
.014
.017
.020
α
Mold Draft Angle Top
0
5
10
β
Mold Draft Angle Bottom
0
5
10
*Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
exceed .005" (0.127mm) per side.
MAX
1.45
1.30
0.15
3.00
1.75
3.10
0.55
10
0.20
0.50
10
10
JEITA (formerly EIAJ) equivalent: SC-74A
Drawing No. C04-120
DS21795B-page 14
 2003 Microchip Technology Inc.
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
1
α
E
A2
A
L
c
A1
β
B1
p
eB
B
Units
Dimension Limits
n
p
Number of Pins
Pitch
Top to Seating Plane
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
Tip to Seating Plane
Lead Thickness
Upper Lead Width
Lower Lead Width
Overall Row Spacing
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
L
c
§
B1
B
eB
α
β
MIN
.140
.115
.015
.300
.240
.360
.125
.008
.045
.014
.310
5
5
INCHES*
NOM
MAX
8
.100
.155
.130
.170
.145
.313
.250
.373
.130
.012
.058
.018
.370
10
10
.325
.260
.385
.135
.015
.070
.022
.430
15
15
MILLIMETERS
NOM
8
2.54
3.56
3.94
2.92
3.30
0.38
7.62
7.94
6.10
6.35
9.14
9.46
3.18
3.30
0.20
0.29
1.14
1.46
0.36
0.46
7.87
9.40
5
10
5
10
MIN
MAX
4.32
3.68
8.26
6.60
9.78
3.43
0.38
1.78
0.56
10.92
15
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
 2003 Microchip Technology Inc.
DS21795B-page 15
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
n
1
α
h
45°
c
A2
A
φ
β
L
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Overall Length
Chamfer Distance
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
h
L
φ
c
B
α
β
MIN
.053
.052
.004
.228
.146
.189
.010
.019
0
.008
.013
0
0
A1
INCHES*
NOM
8
.050
.061
.056
.007
.237
.154
.193
.015
.025
4
.009
.017
12
12
MAX
.069
.061
.010
.244
.157
.197
.020
.030
8
.010
.020
15
15
MILLIMETERS
NOM
8
1.27
1.35
1.55
1.32
1.42
0.10
0.18
5.79
6.02
3.71
3.91
4.80
4.90
0.25
0.38
0.48
0.62
0
4
0.20
0.23
0.33
0.42
0
12
0
12
MIN
MAX
1.75
1.55
0.25
6.20
3.99
5.00
0.51
0.76
8
0.25
0.51
15
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
DS21795B-page 16
 2003 Microchip Technology Inc.
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)
E
E1
p
D
2
1
n
B
α
A
c
φ
β
A1
A2
L
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Molded Package Length
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
L
φ
c
B
α
β
MIN
INCHES
NOM
MAX
8
.026
.033
.002
.246
.169
.114
.020
0
.004
.007
0
0
.035
.004
.251
.173
.118
.024
4
.006
.010
5
5
.043
.037
.006
.256
.177
.122
.028
8
.008
.012
10
10
MILLIMETERS*
NOM
MAX
8
0.65
1.10
0.85
0.90
0.95
0.05
0.10
0.15
6.25
6.38
6.50
4.30
4.40
4.50
2.90
3.00
3.10
0.50
0.60
0.70
0
4
8
0.09
0.15
0.20
0.19
0.25
0.30
0
5
10
0
5
10
MIN
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-086
 2003 Microchip Technology Inc.
DS21795B-page 17
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
APPENDIX A:
REVISION HISTORY
Revision B
Corrections to Section 1.0, Electrical Characteristics.
Section 4.1, 6-Lead SOT-23 package to OT.
DS21795B-page 18
 2003 Microchip Technology Inc.
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
ON-LINE SUPPORT
Microchip provides on-line support on the Microchip
World Wide Web site.
The web site is used by Microchip as a means to make
files and information easily available to customers. To
view the site, the user must have access to the Internet
and a web browser, such as Netscape® or Microsoft®
Internet Explorer. Files are also available for FTP
download from our FTP site.
Connecting to the Microchip Internet
Web Site
SYSTEMS INFORMATION AND
UPGRADE HOT LINE
The Systems Information and Upgrade Line provides
system users a listing of the latest versions of all of
Microchip's development systems software products.
Plus, this line provides information on how customers
can receive the most current upgrade kits.The Hot Line
Numbers are:
1-800-755-2345 for U.S. and most of Canada, and
1-480-792-7302 for the rest of the world.
042003
The Microchip web site is available at the following
URL:
www.microchip.com
The file transfer site is available by using an FTP
service to connect to:
ftp://ftp.microchip.com
The web site and file transfer site provide a variety of
services. Users may download files for the latest
Development Tools, Data Sheets, Application Notes,
User's Guides, Articles and Sample Programs. A variety of Microchip specific business information is also
available, including listings of Microchip sales offices,
distributors and factory representatives. Other data
available for consideration is:
• Latest Microchip Press Releases
• Technical Support Section with Frequently Asked
Questions
• Design Tips
• Device Errata
• Job Postings
• Microchip Consultant Program Member Listing
• Links to other useful web sites related to
Microchip Products
• Conferences for products, Development Systems,
technical information and more
• Listing of seminars and events
 2003 Microchip Technology Inc.
DS21795B-page 19
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
To:
Technical Publications Manager
RE:
Reader Response
Total Pages Sent ________
From: Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
FAX: (______) _________ - _________
Application (optional):
Would you like a reply?
Y
N
Device: 93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
Literature Number: DS21795B
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21795B-page 20
 2003 Microchip Technology Inc.
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
X
X
Pinout Tape & Reel Temperature
Range
Device
/XX
X
Package
X
Lead Finish
93AA66A: 4K 1.8V Microwire Serial EEPROM
93AA66B: 4K 1.8V Microwire Serial EEPROM
93AA66C: 4K 1.8V Microwire Serial EEPROM w/ORG
93LC66A: 4K 2.5V Microwire Serial EEPROM
93LC66B: 4K 2.5V Microwire Serial EEPROM
93LC66C: 4K 2.5V Microwire Serial EEPROM w/ORG
93C66A:
93C66B:
93C66C:
4K 5.0V Microwire Serial EEPROM
4K 5.0V Microwire Serial EEPROM
4K 5.0V Microwire Serial EEPROM w/ORG
Pinout:
Blank =
X
=
Standard pinout
Rotated pinout
Tape & Reel:
Blank =
T
=
Standard packaging
Tape & Reel
Temperature Range
I
E
=
=
-40°C to +85°C
-40°C to +125°C
Package
MS
OT
P
SN
ST
=
=
=
=
=
Plastic MSOP (Micro Small outline, 8-lead)
SOT-23, 6-lead (Tape & Reel only)
Plastic DIP (300 mil body), 8-lead
Plastic SOIC (150 mil body), 8-lead
TSSOP, 8-lead
Lead Finish:
Blank =
G
=
Examples:
a)
b)
c)
93AA66C-I/MS: 4K, 512x8 or 256x16 Serial
EEPROM, MSOP package, 1.8V
93AA66B-I/MS: 4K, 256x16 Serial EEPROM,
MSOP package, 1.8V
93AA66AT-I/OT: 4K, 512x8 Serial EEPROM,
SOT-23 package, tape and reel, 1.8V
d)
93AA66CT-I/MS: 4K, 512x8 or 256x16 Serial
EEPROM, MSOP package, tape and reel, 1.8V
a)
93LC66A-I/MS: 4K, 512x8 Serial EEPROM,
MSOP package, 2.5V
93LC66BT-I/OT: 4K, 256x16 Serial EEPROM,
SOT-23 package, tape and reel, 2.5V
93LC66B-I/MS: 4K, 256x16 Serial EEPROM,
MSOP package, 2.5V
b)
c)
d)
93LC66BXT-I/SNG: 4K, 256x16 Serial
EEPROM, SOIC package, rotated pinout,
Industrial temperature, Pb-free finish, 2.5V
a)
93C66B-I/MS: 4K, 256x16 Serial EEPROM,
MSOP package, 5.0V
93C66C-I/MS: 4K, 512x8 or 256x16 Serial
EEPROM, MSOP package, 5.0V
93C66AT-I/OT: 4K, 512x8 Serial EEPROM,
SOT-23 package, tape and reel, 5.0V
b)
c)
Standard 63% / 37% SnPb
Pure Matte Sn
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences
and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of
the following:
1.
2.
3.
Your local Microchip sales office
The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
 2003 Microchip Technology Inc.
DS21795B-page 21
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
NOTES:
DS21795B-page 22
 2003 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with
express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE and PowerSmart are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
AmpLab, FilterLab, microID, MXDEV, MXLAB, PICMASTER,
SEEVAL and The Embedded Control Solutions Company are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Application Maestro, dsPICDEM, dsPICDEM.net, ECAN,
ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
PICkit, PICDEM, PICDEM.net, PowerCal, PowerInfo,
PowerMate, PowerTool, rfLAB, rfPIC, Select Mode,
SmartSensor, SmartShunt, SmartTel and Total Endurance are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2003, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and Mountain View, California in March 2002.
The Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip’s quality system for the
design and manufacture of development
systems is ISO 9001 certified.
 2003 Microchip Technology Inc.
DS21795B-page 23
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
Korea
Corporate Office
Australia
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support: 480-792-7627
Web Address: http://www.microchip.com
Suite 22, 41 Rawson Street
Epping 2121, NSW
Australia
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
Tel: 82-2-554-7200 Fax: 82-2-558-5932 or
82-2-558-5934
Atlanta
Unit 915
Bei Hai Wan Tai Bldg.
No. 6 Chaoyangmen Beidajie
Beijing, 100027, No. China
Tel: 86-10-85282100
Fax: 86-10-85282104
3780 Mansell Road, Suite 130
Alpharetta, GA 30022
Tel: 770-640-0034
Fax: 770-640-0307
Boston
2 Lan Drive, Suite 120
Westford, MA 01886
Tel: 978-692-3848
Fax: 978-692-3821
Chicago
333 Pierce Road, Suite 180
Itasca, IL 60143
Tel: 630-285-0071
Fax: 630-285-0075
Dallas
4570 Westgrove Drive, Suite 160
Addison, TX 75001
Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Tri-Atria Office Building
32255 Northwestern Highway, Suite 190
Farmington Hills, MI 48334
Tel: 248-538-2250
Fax: 248-538-2260
Kokomo
2767 S. Albright Road
Kokomo, IN 46902
Tel: 765-864-8360
Fax: 765-864-8387
Los Angeles
China - Beijing
China - Chengdu
Rm. 2401-2402, 24th Floor,
Ming Xing Financial Tower
No. 88 TIDU Street
Chengdu 610016, China
Tel: 86-28-86766200
Fax: 86-28-86766599
China - Fuzhou
Unit 28F, World Trade Plaza
No. 71 Wusi Road
Fuzhou 350001, China
Tel: 86-591-7503506
Fax: 86-591-7503521
China - Hong Kong SAR
Unit 901-6, Tower 2, Metroplaza
223 Hing Fong Road
Kwai Fong, N.T., Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
China - Shanghai
Room 701, Bldg. B
Far East International Plaza
No. 317 Xian Xia Road
Shanghai, 200051
Tel: 86-21-6275-5700
Fax: 86-21-6275-5060
China - Shenzhen
18201 Von Karman, Suite 1090
Irvine, CA 92612
Tel: 949-263-1888
Fax: 949-263-1338
Rm. 1812, 18/F, Building A, United Plaza
No. 5022 Binhe Road, Futian District
Shenzhen 518033, China
Tel: 86-755-82901380
Fax: 86-755-8295-1393
Phoenix
China - Shunde
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7966
Fax: 480-792-4338
Room 401, Hongjian Building
No. 2 Fengxiangnan Road, Ronggui Town
Shunde City, Guangdong 528303, China
Tel: 86-765-8395507 Fax: 86-765-8395571
San Jose
China - Qingdao
2107 North First Street, Suite 590
San Jose, CA 95131
Tel: 408-436-7950
Fax: 408-436-7955
Rm. B505A, Fullhope Plaza,
No. 12 Hong Kong Central Rd.
Qingdao 266071, China
Tel: 86-532-5027355 Fax: 86-532-5027205
Toronto
India
6285 Northam Drive, Suite 108
Mississauga, Ontario L4V 1X5, Canada
Tel: 905-673-0699
Fax: 905-673-6509
Divyasree Chambers
1 Floor, Wing A (A3/A4)
No. 11, O’Shaugnessey Road
Bangalore, 560 025, India
Tel: 91-80-2290061 Fax: 91-80-2290062
Japan
Benex S-1 6F
3-18-20, Shinyokohama
Kohoku-Ku, Yokohama-shi
Kanagawa, 222-0033, Japan
Tel: 81-45-471- 6166 Fax: 81-45-471-6122
DS21795B-page 24
Singapore
200 Middle Road
#07-02 Prime Centre
Singapore, 188980
Tel: 65-6334-8870 Fax: 65-6334-8850
Taiwan
Kaohsiung Branch
30F - 1 No. 8
Min Chuan 2nd Road
Kaohsiung 806, Taiwan
Tel: 886-7-536-4818
Fax: 886-7-536-4803
Taiwan
Taiwan Branch
11F-3, No. 207
Tung Hua North Road
Taipei, 105, Taiwan
Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
EUROPE
Austria
Durisolstrasse 2
A-4600 Wels
Austria
Tel: 43-7242-2244-399
Fax: 43-7242-2244-393
Denmark
Regus Business Centre
Lautrup hoj 1-3
Ballerup DK-2750 Denmark
Tel: 45-4420-9895 Fax: 45-4420-9910
France
Parc d’Activite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
91300 Massy, France
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Germany
Steinheilstrasse 10
D-85737 Ismaning, Germany
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Italy
Via Quasimodo, 12
20025 Legnano (MI)
Milan, Italy
Tel: 39-0331-742611
Fax: 39-0331-466781
Netherlands
P. A. De Biesbosch 14
NL-5152 SC Drunen, Netherlands
Tel: 31-416-690399
Fax: 31-416-690340
United Kingdom
505 Eskdale Road
Winnersh Triangle
Wokingham
Berkshire, England RG41 5TU
Tel: 44-118-921-5869
Fax: 44-118-921-5820
07/28/03
 2003 Microchip Technology Inc.